The document proposes the development of piezoresistive transistors using layered dichalcogenide materials to overcome limitations in silicon-based devices. It outlines a 3-phase technical approach to optimize materials, demonstrate a large-scale functional prototype, and develop a full-scale prototype. A project timeline, budget, and potential economic and social impacts are also presented.

1. Piezoresistive Transistors:
Surpassing Silicon’s Limit and Enhancing
Virtual Reality
Team LoPo
The Pennsylvania State University
May 5th, 2014
Technical Approach:
Andrew Saunders
Dixiong Wang
Social & Economic:
Jennifer DiStefano
Jane Mareth
Project Management:
Caroline Hallowell
William Salem
Team Leader: Brian Markman

2. Introduction
Ganapati The Day In Tech 2010
Whit’s End 2013
Greg Aluratek 2011
Fine Art America 2014

3. Technical Need
Curve showing transistor count
doubling every two years
Deviation from
Moore’s Law

4. Technical Need
• Silicon has reached an inherent, unavoidable limit [1]
• Current solutions are not sustainable or scalable

5. Technical Approach
Silica glass
LaNiO3 (electrode)
MoOx (electrode)
Piezoelectric
Pb(Mg1/3Nb2/3)O3-PbTiO3
Piezoresistor
Pt (electrode)
α-Al2O3
Piezoresistive Multilayered
Dichalcogenides
Semiconductor
Semimetal
Terrones Nature 2013

6. Phase 1: Materials Optimization
• Piezoresistor
o Optimal stacking pattern
o Complete characterization
o Device-quality films
• Piezoelectric
o Sputter-coated film
o Scale to <100 nm
Technical Approach
Possible dichalcogenide materials include:
Semiconductors: MoS2, WSe2, MoSe2
Semimetals: MoTe2, WTe2, PdTe2
Phase 1:
Materials
Optimization
Phase 2:
Demonstrate Large-Scale
Functional Prototype
Phase 3:
Develop Full-Scale Prototype
for Implementation

7. Phase 2: Develop Large-Scale
Functional Prototype
• Integrate materials to fabricate
micrometer-scale transistors
• Characterize electronic and
mechanical properties of device
• Life-time assessment to ensure
lifetime reliability
• Demonstrate sub-60 mV/decade
switching
Technical Approach
Phase 1:
Materials
Optimization
Phase 2:
Demonstrate Large-Scale
Functional Prototype
Phase 3:
Develop Full-Scale Prototype
for Implementation
Nausieda I. IEEE transactions 2010

8. Technical Approach
Phase 3: Develop Full-Scale
Prototype for Implementation
• Optimize and downsize devices
• Optimize process to ensure
quality and repeatable devices
Deliverables:
1. Deliver functional, full-scaled
devices
2. Deliver intellectual property
pertaining to device and process
~200 nm
Piezoresistor thickness: 14 nm
Phase 1:
Materials
Optimization
Phase 2:
Demonstrate Large-Scale
Functional Prototype
Phase 3:
Develop Full-Scale Prototype
for Implementation
Processor, CPU, Motherboard 2014

9. Technology Impact
Economic Impact
• Every laptop wastes $15 of
electricity per year [2]
• Possible power savings of $85
billion/year [3]
o 5% of U.S. energy consumption[3]
Social Impact
• Enhancing Virtual Reality
o Faster, more efficient
communication of information
• Advancing Health Informatics
o Access, process, and analyze
mass amounts of data
Speed of Creativity 2010
Signs of the Times 2010
Saving Energy 2012

10. Project Management
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10Q11Q12Q13Q14Q15Q16
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10Q11Q12Q13Q14Q15Q16
X
X
X
X
Milestones
Phase 3: Develop Full-Scale Prototype for Implementation
4
Tasking Schedule
Phase 1: Materials Optimization
Phase 2: Demonstrate Large-Scale Functional Prototype
Program Year
Program Quarter
1 2 3
Demonstrate working large-scale piezoresistive transistor prototype
Delivery of fully-scaled prototype, along with associated intellectual property
Program Quarter
Demonstrate growth of alternating layer dichalcogenides
Demonstrate optimal layering pattern of dichalcogenides

11. Conclusion
Grand Challenges
1. Improve virtual reality
2. Advance health informatics
3. Advance personalized learning
4. Help to engineer tools for scientific
discovery
Why Now?
• Market worth $320 billion per year [3]
• Intellectual property valued at $5 billion
• Revolutionary technology that would
redefine a market
Mac Life 2010 Movie Pilot 2014
Documentary 2013 Wiring the Brain 2013
News Whip 2013
Beta News 2014

12. Questions?

13. 1. Shazia, H., Humaira, Mamoona, A., Limitation Of Silicon Based Computation And
Future Prospects, IEEE Computer Society, 559-561 (2010).
2. Unknown. "Top 5 Energy-Sucking Vampire Appliances." Do Something. N.p., n.d.
3. Roth, K., and K. Mckenney. "Energy Consumption by Consumer Electronics In US
Residences.” TIAX LLC. N.p., Dec. 2007. Web.
References

14. 1. Lakshmi, K., Madhana, S., P.D., Moran, Growth of Epitaxial (110)
0.7Pb(Mg1/3Nb2/3)O3-0.3PbTiO3 Thin Films on r-Plane Sapphire Substrates by RF
Magnetron Sputtering, Journal of Electronic Materials,39 (1), 132-137, (2010).
2. Madeleine, D., Ola, N., Helmer, F., Growth of Thin Films of Molybdenum Oxide by
Atomic Layer Deposition.J. Mater. Chem., 21, 705-710, (2011).
3. Yi-Hsien, L., Lili, Y., Han, W., Wenjing, F., Xi, L., Yumeng, S., Cheng-Te, L., Jing-
Kai, H., Mu-Tung, C., Chia-Seng, Ch., Mildred, D.,Tomas, P., Lain-Jong, L., Jing,
K., Synthesis and Transfer of Single Layer Transition Metal Disulfides on Diverse
Surfaces, Nano Lett., 13, 1852-1857, (2013).
4. Groner M. D., Fabreguette F. H., Elam J. W., George S. M., Low-Temperature
Al2O3 Atomic Layer Deposition, Chem. Mater., 16, 639-645, (2004).
Additional References

15. Full Timeline

16. Full Budget
01/01/2015 - 12/31/2015 01/01/2016 - 12/31/2016 01/01/2017 - 12/31/2017 01/01/2018 - 12/31/2018 Total
FY 14/15 & FY 15/16 FY 15/16 & 16/17 FY 16/17 & 17/18 FY 17/18 & 18/19
Principal Investigators:
Dichalcogenide $8,400.00 $8,610.00 $0.00 $0.00 $17,010.00
Piezoelectric $0.00 $8,610.00 $0.00 $0.00 $8,610.00
Electrical Engineer $0.00 $4,305.00 $8,820.00 $9,030.00 $22,155.00
Encapsulate $0.00 $0.00 $8,820.00 $9,030.00 $17,850.00
Salaries (Category I) $8,400.00 $21,525.00 $17,640.00 $18,060.00 $65,625.00
Graduate Researchers: (Grade 14) [17]
$32,000.00 $82,000.00 $67,200.00 $68,800.00 $250,000.00
Dichalogenide $32,000.00 $32,800.00 $0.00 $0.00 $64,800.00
Piezoelectric/Piezoresistor $0.00 $32,800.00 $0.00 $0.00 $32,800.00
Electrical Engineer $0.00 $16,400.00 $33,600.00 $34,400.00 $84,400.00
Encapsulate $0.00 $0.00 $33,600.00 $34,400.00 $68,000.00
Wages (Category II) $32,000.00 $82,000.00 $67,200.00 $68,800.00 $250,000.00
Post Doctoral Scholar: $90,000.00 $92,250.00 $94,500.00 $96,750.00 $373,500.00
Wages (Category III) $90,000.00 $92,250.00 $94,500.00 $96,750.00 $373,500.00
Total Salaries and Wages $130,400.00 $195,775.00 $179,340.00 $183,610.00 $689,125.00
Fringe
Category I @ 36.50% $3,066.00 $7,856.63 $6,438.60 $6,591.90 $23,953.13
Category II @ 7.90% $2,528.00 $6,478.00 $5,308.80 $5,435.20 $19,750.00
Category III @ 25.00% $22,500.00 $23,062.50 $23,625.00 $24,187.50 $93,375.00
Total Fringe $28,094.00 $37,397.13 $35,372.40 $36,214.60 $137,078.13
Total Salaries, Wages and Fringe $158,494.00 $233,172.13 $214,712.40 $219,824.60 $826,203.13
Modified Direct Costs
Laboratory Supplies [17]
$12,000.00 $27,000.00 $24,000.00 $24,000.00 $87,000.00
Purchased Services [17]
$50,000.00 $125,000.00 $100,000.00 $100,000.00 $375,000.00
Travel - Domestic $3,900.00 $7,800.00 $7,800.00 $7,800.00 $27,300.00
Total Modified Direct Costs $224,394.00 $392,972.13 $346,512.40 $351,624.60 $1,315,503.13
Tuition Remission $16,516.00 $42,942.50 $35,728.00 $37,158.00 $132,344.50
Total Direct Costs $240,910.00 $435,914.63 $382,240.40 $388,782.60 $1,447,847.63
F&A Costs
F&A Rate: 49.50% $111,075.03 $194,521.20 $171,523.64 $174,054.18 $651,174.05
Total Requested From Sponsor $351,985.03 $630,435.83 $553,764.04 $562,836.78 $2,099,021.67
Total Annual Project Costs $351,985.03 $630,435.83 $553,764.04 $562,836.78 $2,099,021.67
Materials Science & Engineering (Earth & Mineral Sciences) / The Pennsylvania State University
MatSE 492W
National Science Foundation
Project Dates: 01/01/2015 - 12/31/2018

17. Detailed Budget