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APPLE A1311 K60 820-3126-A

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TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEMTABLE_TABLEOFCONTENTS_ITEM DRAWING DRAWING TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECNREV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3456 D B 8 7 6 5 4 2 1 12 APPD CK DESCRIPTION OF REVISION K60 MLB 1 OF 98 051-8115 11.1.0 1 OF 110 2011-02-08 Contents Sync Date(.csa) Page 49 01/06/2011 K60_MARK 52 SMBUS CONNECTIONSTable of Contents 1 1 K60 05/21/2009 ABBREV=DRAWING TITLE=K22 LAST_MODIFIED=Tue Feb 8 14:39:56 2011 LAST_MODIFIED=Tue Feb 8 14:39:56 2011 Page (.csa) Contents Date Sync 50 01/06/2011 K62 53 CPU/PCH/GPU POWER SENSE 51 01/06/2011 K62 54 HDD OOB SENSE 52 01/06/2011 K60_MARK 55 TEMP SENSORS 53 01/06/2011 K62 56 HD AND OD FAN 54 01/06/2011 K60_JERRY 57 CPU FAN 55 01/06/2011 K62 61 SPI ROM 56 01/06/2011 K60_DAVID 62 AUDIO: CODEC/REGULATOR 57 01/06/2011 K60_DAVID 63 AUDIO: FILTER/BUFFER 58 01/06/2011 K60_DAVID 64 AUDIO: SPEAKER AMP_1 59 01/06/2011 K60_DAVID 65 AUDIO: SPEAKER AMP 60 01/06/2011 K60_DAVID 66 Audio: MLB to I/O Conn. 61 11/24/2010 K60_DAVID 67 AUDIO: Detects/Grounding 62 01/06/2011 K60_DAVID 68 AUDIO: Mikey 63 01/06/2011 K62 69 POWER SEQUENCING ENABLES 64 01/06/2011 K62 70 POWER SEQUENCING PGOOD 65 N/A K60_AARON 71 VREG: PPVCORE_S0_CPU 66 01/06/2011 K62 72 VREG: CPU CORE - PHASES 1-3 67 N/A K60_AARON 73 VREG:AXG PHASE/CORE - CAPS 68 01/06/2011 K62 74 1V05 REGULATOR 69 11/15/2010 K62 75 CPU VCCSA REGULATOR 70 01/06/2011 K62 77 5V_S3 / 3V3_S5 VREGS 71 01/06/2011 K62 78 1.5V / 1.8V VREGS 72 01/06/2011 K62 79 3.42 G3HOT SUPPLY 73 01/06/2011 K62 80 S3+S0 FETS 74 01/06/2011 K60_JERRY 81 12V_S0 & 12V_S5 switch 75 01/06/2011 K62 84 MXM PCIe, DP & Power 76 N/A K60_MASTER 85 MXM I/O 77 01/06/2011 K62 86 MXM PCIE CAPS 78 07/18/2010 K60_AARON 87 DP ALIAS AND CONTROL 79 01/06/2011 K62 88 GREEN CLOCK 80 01/06/2011 K62 89 T29 POWER 81 01/06/2011 K62 90 Display: Int DP Connector 82 11/14/2010 K62 91 2V9/3V3/12V POWER SWITCH 83 01/06/2011 K62 92 Internal DP MUXing 84 11/14/2010 K62 93 DisplayPort/T29 A MUXing 85 01/06/2011 K62 94 DisplayPort/T29 A Connector 86 01/06/2011 K62 97 T29 Host (1 of 2) 87 01/06/2011 K62 98 T29 Host (2 of 2) 88 01/06/2011 K62 100 K60/K62 RULE DEFINITIONS 89 01/06/2011 K60_ROSITA 101 Memory Constraints 90 01/06/2011 K62 102 PCIE/DMI/FDI/SATA CONSTRAINTS 91 01/06/2011 K62 103 IBEX PEAK CONSTRAINTS 92 01/06/2011 K62 104 USB/ENET/SD/FW/AUD CONSTRAINTS 93 01/06/2011 K62 105 GRAPHICS CONSTRAINTS 94 01/06/2011 K62 106 SMC Constraints 95 01/06/2011 K62 107 POWER CONSTRAINTS 96 01/06/2011 K62 108 T29 CONSTRAINTS 97 01/06/2011 K62 109 PM RESETS ENABLES PGOOD CONST 98 01/06/2011 K62 110 K60/K62 ICT/FCT System Block Diagram 2 2 K60_SIJI 01/06/2011 Power Block Diagram 3 3 K60_JERRY 01/06/2011 BOM Configuration 4 4 K60_AARON N/A DEBUG LEDS 5 5 K62 01/06/2011 Power Conn / Alias 6 6 K60_MARK 12/30/2010 Holes 7 7 K74_MASTER N/A UNUSED SIGNAL ALIAS 8 8 K62 01/06/2011 Signal Aliases 9 9 K62 01/06/2011 CPU DMI/PEG/FDI/RSVD 10 10 K62 01/06/2011 CPU CLOCK/MISC/JTAG 11 11 K62 01/06/2011 CPU DDR3 INTERFACES 12 12 K62 01/06/2011 CPU POWER 13 13 K62 01/06/2011 CPU GROUNDS 14 14 K62 01/06/2011 STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU 15 15 K62 01/06/2011 CPU NON-GFX DECOUPLING 16 16 K62 01/06/2011 GFX DECOUPLING & PCH PWR ALIAS 17 17 K62 01/06/2011 PCH SATA/PCIE/CLK/LPC/SPI 18 18 K62 01/06/2011 PCH DMI/FDI/GRAPHICS 19 19 K62 01/06/2011 PCH PCI/FLASHCACHE/USB 20 20 K62 01/06/2011 PCH MISC 21 21 K62 01/06/2011 PCH POWER 22 22 K62 01/06/2011 PCH GROUNDS 23 23 K62 01/06/2011 PCH DECOUPLING 24 24 K62 01/06/2011 CPU & PCH XDP 25 25 K62 01/06/2011 CLOCK (CK505) 26 26 K62 01/06/2011 CHIPSET SUPPORT 28 27 K62 01/06/2011 DDR3 VREF MARGINING 29 28 K62 01/06/2011 MEMORY CAPS 30 29 K62 01/06/2011 DDR3 SO-DIMM 0 & 2 31 30 K62 01/06/2011 DDR3 SO-DIMM 1 & 3 32 31 K62 01/06/2011 DDR3 SUPPORT AND BITSWAPS 33 32 K62 01/06/2011 PCI-E Wireless Connector 34 33 K62 01/06/2011 USB HUB 1 35 34 K62 01/06/2011 USB HUB 2 36 35 K62 01/06/2011 CAESAR IV SUPPORT 38 36 K62 01/06/2011 ETHERNET PHY (CAESAR IV) 39 37 K62 01/06/2011 Ethernet Connector 40 38 K60_MARK 01/06/2011 FireWire LLC/PHY (FW643) 41 39 K60_ROSITA 01/06/2011 FireWire: 1394B MISC 42 40 K62 01/06/2011 FIREWIRE CONNECTOR 43 41 K62 01/06/2011 SATA Connectors 45 42 K60_JERRY 01/06/2011 EXTERNAL USB CONNECTORS 46 43 K62 01/06/2011 Internal USB Connections 47 44 K62 01/06/2011 SD READER CONNECTOR 48 45 K62 01/06/2011 SMC 49 46 K62 01/06/2011 SMC Support 50 47 K62 01/06/2011 LPC+SPI Debug Connector 51 48 K62 01/06/2011 SCH,K60,MLB www.vinafix.vn
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 USB CAMERAPG 47 J47XX J47XX SD CARDPG 47 TO ENET 25MHz XTAL IN 25MHz XTAL IN 25MHz XTAL IN X4 PCI-E GEN2 PG 88 U8800 GREEN CLK X16 PCI-E GEN2 FDI INTERFACE DDR3 1333 CHB DDR3 1333 CHA J4800 SATA-A2 SATA CONN ODD T3900 MAGNETICS PG 38 AND PHY GB E-NET SATA CONN LGA1155 - SANDY BRIDGE PG 19 PG 47 J4700 ALS XDP CONN SO-DIMMS XDP CONN PG 55 FAN CONN AND CONTROL PG 56,57 J5600, J5601, J5700 FW643 SD CARD HDA SMB E-NET CONNECTOR J4530 X1 PCIE GEN1 LANE 2.5GBITPS X1 PCIE GEN1 LANE 2.5GBITPS PG 19 CONTROLLER HDMI/DVI/DP (UPTO14DEVICES) LPC 6 SATA 2.O PORTS PG 18 X4 DMI (PORT B) RGB OUT DIGITAL VIDEO OUTPUT (PORT C) 1312111083 SATA (SUPPORTED UPTO 4 REQ/GNT) E-NET PCI PWR DIGITAL VIDEO OUTPUT SATA 3.0 6GHZ. SATA 3.0 6GHZ. HDD SSD MIDBUS PROBE PG 25 J2500 Port80,serial PG 51 XDP J3900 (PORT D) PG 39 U3800 PG 18 INTERFACE PG 18 PG 19 DMI INTERFACE PG 18 HDMI/DVI/DP PG 19 PG18 PG 18 PG 18 PG20 PG 19 PG 20 PG 25 U2510 PG 39 0125679 USB2.0 DIMM’s SPI Boot ROM PG 13 U6100 PG 32 PG 31 J3200, J3200 J3100, J3100 PG 53 POWER SENSE TO BIDIVI HW PG 10 CTRL Fan MIKEY J4300 SPI B,0 BSB SMC ADC 4 PG 34PG 43 AirPort Mini PCI-E PG 49 U4900 DIGITAL VIDEO OUTPUT Conn FireWire J3400 PG 41 U4100 HDMI/DVI/DP U1000 2 SO-DIMMS J5100 Prt Ser PG 61 CLK LPC+SPI CONN (PORT A) ANALOG VIDEO OUTPUT SATA-A0 SYNTH PG 45 J4510 J4520 PG 45 PG 45 PCI-EGEN2 UPTO8LANES3 U6201 Audio Audio Conns Codec U6400, U6500 SPEAKER AMPS HEADPHONES INTERNAL/EXTERNAL MICROPHONES LINE INPUT J6600,J6601,J6602,J6603 2 SO-DIMMS GPIOs SO-DIMMS PG 48 INTEL CPU POWER SUPPLY TEMP SENSORS TEMP, CURRENT SENSE GPU HEATSINK AMBIENT INTAKE CPU DIE-PECI LEFT SKIN TEMP RIGHT SKIN TEMP MXM CONNECTOR J8400 X4 DP X4 DP LOGIC PG 84 X4 DPX4 DP T29 ROUTER X4 DP T29 LANES T29 LANES DP LANES TO INT MUX EXTERNAL PG 94 PORT CONNDISPLAY J9400 X4 DP PG 90 DISPINTERNAL J9002 Misc INTEL COUGAR POINT U1800 PG 46 PG 46 PG 47 EXTA EXTB BLUETOOTH J4610 PG 46 J4700 J4600 PG 47 PG 46 EXTDJ4630 IR EXTCJ4620 J4780 PG 36 PG 35 USB HUB1 U3500 U3600 USB HUB2 LCD TEMP OPTICAL DRIVE HARD DRIVE (OOB) MXM - GPU DIE CPU HEATSINK SATA CONN X1 PCIE GEN1 LANE 2.5GBITPS SATA 2.0 3GHZ. SATA-A1 SYNC_MASTER=K60_SIJI System Block Diagram SYNC_DATE=01/06/2011 2 OF 110 11.1.0 051-8115 2 OF 98 www.vinafix.vn
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PP12V_T29 PP12V_S5_LED 3.75A USB Ext Port 4.7APP5V_USB_PORTx Spec:14A(170W) PM_SLP_S3 ODD_PWR_EN_L (GPIO-22) ENET_PWR_EN(GPIO-42) AP_PWR_EN(GPIO-59) PP3V3_S3 BT PAGE 34 PP3V3_S3_ENET PM_SMC_G2_EN PP12V_S5:Peak 6.9A(83W) PCH SMSC USB Hubx2 SWReg ISL8013A 1A PAGE 78 PP3V3_S3_MINI FET 2.75A/1.1A/0.19A FET 0.25A/0.2A/0.06A PP12V_G3H: FET 7A/2.7A SSD 0.8A HDD 1.8A P5VS0_EN FET 2.9A/1.2A PAGE 80 BOOT ROM PAGE 80 USB_CAMERA USB_IR PM_EN_USB_PWR FET 12V V@1.1A 1.1A/12VPP12V_T29 FANS 0.75A LCD PANEL 0.6A PP12V_S0_FWR 1.2A AUDIO 1.7A PP12V_S0_HDD 1.2A MXM 3.38A(45W TDP) PP12V_S0:Peak 16.9A(203W) 12V_G3H INA219EMC1403 I2C CLK,DATA TEMP SENSOR PAGE 76 8.8AVCCSAPPVCCSA LDO 0.925V@8.8A PAGE 76 SWReg ISL9563A PAGE 76 AIRPORT DP_RDRV 0.7/0.02A ISL62383 3.3V@6.2A PP3V3_S5_REG PAGE 77 P3V3S3_EN ODD 1.5A PAGE 38 ETHERNET SD Card(250mA) MXM 1A Max FIREWIRE FET 3.4A/ 1.9A PCH Lazarus(100mA) PP3V3_S0_SD AUDIO PP3V3_S0 ISL62383 5V@10.3A PP5V_S3_REG 1V05 VCCIO 6.5A (PCH) 1V05 T29 3A (T29) PP1V05_S0 AC/DC POWER SUPPLY (Spec:215W) PAGE 48 SMC VREF VAXG 6.5A CORE 75A CPU VCCIO 8.5A (CPU) 1.1V @ 30A PAGE 71-73 SWreg ISL6364 .65V-1.5V @ 75A/55A PPVCORE/AXG CPU PLL PAGE 46 AUDIO MXM 2.5A PCH FW PAGE 42 CPU MEM AUDIO MEM_VTT PP0V75_S0 TPS2560 PP5V_S0 P3V3S0_EN PAGE 77 MAIN MEMORY PAGE 78 PP1V5_S0 FET 6.2A/3A PM_SLP_S3 PAGE 80 0.75V @ 0.6A PAGE 75 PAGE 78 PP1V5_S3_REG TPS51116, 1.5V 11A/6.7A PP3V3_S5_AVREF_SMC PAGE 50 LDO SN0903048 SMC SW LT3470A PP3V42_G3H_REG PAGE 79 12V LED Power Spec:3.75A (45W) PP1V8_S0_REG BJT 1.0V @ 0.08A PP1V0_FWPHY SYNC_DATE=01/06/2011SYNC_MASTER=K60_JERRY Power Block Diagram 3 OF 110 11.1.0 051-8115 3 OF 98 www.vinafix.vn
BOM OPTIONSBOM GROUP TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_BOMGROUP_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_BOMGROUP_ITEM BOM OPTIONSBOM NAMEBOM NUMBER TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM TABLE_BOMGROUP_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM BOM OPTIONSBOM NAMEBOM NUMBER TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 6 7 BOTTOM 4 3 5 2 TOP POWER GROUND SIGNAL POWER SIGNAL GROUND SIGNAL BOARD STACK-UP SIGNAL K60 ALTERNATE PARTS BOM Variants RAW: 335S0539 CPUS RAW: 335S0709 RAW: 337S3997 COMMON RAW: 335S0550 RAW: 338S0878 RAW: 335S0807 K60 PARTS BOM GROUPS CPU SOCKET & ILM SUB-BOMS SYNC_MASTER=K60_AARON BOM Configuration SYNC_DATE=N/A K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,YES_DBGPCBA,MLB,K60,2.7G,4C,PRQ,P2_ODD639-1820 K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,YES_DBGPCBA,MLB,K60,2.8G,4C,PRQ,P2_ODD639-1821 PCBA,MLB,K60,2.7G,4C,PRQ,P2_ODD,NO_DBG K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,NO_DBG639-2159 PCBA,MLB,K60,2.5G,4C,PRQ,P2_ODD,NO_DBG K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,NO_DBG639-2160 K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,YES_DBGPCBA,MLB,K60,2.5G,4C,PRQ,P2_ODD639-1767 PCBA,MLB,DEV,K60085-0801 DEVELOPMENT,DEV_GROUP BASIC2 AP,BT,IR,T29 BASIC1 COMMON,ALTERNATE,MXM,FCIM,CPU_1V5_SENSE,CPU_VCCSA_SENSE,1V05_PCH_SENSE,HUB_USX2061,PRODUCTION,VAXG,SSD NO_DBG MOJOMUX:NO,LPCPLUS:NO 371S0652 PIN DIODE371S0679 USB DIODE377S0107 377S0066 376S0972 376S0612 ROHM TRA-BJT 128S0293 330UF128S0298 341T0184 1 FLASH,EFI BOOTROM,K60/K62 CRITICALU6100 U3990SFLASH ENET 2MBIT,CIV341T0328 CRITICAL1 T29 ROUTER, IC ASSP T29338S0945 CRITICAL1 U9700 IC,T29,SERIAL EEPROM T29341T0257 CRITICAL1 U9790 IC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25341T0326 T29CRITICALU93301 IC,MXM SYS ROM,24C02 U8570341T0330 1 CRITICAL IC,SMC,K60 CRITICAL1 K60341T0185 U4900 PCBF,MLB,K60 MLB11 K60820-2641 K60SCH,MLB,K60051-8115 SCH11 2P5GHZ_SNB_CPU_PRQSNB,SR00S,PRQ,D2,2.5,65W,4+1,6M,LGA337S4043 CPU1 CRITICAL 2P7GHZ_SNB_CPU_PRQSNB,SR009,PRQ,D2,2.7,65W,4+1,6M,LGA CPU1 CRITICAL337S4062 2P8GHZ_SNB_CPU_PRQCPU1 CRITICALSNB,SR00E,PRQ,D2,2.8,65W,4+1,8M,LGA337S4061 TYCO_SOCKETU1000511S0071 CRITICAL1 SOCKET,LGA1155,CPU-LF ILM604-1474 1 TYCO_SOCKETASSY,PURCHASED,ILM,TYCO CRITICAL U1000 MOLEX_SOCKETCRITICALSOCKET,LGA1155,CPU-LF1511S0073 604-1161 MOLEX_SOCKETILM1 ASSY,PURCHASED,ILM,MOLEX CRITICAL SUB ASSY,CPU SOCKET,K60,TYCO TYCO_SOCKET085-2452 085-2453 SKT_ILM MOLEX ALTERNATE085-2452 CRITICAL1 TYCO CPU SOCKET AND ILM SKT_ILM085-2452 085-2453 MOLEX_SOCKETSUB ASSY,CPU SOCKET,K60,MOLEX DEV_GROUP VREFMRGN_A,VREFMRGN_B,DIMM_1V5_SENSE YES_DBG XDP,XDP_CONN,XDP_CPU_BPM,MOJOMUX:YES,LPCPLUS:YES IC,BCM57765,ENET&SD,8X8 CRITICAL343S0534 1 U3900 MLB LABEL,48.0X4.8 X14 CRITICAL825-7122 1 353S3055 IC,PI3VEDP212,X2 DP MUX,QFN CRITICAL1 U9390 IC,FW643,1394B_PCIE,PHY/LINK U4100 CRITICAL338S0753 1 337S4088 IC,COUGAR POINT,SLJ4F,BD82Z68,PRQ,B31 CRITICALU1800 639-2118 PCBA,MLB,K60,2.5G,4C,PRQ,P1_ODD K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,YES_DBG PCBA,MLB,K60,2.7G,4C,PRQ,P1_ODD639-2122 K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,YES_DBG PCBA,MLB,K60,2.8G,4C,PRQ,P1_ODD K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,YES_DBG639-2119 PCBA,MLB,K60,2.5G,4C,PRQ,P1_ODD,NO_DBG K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,NO_DBG639-2132 PCBA,MLB,K60,2.7G,4C,PRQ,P1_ODD,NO_DBG K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,NO_DBG639-2133 K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,NO_DBG639-2134 PCBA,MLB,K60,2.8G,4C,PRQ,P1_ODD,NO_DBG PCBA,MLB,K60,2.8G,4C,PRQ,P2_ODD,NO_DBG K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,NO_DBG639-2161 4 OF 110 11.1.0 051-8115 4 OF 98 www.vinafix.vn
IN G D SIN G D SIN G D SIN IN G D S G D S IN G D SIN G D SIN G D SIN IN G D S II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 S5 Led SILKSCREEN:1 SILKSCREEN:6 SILKSCREEN:7 SILKSCREEN:8 SILKSCREEN:10 SILKSCREEN:11 VIDEO ON LedMXM PWR GOOD Led SILKSCREEN:4 SILKSCREEN:3 SILKSCREEN:2 SILKSCREEN:9 SILKSCREEN:12 ALL_SYS_PWRGD Led PROTO DEBUG LEDS ARE SHOWN BELOW SILKSCREEN:5 192632364647638297 K A LED550 DEVELOPMENT GREEN-3.6MCD 2.0X1.25MM-SM SILK_PART=VCORE_PGOOD 4 5 3 Q540 SOT-363 2N7002DW-X-G DEVELOPMENT 25646597 K A LED500 2.0X1.25MM-SM DEVELOPMENT GREEN-3.6MCD SILK_PART=SLP_S4 K A LED530 SILK_PART=DDR_PGOOD DEVELOPMENT GREEN-3.6MCD 2.0X1.25MM-SM 2 1 R540 DEVELOPMENT MF-LF 5% 3.3K 1/16W 402 1 2 6 Q520 2N7002DW-X-G SOT-363 DEVELOPMENT 637197 K A LED540SILK_PART=PCHCORE_PGOOD 2.0X1.25MM-SM GREEN-3.6MCD DEVELOPMENT 1 2 6 Q540 SOT-363 2N7002DW-X-G DEVELOPMENT 6497 2 1 R500 3.3K 5% MF-LF DEVELOPMENT 1/16W 402 2 1 R530 DEVELOPMENT 3.3K 5% MF-LF 1/16W 402 2 1 R550 3.3K 5% MF-LF DEVELOPMENT 1/16W 402 2 1 R502 1/16W 5% MF-LF 1K 402 81 K A LED502GREEN-3.6MCD 2.0X1.25MM-SM 4 5 3 Q502 2N7002DW-X-G SOT-363 4 5 3 Q500 DEVELOPMENT SOT-363 2N7002DW-X-G 2 1 R504 5% MF-LF 1/16W 402 1K 326497 K A LED504GREEN-3.6MCD 2.0X1.25MM-SM 2 1 R505 DEVELOPMENT MF-LF 5% 1K 1/16W 402 K A LED505 2.0X1.25MM-SM GREEN-3.6MCD DEVELOPMENT 2 1 R5011K 1/16W 402 MF-LF 5% K A LED501 2.0X1.25MM-SM GREEN-3.6MCD 2 1 R510 402 1/16W DEVELOPMENT 5% 3.3K MF-LF 2 1 R503 402 1K 5% 1/16W MF-LF K A LED503 2.0X1.25MM-SM GREEN-3.6MCD 1 2 6 Q502 2N7002DW-X-G SOT-363212597 2 1 R549 DEVELOPMENT 3.3K MF-LF 5% 1/16W 402 K A LED542 GREEN-3.6MCD 2.0X1.25MM-SM SILK_PART=VAXG_PGOOD DEVELOPMENT 4 5 3 Q520 2N7002DW-X-G SOT-363 DEVELOPMENT 6597 K A LED510SILK_PART=SLP_S3 DEVELOPMENT GREEN-3.6MCD 2.0X1.25MM-SM 2 1 R560 DEVELOPMENT 5% MF-LF 3.3K 1/16W 402 K A LED560 DEVELOPMENT 2.0X1.25MM-SM GREEN-3.6MCD SILK_PART=SLP_S5 4 5 3 Q530 2N7002DW-X-G SOT-363 DEVELOPMENT 1946476397 2 1 C501 20% 0.1UF 10V 402 CERM 193246476397 1 2 6 Q500 SOT-363 DEVELOPMENT 2N7002DW-X-G SYNC_MASTER=K62 SYNC_DATE=01/06/2011 DEBUG LEDS =PP3V3_S5_LED =PP3V3_S5_LED CORE_VOLTAGES_ON PM_PGOOD_PVCORE_CPU =PP3V3_S0_LED GPU_PRESENT_R VIDEO_ON_L PM_LED1_AXG =PP3V3_S0_LED PM_LED_AXG PM_LED_PCHCORE PM_LED1_PCHCORE PGOOD_PCH_S0 MXM_GOOD GPU_PRESENT_DRAIN =PP3V3_S0_LED LCD_SHOULD_ON_R =PP3V3_S0_LED PM_LED1_DDRREG PM_LED_DDRREG PM_LED1_S3 PM_LED_S3 PM_LED1_PVCORE CORE_VOLTAGES_ON_R =PP3V3_S3_LED ITS_PLUGGED_IN PM_PGOOD_DDR1V5_S3_REG PM_LED_PVCORE PM_PGOOD_PVAXG =PP3V3_S3_LED ITS_ALIVE PM_SLP_S4_L PM_LED1_S4 =PP3V3_S5_LED PM_LED_S4 PM_LED_S5 =PP3V3_S5_LED PM_LED1_S5 PM_SLP_S5_L PM_SLP_S3_L ALL_SYS_PWRGD_R =PP3V3_S5_LED =PP3V3_S0_LED 5 OF 110 11.1.0 051-8115 5 OF 98 56 56 56 56 56 56 56 56 56 56 56 56 www.vinafix.vn
IN BI G S D IN G S D BI IN G S D IN IN BI IN II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 3V3 RISES BEFORE MLB TO BLC ISOLATION CIRCUIT FET DIODE IS S TO D MLB 3V3). (FACES BLC WHICH POWER SUPPLY TO MLB "G3H" RAILS T29 RAILS ON IN RUN AND SLEEP BLC SDA/SCL 518S0543 MLB TO PS 518S0813 518-0373 ALWAYS ON WHEN UNIT HAS AC POWER AND IN S5 ONLY ON IN RUN "S0" RAILS "S5" RAILS GND RAILS "S3" RAILS ALWAYS ON WHEN UNIT HAS AC POWER AND IN G3HOT PER SMC G3H: ALIASES 2 1 C602 402 CERM 50V 5% 47PF 21 R602 402 1/16W 0 5% 2 1 C604 CERM 402 50V 47PF 5% 21 R601 402 0 5% 1/16W 2 1 C603 0.001UF 10% X7R 50V 402 PLACE C603 CLOSE TO CONNECTOR 49 49 2 1 C610 603-1 PLACE C610 CLOSE TO CONNECTOR 25V X5R 10% 1UF 21R605 0 402 5%1/16W 6 5 4 3 2 1 J600 M-RT-TH 76833-0106 2 1 3 Q610 2N7002 SOT23-HF1 2 1 C606 X7R PLACE C606 CLOSE TO CONNECTOR 10% 0.001UF 50V 4026397 2 1 C611 PLACE C611 CLOSE TO CONNECTOR 25V X5R 10% 1UF 603-1 7 6 5 4 3 2 1 J601 50293-00771-H01 M-ST-SM CRITICAL 21 R631 0 1/16W 402 5% 2 1 C628 NOSTUFF 402 47PF 5% 50V CERM 8 7 6 5 4 3 2 1 10 9 J602 CRITICAL F-RT-SM 53780-8608 2 1 R620 402 MF-LF 1/16W 5% 021 R622 0 1/16W 402 5% 21 L602 FERR-1000-OHM 0402 2 1 C627 NOSTUFF 47PF 402 5% 50V CERM 21 R630 5% 1/16W 0 402 1 2 6 Q600 2N7002DW-X-G SOT-363 498194 498194 2 1 C621 47PF 5% 402 CERM 50V NOSTUFF 21 R617 1/16W 402 5% 0 NOSTUFF 21 R618 5% 402 0 NOSTUFF 1/16W 4 5 3 Q600 2N7002DW-X-G SOT-363 152191 8197 49 49 2 1 C622 NOSTUFF 50V 5% 402 47PF CERM Power Conn / Alias SYNC_MASTER=K60_MARK SYNC_DATE=12/30/2010 GND MAX_NECK_LENGTH=4.1 MM MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=GND VOLTAGE=0V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM =PP3V3_G3H_LPCPLUS =PP3V3_G3H_SMCUSBMUX =PP3V3_G3H_SMC PP3V42_G3H_REG =PP12V_S5_T29_A =PP12V_S5_PWRCTL =PP12V_S5_P5VS3_VREG PP12V_S5_FET PP5V_S5_LDO =PP5V_S5_PCH NET_SPACING_TYPE=POWER MIN_LINE_WIDTH=0.6MM VOLTAGE=3.42V MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM PP3V42_G3H VOLTAGE=12V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=POWER MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM PP12V_S5 MAKE_BASE=TRUE NET_SPACING_TYPE=POWER VOLTAGE=5V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 mm MAX_NECK_LENGTH=3 MM PP5V_S5 =PP3V3_S5_RSTBUF =PP3V3_S5_PCH_VCCSUS3_3_USB =PP3V3_S0_SMC_LS =PP3V3_S0_SMBUS =PP3V3_S0_ENET_PHY =PP3V3_S0_T29I2C =PP3V3_S0_DP =PP3V3_S0_PCH_VCC3_3_PCI =PP3V3_S0_PCH_PM =PP3V3_S0_P1V05_VREG =PP3V3_S0_PCH_VCC3V3 =PP3V3_S3_VRD =PP3V3_S3_VREFMRGN =PP3V3_S0_DPSDRVA =PP3V3_S0_INTDPMUX =PP1V5_S0_CK505 =PP3V3_S0_SATALED =PP3V3_S0_PCH_VCC3_3_GPIO VOLTAGE=1.5V MIN_LINE_WIDTH=0.4MM NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE PP1V5_S0 =PP1V5_S0_PWR PP1V5_S0_FET =PP1V5_S0_AUD_DIG =PPVCCSA_S0_PWRCTL =PPVCCIO_S0_CPU_VCCSA PPVCCSA_S0_INPUT_SNS MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM VOLTAGE=1.05V MAX_NECK_LENGTH=3 MM MAKE_BASE=TRUE NET_SPACING_TYPE=POWER PP1V05_S0_INPUT_VCCSA =PP3V3_S0_T29PWRCTL =PP3V3_S0_P3V3T29FET =PP3V3_S0_LED =PP3V3_S0_VRD =PP3V3_S0_SDCARD =PP3V3_S0_SMBUS_SMC_BSA =PP3V3_S0_RSTBUF =PP3V3_S0_PCH_VCC3_3_SATA =PP3V3_S0_PCH_STRAPS =PP3V3_S0_PCH_GPIO =PP3V3_S0_FWPHY =PP3V3_S0_PWRCTL =PP3V3_S0_SENSE =PP3V3_S0_ODD =PP3V3_S0_MXM =PP3V3_S0_SMBUS_SMC_0 =PPSPD_S0_MEM_B =PP3V3_S0_PCH PP3V3_S0_FET =PP1V5_S0_CPU_MEM PPVAXG_S0 MAKE_BASE=TRUE VOLTAGE=1.05V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.3MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER PP1V05_S0_REG =PP1V05_S0_PWR PP12V_S0_PS =PP5V_S0_LPCPLUS =PP5V_S3_P3V3R2V9_REG_A =PP5V_S3_VREFMRGN =PP5V_S3_DDR_VREG =PP5V_S3_MEMRESET =PP5V_S3_IR =PP5V_S3_CAMERA MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=POWER VOLTAGE=5V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM PP5V_S3 =PP3V3_S5_CPU_VCCSA =PP3V3_S5_MEMRESET =PP3V3_S5_PCH =PP3V3_S5_PCH_GPIO =PP3V3_S5_PCH_VCCSPI =PP3V3_S5_S3FET =PP3V3_S5_VRD PP3V3_S5_REG NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.25MM MAKE_BASE=TRUE VOLTAGE=1.05V MIN_LINE_WIDTH=0.5MM MAX_NECK_LENGTH=3 MM PP1V05_S0 =PP1V05_S0_PCH_VCCIO_SATA =PP1V05_S0_PCH_VCCIO_PCIE =PP1V05_S0_PCH_VCC_CORE =PP12V_S0_CPU_VCCSA PP12V_S0_MXM_SNS =PP12V_S0_MXM =PP12V_S0_SENSE =PP12V_S0_PWRCTL =PP12V_S0_P1V05_VREG =PP12V_S0_LCD =PP12V_S0_VRD =PP12V_S0_AUDIO_SPKRAMP =PP3V3_SW_DPAPWR =PP3V3_S3_MEMRESET =PP1V05_S0_PCH_VCCADPLLMIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER MIN_LINE_WIDTH=0.6 mm VOLTAGE=1.05V PP1V05_S0_PCH =PPVCCIO_S0_CPU =PPVCCIO_S0_XDP =PP12V_S0_MXM_PWR PP1V5_S3_REG MIN_LINE_WIDTH=0.6MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM VOLTAGE=12V NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM PP12V_S0_MXM =PP1V05_S0_PCH_VCCASW =PP1V05_S0_PCH =PP1V8_S0_PCH =PP5V_S0_P1V8_REG PPVCORE_S0_CPU_REG =PP1V5_S3_MEMRESET =PP1V5_S3_MEM_PWR =PP3V3R1V8_S0_PCH_VCCDFTERM =PP1V8_S0_CPU_PLL =PP0V75_S0_MEM_VTT_A =PPVCORE_S0_CPU =PPVCCSA_S0_INPUT_PWR =PP5V_S0_P1V05_VREG =PP5V_S0_PCH =PP1V05_S0_PCH_VCC_DMI =PP1V05_S0_PCH_PWR =PP1V8R1V5_S0_PCH_VCCVRM =PP1V8_S0_PWRCTL PP1V8_S0_REG PP0V75_S0 MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.4 mm VOLTAGE=0.75V =PP1V05_S0_PCH_V_PROC_IO NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm VOLTAGE=1.5V MAKE_BASE=TRUE PP1V5_S3 =PP12V_S0_SATA PPVAXG_S0_REG =PP3V3_T29_RTR =PP12V_G3H_S5_FET =PP1V05_S0_PCH_VCCSSC =PP0V75_S0_MEM_VTT_B PPVTT_S0_DDR_FET MAX_NECK_LENGTH=3 MM VOLTAGE=1.1V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.3MM NET_SPACING_TYPE=POWER MAKE_BASE=TRUE PPVCORE_S0_CPU =PP5V_S0_MXM =PP5V_S0_AUDIO =PP5V_S0_VRD PP1V05_T29_FET =PP1V05_T29_RTR =PP1V05_T29 MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER VOLTAGE=1.05V MIN_LINE_WIDTH=0.6MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM PP1V05_S0_T29 =PPVCCIO_S0_SMC =PP1V5_S3_S0FET PP3V3_T29_FET =PP1V05_S0_PCH_VCCDIFFCLK PP1V05_S0_PCH_SNS =PP5V_S0_ISENSE =PP1V05_S0_CK505 PP12V_G3H_ACDC MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER MIN_LINE_WIDTH=0.6MM MAKE_BASE=TRUE VOLTAGE=3.3V MIN_NECK_WIDTH=0.2MM PP3V3_S0_T29 =PP0V75_S0_MEM_VTT_S0FET PP5V_S0_FET =PP12V_G3H_3V42 MAKE_BASE=TRUE VOLTAGE=12V MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM PP12V_G3H =PP12V_S0_FAN =PP5V_S0_SATA =PP3V3_S3_LED MAKE_BASE=TRUE VOLTAGE=5V MIN_LINE_WIDTH=0.5 mm NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM PP5V_S0 PP1V5_S3_MEM_SNS NET_SPACING_TYPE=POWER VOLTAGE=1.5V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm MAX_NECK_LENGTH=3 MM PP1V5_S3_MEM =PP3V3_S3_SDCARD =PP3V3_S3_ENET_PHY =PP3V3_S3_USB_HUB =PP3V3_S3_PWRCTL =PP3V3_S3_SMBUS_SMC_A =PP3V3_S0_AUDIO =PP3V3_S5_ROM =PP3V3_S5_PCH_STRAPS =PP3V3_S5_P3V3R2V9_A MAKE_BASE=TRUE NET_SPACING_TYPE=POWER VOLTAGE=3.3V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM PP3V3_S5 =PP3V3_S5_SMCUSBMUX =PP3V3R1V5_S5_PCH_VCCSUSHDA =PP12V_S0_FW NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.5mm MIN_LINE_WIDTH=1mm VOLTAGE=12V MAX_NECK_LENGTH=3 MM MAKE_BASE=TRUE PP12V_S0 =PP1V05_S0_P1V05T29FET =PP1V05_S0_PCH_VCCIO_DMI =PP1V05_S0_PCH_VCCIO_USB =PPVCCSA_S0_CPU MIN_LINE_WIDTH=0.4MM NET_SPACING_TYPE=POWER MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM VOLTAGE=3.3V PP3V3_S0 =PP1V5_S0_MINI PPVTT_S0_DDR_LDO MAKE_BASE=TRUE MIN_LINE_WIDTH=0.5MM NET_SPACING_TYPE=POWER VOLTAGE=1.8V MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25MM PP1V8_S0 =PP3V3_S0_SMBUS_SMC_B =PP3V3_S0_SMBUS_SMC_MGMT NET_SPACING_TYPE=POWER PPVTT_S0_DDR MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM VOLTAGE=0.75V PP12V_G3H_ACDC PP12V_S0_PS PS_ON BL_PWM BL_EN SMB_ACDC_SCL_RC ISOLATED_GND2 =SMB_ACDC_SDA PM_EN_P12V_S0_FET =SMB_ACDC_SCL SMB_BLC_PCH_SDA_R ISOLATED_GND VSYNC_DP_CONN_R BLC_GPIO_R VSYNC_DP_CONN BLC_GPIO =SMB_BLC_PCH_SCL =PP3V3_G3H_RTC_D =PP12V_S5_DDR_VREG =PP3V3_S5_LED =PP3V3_S5_USB_HUB =PP3V3_S5_PCH_VCCDSW =PP3V3_S5_LPCPLUS =PP3V3_S5_XDP =PP3V3_S5_S0FET =PP3V3_S5_PWRCTL SMB_BLC_TCON_SCL =PP1V5_S0_DP =PPVAXG_S0_CPU SMB_BLC_TCON_SCL_R SMB_BLC_TCON_SDA_RSMB_BLC_TCON_SDA SMB_BLC_PCH_SCL_R =PP3V3_S0_CK505 PP1V5_S0_CPU_MEM_SNSPP1V5_S0_CPU_MEM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER VOLTAGE=1.5V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM =SMB_BLC_PCH_SDA =PP3V3_S0_SMBUS SMB_ACDC_SDA_RC VOLTAGE=0.925V MIN_NECK_WIDTH=0.3MM MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM PPVCCSA_S0_CPU PPVCCSA_S0_FET =PP3V3R1V5_S0_PCH_VCCSUSHDA =PPSPD_S0_MEM_A =PP3V3_S0_PCH_VCCADAC =PP3V3_S0_FAN =PP5V_S3_S0FET =PP5V_S3_USB PP5V_S3_REG =PP3V3_S3_SYSCLK =PP3V3_S3_MINI =PP3V3_S3_BT PP3V3_S3_FET =PP1V5_S3_MEM_B =PP1V5_S3_MEM_A =PP3V3_S3_P3V3R2V9_REG_A =PP3V3_S3_PCH VOLTAGE=3.3V MIN_LINE_WIDTH=0.4MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM PP3V3_S3 6 OF 110 11.1.0 051-8115 6 OF 98 48 43 46 47 72 82 33 64 73 70 74 95 70 24 95 95 95 27 22 24 47 51 6 49 36 37 49 81 22 24 27 68 22 24 71 28 84 83 26 18 42 22 24 95 50 73 56 64 69 5095 80 80 5 65 68 45 49 11 27 22 24 15 20 45 39 40 41 63 64 73 80 50 52 42 21 64 75 76 49 31 18 21 24 73 11 13 16 28 29 95 68 50 6 48 82 28 71 32 44 44 9598 69 32 18 19 21 24 20 22 24 73 70 70 95 18 22 24 18 19 22 24 22 24 69 50 75 51 63 64 80 68 81 65 58 59 78 32 17 95 10 11 13 16 65 25 50 71 95 22 24 18 24 79 19 71 66 32 50 22 24 13 16 30 13 16 50 65 50 69 68 24 22 24 50 24 79 64 71 95 22 24 95 42 67 79 80 86 87 74 22 24 31 32 95 75 56 65 67 80 87 80 95 46 47 73 80 22 24 50 50 26 6 95 32 73 72 95 53 54 42 5 9598 5095 44 45 36 34 35 64 73 82 49 56 58 59 60 61 62 48 55 15 82 95 43 24 41 95 80 22 24 22 24 13 50 95 33 71 95 49 49 95 6 6 8397 8197 27 71 5 34 22 24 48 25 73 11 63 64 83 13 17 50 65 26 5095 649 95 69 24 30 47 17 53 54 73 43 70 79 33 44 73 28 29 31 28 29 30 82 21 9598 www.vinafix.vn
REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 MXM STANDOFFS (835-0272) Rear Cover Standoffs (was 860-1255 but now replaced with 860-1430) 4mm Plated Holes (998-0850) DIMM CONNECTOR NUTS Nuts (805-9582) CPU Heatsink PCH HEATSINK MOUNTING HOLES (998-0873, 998-0976) EMC Spring (870-1577); Near DIMMs For EMC 1 ZH0700 OMIT 4P75R4 1 ZH0701 OMIT 4P75R4 1 ZH0702 OMIT 4P75R4 1 ZH0703 OMIT 4P75R4 1 SC0702 NOSTUFF EMI-SPRING CLIP-SM-K2 1 SDF0713 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 NUT0753 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 NUT0752 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 NUT0751 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 NUT0750 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 SDF0714 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 SDF0715 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 SDF0717 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 SDF0718 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 ZH0711 OMIT 5P45R3P6 1 ZH0712 5P45R3P6 OMIT 1 SDF0721 CRITICAL NUT-6.5OD2.7H-1.56-3.8-TH 1 SDF0720 NUT-6.5OD2.7H-1.56-3.8-TH CRITICAL Holes SYNC_MASTER=K74_MASTER SYNC_DATE=N/A STANDOFF,MLB,K60/K62860-1430 5 SDF0713,SDF0714,SDF0715,SDF0717,SDF0718 7 OF 110 11.1.0 051-8115 7 OF 98 www.vinafix.vn
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 NC ON UNUSED PCI ALIASES UNUSED CPU SIGNALS NC ON UNUSED MISC ALIASES NC ON UNUSED FDI ALIASES NC ON UNUSED MEM ALIASES NC ON UNUSED DISPLAY ALIASES NC ON UNUSED USB ALIASES NC ON UNUSED SATA ALIASES NC ON UNUSED PCIE ALIASES SYNC_DATE=01/06/2011 UNUSED SIGNAL ALIAS SYNC_MASTER=K62 TP_CRT_IG_HSYNC NC_DP_IG_C_AUXN NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_C_HPD TP_SATA_E_R2D_CN TP_SATA_D_D2RN TP_SATA_F_D2RN NC_PE_RXN<3..0> NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_B_MLN<3..0> TP_DP_IG_B_MLP<3..0> TP_DP_IG_B_AUX_N TP_DP_IG_B_AUX_P MAKE_BASE=TRUE NO_TEST=TRUE NC_DP_IG_B_HPD MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_CLK100M_PE5N MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_R2D_PETP4 TP_PCIE_D2R_PERP4 TP_PCIE_R2D_PETP4 TP_PCIE_R2D_PETN4 NC_PCIE_R2D_PETN4 NO_TEST=TRUEMAKE_BASE=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_D2R_PERN4 NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_D2R_PERP4 TP_USB_13N MAKE_BASE=TRUE NC_USB_13N NO_TEST=TRUE TP_USB_13P MAKE_BASE=TRUE NC_USB_13P NO_TEST=TRUE TP_USB_12P NC_USB_12P MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_12N NC_USB_12N NO_TEST=TRUEMAKE_BASE=TRUE TP_USB_11P NO_TEST=TRUE NC_USB_11P MAKE_BASE=TRUE TP_USB_11N MAKE_BASE=TRUE NC_USB_11N NO_TEST=TRUE TP_USB_10N NC_USB_10N MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_10P NC_USB_10P MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_7N MAKE_BASE=TRUE NO_TEST=TRUE NC_USB_7N TP_USB_7P NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_7P TP_USB_6P NO_TEST=TRUE NC_USB_6P MAKE_BASE=TRUE TP_USB_6N MAKE_BASE=TRUE NO_TEST=TRUE NC_USB_6N TP_USB_5N NC_USB_5N MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_5P NO_TEST=TRUE NC_USB_5P MAKE_BASE=TRUE TP_USB_4P NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_4P TP_USB_3P NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_3P TP_USB_4N NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_4N TP_USB_3N NC_USB_3N NO_TEST=TRUEMAKE_BASE=TRUE TP_USB_2P NO_TEST=TRUE NC_USB_2P MAKE_BASE=TRUE TP_USB_2N MAKE_BASE=TRUE NO_TEST=TRUE NC_USB_2N TP_USB_1P NO_TEST=TRUE NC_USB_1P MAKE_BASE=TRUE TP_USB_1N NO_TEST=TRUE NC_USB_1N MAKE_BASE=TRUE TP_CRT_IG_BLUE TP_PCI_RESET_L MAKE_BASE=TRUE NC_PCI_RESET_L NO_TEST=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_PCI_AD<31..0> NC_PCI_PAR NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_B_DDC_DATA MAKE_BASE=TRUE NC_MEM_A_DQ_CB<7..0> NO_TEST=TRUE TP_PE_RX_N<3..0> NC_PE_TXN<3..0> NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_C_CTRL_CLK TP_PCH_FDI_RX_P<7..0> NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_B_MLP<3..0> NO_TEST=TRUE NC_DP_IG_B_AUXN MAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_VSYNC NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_B_MLN<3..0> TP_PCI_C_BE_L<3..0> TP_PCH_L_BKLTCTL TP_PCH_L_BKLTEN TP_PCH_L_VDD_EN TP_SDVO_TVCLKINN NC_SDVO_TVCLKINP NO_TEST=TRUEMAKE_BASE=TRUE TP_PCH_FDI_RX_N<7..0> TP_CPU_FDI_TX_N<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_D2RN NC_PCH_FDI_RXN<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_CLK100M_PE7N NO_TEST=TRUEMAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_CLK100M_PE7P MAKE_BASE=TRUE TP_DP_IG_B_HPD TP_DP_IG_C_AUX_N TP_CRT_IG_DDC_DATA TP_MEM_A_DQS_N<8> MAKE_BASE=TRUE NC_MEM_A_DQSN<8> NO_TEST=TRUE TP_MEM_A_DQ_CB<7..0> MAKE_BASE=TRUE NC_PCH_CL_RST1 NO_TEST=TRUE TP_PCH_SST TP_PCH_PWM2 MAKE_BASE=TRUE NC_PCH_L_BKLTEN NO_TEST=TRUE TP_PCH_CLKOUT_DPN TP_PCH_CLKOUT_DPP NC_PCH_CLKOUT_DPN MAKE_BASE=TRUE NO_TEST=TRUE NC_PCH_CLKOUT_DPP NO_TEST=TRUEMAKE_BASE=TRUE NC_PCH_L_VDD_EN NO_TEST=TRUEMAKE_BASE=TRUE TP_SATA_E_R2D_CP TP_SATA_F_R2D_CN TP_SATA_F_R2D_CPMAKE_BASE=TRUE NO_TEST=TRUE NC_DP_IG_D_MLN<3..0> NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_F_D2RN NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_E_R2D_CP NC_SATA_E_R2D_CN NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_E_D2RP MAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_R2D_CP NO_TEST=TRUEMAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_R2D_CN MAKE_BASE=TRUE MAKE_BASE=TRUE NC_SATA_E_D2RN NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_D2RP TP_SATA_E_D2RP TP_SATA_D_D2RP TP_SATA_E_D2RN TP_SATA_D_R2D_CP TP_SATA_D_R2D_CN TP_SATA_F_D2RP NO_TEST=TRUEMAKE_BASE=TRUE NC_PCH_FDI_RXP<7..0> TP_CPU_FDI_TX_P<7..0> NC_CPU_FDI_TXN<7..0> NO_TEST=TRUEMAKE_BASE=TRUE MAKE_BASE=TRUE NC_SDVO_TVCLKINN NO_TEST=TRUE NC_DP_IG_D_CTRL_CLK NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_D_AUXN MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_D_MLP<3..0> NO_TEST=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_C_CTRL_DATA NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_C_HPD NC_DP_IG_B_CTRL_DATA MAKE_BASE=TRUE NO_TEST=TRUE NC_DP_IG_B_CTRL_CLK NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_HSYNC NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_BLUE MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_CRT_IG_GREEN NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_CRT_IG_DDC_DATA TP_CRT_IG_RED TP_MEM_B_DQS_P<8> NC_HDA_SDIN1 MAKE_BASE=TRUE NO_TEST=TRUE TP_DP_IG_D_HPD TP_DP_IG_D_CTRL_DATA TP_SDVO_STALLN TP_DP_IG_D_MLP<3..0> TP_DP_IG_C_CTRL_DATA TP_DP_IG_C_AUX_P TP_DP_IG_C_MLP<3..0> TP_DP_IG_C_MLN<3..0> TP_DP_IG_B_DDC_CLK TP_CRT_IG_VSYNC NO_TEST=TRUE NC_PCH_PWM0 MAKE_BASE=TRUE NC_HDA_SDIN3 MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_HDA_SDIN2 NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_MEM_B_DQSP<8> MAKE_BASE=TRUE NO_TEST=TRUE NC_MEM_B_DQSN<8>TP_MEM_B_DQS_N<8> NC_MEM_B_DQ_CB<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_MEM_A_DQSP<8> MAKE_BASE=TRUE NO_TEST=TRUE TP_MEM_A_DQS_P<8> TP_PCH_PWM1 TP_HDA_SDIN1 TP_MEM_B_DQ_CB<7..0> TP_HDA_SDIN3 TP_HDA_SDIN2 NC_SATA_F_D2RP NO_TEST=TRUEMAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_D_CTRL_DATA NC_SATA_F_R2D_CP MAKE_BASE=TRUE NO_TEST=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_F_R2D_CN NC_DP_IG_D_HPD MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_C_AUXP NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_C_MLN<3..0> NO_TEST=TRUE MAKE_BASE=TRUE NC_CPU_FDI_TXP<7..0> NO_TEST=TRUE NC_DP_IG_C_MLP<3..0> MAKE_BASE=TRUE NO_TEST=TRUE TP_DP_IG_D_CTRL_CLK TP_DP_IG_D_AUXP MAKE_BASE=TRUE NC_DP_IG_C_CTRL_CLK NO_TEST=TRUE NC_DP_IG_D_AUXP MAKE_BASE=TRUE NO_TEST=TRUE NO_TEST=TRUE NC_SDVO_STALLN MAKE_BASE=TRUE TP_SDVO_INTP TP_SDVO_INTN TP_SDVO_STALLP MAKE_BASE=TRUE NC_SDVO_INTP NO_TEST=TRUE NO_TEST=TRUE NC_SDVO_INTN MAKE_BASE=TRUE NC_PCH_L_BKLTCTL MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_B_AUXP NO_TEST=TRUE TP_DP_IG_D_AUXN NC_SDVO_STALLP MAKE_BASE=TRUE NO_TEST=TRUE TP_PCH_PWM3 NO_TEST=TRUE NC_PCH_SST MAKE_BASE=TRUE NO_TEST=TRUE NC_PCH_PWM3 MAKE_BASE=TRUE TP_PCH_CL_DATA1 TP_PCH_CL_RST1 NO_TEST=TRUEMAKE_BASE=TRUE NC_PCH_PWM2 MAKE_BASE=TRUE NC_PCH_PWM1 NO_TEST=TRUE TP_PCH_PWM0 NC_PCH_CL_DATA1 NO_TEST=TRUEMAKE_BASE=TRUE TP_PCH_CL_CLK1 NC_PCH_CL_CLK1 NO_TEST=TRUEMAKE_BASE=TRUE TP_PCI_AD<31..0> TP_LPC_DREQ0_L NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_DDC_CLK TP_DP_IG_D_MLN<3..0> TP_CRT_IG_DDC_CLK MAKE_BASE=TRUE NO_TEST=TRUE NC_PE_RXP<3..0>TP_PE_RX_P<3..0> TP_PE_TX_N<3..0> NC_PE_TXP<3..0> NO_TEST=TRUEMAKE_BASE=TRUE MAKE_BASE=TRUE NC_CRT_IG_RED NO_TEST=TRUE NO_TEST=TRUE NC_PCI_C_BE_L<3..0> MAKE_BASE=TRUE TP_SDVO_TVCLKINP TP_CRT_IG_GREEN TP_PCIE_CLK100M_PE5P TP_PCIE_CLK100M_PE5N TP_PCIE_CLK100M_PE6P TP_PCIE_CLK100M_PE6N NO_TEST=TRUE NC_PCIE_CLK100M_PE5P MAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_CLK100M_PE6P NC_PCIE_CLK100M_PE6N NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_CLK100M_PE4N NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_CLK100M_PE4P MAKE_BASE=TRUE NO_TEST=TRUE TP_PCIE_CLK100M_PE4N TP_PCIE_CLK100M_PE4P TP_PCIE_CLK100M_PE7N TP_PCIE_CLK100M_PE7P TP_CPU_RSVD<46..19> TP_CPU_RSVD<16..1> NO_TEST=TRUEMAKE_BASE=TRUE NC_CPU_RSVD<16..1> MAKE_BASE=TRUE NO_TEST=TRUE NC_CPU_RSVD<46..19> TP_PCI_PAR NO_TEST=TRUEMAKE_BASE=TRUE NC_LPC_DREQ0_L TP_PCIE_D2R_PERN4 TP_PE_TX_P<3..0> 8 OF 110 11.1.0 051-8115 8 OF 98 19 19 18 18 18 19 19 19 19 18 18 18 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 19 20 19 10 19 19 20 18 18 18 19 19 10 19 19 19 12 12 21 21 18 18 18 18 18 18 18 18 18 18 18 10 19 12 19 19 19 19 19 19 19 19 19 19 12 12 21 18 12 18 18 19 19 19 19 19 19 21 18 18 21 18 20 18 19 19 10 10 19 19 18 18 21 21 18 18 21 21 10 10 20 18 10 www.vinafix.vn
OUT OUTIN IN IN IN OUT OUT IN IN IN OUT OUTIN OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 THIS SIGNAL NAME IS CONNECTED TO MXM PEG Slot Support 77 90 77 9010 10 77 90 77 90 10 10 18 18 199197 21 R929 PLACEMENT_NOTE=PLACE CLOSE TO U1800 1/16W 5% MF-LF 22 402 46 91 97 75 9721 75 75 SYNC_DATE=01/06/2011SYNC_MASTER=K62 Signal Aliases CLK_100M_MXM_P MAKE_BASE=TRUE PEG_RESET_LMXM_RESET_L PEG_CLK100M_P PM_CLK32K_SUSCLK_R PM_CLK32K_SUSCLK =PEG_D2R_P<0..15> MAKE_BASE=TRUE PEG_D2R_P<0..15> =PEG_R2D_C_N<0..15> =PEG_D2R_N<0..15> MAKE_BASE=TRUE MXM_CLKREQ_LPEG_CLKREQ_L =PEG_R2D_C_P<0..15> MAKE_BASE=TRUE GPU_CLK100M_PCIE_N MAKE_BASE=TRUE PEG_R2D_C_P<0..15> MAKE_BASE=TRUE PEG_R2D_C_N<0..15> CLK_100M_MXM_N MAKE_BASE=TRUE PEG_D2R_N<0..15> GPU_CLK100M_PCIE_P MAKE_BASE=TRUE PEG_CLK100M_N 9 OF 110 11.1.0 051-8115 9 OF 98 27 9775 90 90 www.vinafix.vn
IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN PEG_TX_6* PEG_RX_5* PEG_RX_0* PEG_RX_2* PEG_RX_7* PEG_RX_8* PEG_RX_9* PEG_RX_10* PEG_RCOMPO PEG_RX_14 PEG_RX_13 PEG_RX_6* PEG_RX_12* PEG_RX_14* PEG_RX_1 PEG_ICOMPO PEG_COMPI FDI_INT FDI_ICOMPO FDI_COMPIO DMI_RX_0 DMI_RX_0* DMI_RX_1 DMI_RX_1* DMI_RX_2 DMI_RX_2* DMI_RX_3 DMI_RX_3* DMI_TX_0 DMI_TX_0* DMI_TX_1 DMI_TX_2 DMI_TX_2* DMI_TX_3 DMI_TX_3* FDI_FSYNC_0 FDI_FSYNC_1 FDI_LSYNC_0 FDI_LSYNC_1 FDI_TX_0 FDI_TX_0* FDI_TX_1 FDI_TX_1* FDI_TX_2 FDI_TX_2* FDI_TX_3 FDI_TX_3* FDI_TX_4 FDI_TX_4* FDI_TX_5 FDI_TX_5* FDI_TX_6 FDI_TX_6* FDI_TX_7 FDI_TX_7* PEG_RX_0 PEG_RX_1* PEG_RX_2 PEG_RX_3 PEG_RX_3* PEG_RX_4 PEG_RX_4* PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_11* PEG_RX_12 PEG_RX_13* PEG_RX_15 PEG_RX_15* PEG_TX_0 PEG_TX_0* PEG_TX_1 PEG_TX_1* PEG_TX_2 PEG_TX_2* PEG_TX_3 PEG_TX_3* PEG_TX_4 PEG_TX_4* PEG_TX_5 PEG_TX_5* PEG_TX_6 PEG_TX_7 PEG_TX_7* PEG_TX_8 PEG_TX_8* PEG_TX_9 PEG_TX_9* PEG_TX_10 PEG_TX_10* PEG_TX_11 PEG_TX_11* PEG_TX_12 PEG_TX_12* PEG_TX_13 PEG_TX_13* PEG_TX_14 PEG_TX_14* PEG_TX_15 PEG_TX_15* PE_RX_0 PE_RX_0* PE_RX_1 PE_RX_1* PE_RX_2 PE_RX_2* PE_RX_3 PE_RX_3* PE_TX_0 PE_TX_0* PE_TX_1 PE_TX_1* PE_TX_2 PE_TX_2* PE_TX_3 PE_TX_3* DMI_TX_1* PCIEXPRESSDMIFLEXIBLEDISPLAYINTERFACE (1 OF 10) PCIEXPRESS--GRAPHICS RSVD_C39 RSVD_D38 RSVD_C38 RSVD_H7 RSVD_H8 RSVD_J9 RSVD_AY10 RSVD_AW34 RSVD_AV34 RSVD_AU10 RSVD_AT14 RSVD_AT11 RSVD_AP20 RSVD_AN20 RSVD_AJ31 RSVD_AJ30 RSVD_AJ29 RSVD_AJ11 RSVD_AG4 RSVD_AF4 RSVD_AE6 RSVD_AD37 RSVD_AD35 RSVD_AD34 RSVD_AB7 RSVD_AB6 RSVD_R40 RSVD_R38 RSVD_R36 RSVD_R34 RSVD_P39 RSVD_P37 RSVD_P35 RSVD_N34 RSVD_N33 RSVD_M34 RSVD_L34 RSVD_L33 RSVD_L31 RSVD_L9 RSVD_K34 RSVD_K31 RSVD_K9 CFG_17 CFG_16 CFG_15 CFG_14 CFG_13 CFG_12 CFG_11 CFG_10 CFG_9 CFG_7 CFG_6 CFG_5 CFG_4 CFG_3 CFG_2 CFG_1 CFG_0 RSVD_J31 RSVD_J33 RSVD_J34 CFG_8 NCTF_A38 NCTF_C2 NCTF_D1 NCTF_AU40 NCTF_AW38 RSVD_NCTF_B39 RSVD_NCTF_AY3 RSVD_NCTF_AW2 RSVD_NCTF_AV1 RESERVED (5 OF 10) OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (Unused) ThermDC ThermDA SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4 MIL TRACE TO R1010.1 ROUTE B5 TO R1010.1 AS A SEPERATE 10 MIL TRACE. FOR SANDYBRIDGE PROCESSOR CFG [6:5] :PCIE CONFIGURATION SELECT 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4 INTEL SUGGESTS TO KEEP THESE TPS CFG [2] :PCIE LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED (AvailableforWorkstationonly) 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 21 R1010 MF-LF 1% 1/16W 24.9 402 PLACEMENT_NOTE=Place within 12.7MM of CPU 152590 152590 2590 2590 2590 2590 2590 2590 2590 2590 2590 152590 152590 2590 152590 152590 152590 2590 G9 G10 F7 F8 E5 E6 C3 D3 D7 D8 J13 J14 F11 F12 G13 G14 N6 N5 L5 L6 M7 M8 J6 J5 K8 K7 G6 G5 E13 E14 C14 C13 G1 G2 F3 F4 E1 E2 A6 A5 C5 C6 B7 B8 E9 E10 C9 C10 N2 N1 M4 M3 L2 L1 K4 K3 J2 J1 H4 H3 D11 D12 B12 B11 C4 B5 B4 U6 U5 R5 R6 T8 T7 P7 P8 U1 U2 T3 T4 R1 R2 P4 P3 AG1 AG2 AF2 AF3 AE8 AE7 AD6 AD7 AD3 AD4 AD1 AD2 AC3 AC2 AC7 AC8 AE4 AC4 AG3 AE1 AE5 AC5 AE2 AA8 AA7 Y7 Y6 W8 W7 V6 V7 AA5 AA4 Y4 Y3 V4 V3 W4 W5 U1000 LGA1155-SKT SANDY_BRIDGE OMIT R40 R38 R36 R34 P39 P37 P35 B39 AY3 AW2 AV1 N34 N33 M34 L9 L34 L33 L31 K9 K34 K31 J9 J34 J33 J31 H8 H7 D38 C39 C38 AY10 AW34 AV34 AU10 AT14 AT11 AP20 AN20 AJ31 AJ30 AJ29 AJ11 AG4 AF4 AE6 AD37 AD35 AD34 AB7 AB6 D1 C2 AW38 AU40 A38 L35 J38 M36 L37 N35 L36 K36 J37 G36 G37 N40 N37 N39 N38 N36 M38 J36 H36 U1000 SANDY_BRIDGE LGA1155-SKT OMIT 5294 5294 2 1 R1011 PLACEMENT_NOTE=Place within 12.7MM of CPU 402 1/16W MF-LF 5% 0 CPU DMI/PEG/FDI/RSVD TP_CPU_FDI_TX_P<6> TP_CPU_RSVD_NCTF<3> TP_CPU_NCTF<2> TP_CPU_NCTF<3> CPU_CFG<6> CPU_CFG<5> =PEG_R2D_C_P<6> =PEG_R2D_C_P<8> DMI_N2S_N<0> TP_CPU_FDI_TX_N<6> TP_CPU_FDI_TX_N<4> DMI_S2N_P<2> DMI_S2N_P<3> CPU_FDI_LSYNC<0> TP_PE_RX_N<1> TP_PE_TX_P<1> TP_PE_TX_N<1> TP_PE_RX_P<3> TP_PE_RX_P<2> TP_PE_RX_P<1> CPU_FDI_INT DMI_S2N_N<0> DMI_S2N_P<1> DMI_S2N_P<0> TP_PE_TX_P<2> TP_PE_TX_N<3> CPU_CFG<8> =PEG_R2D_C_P<3> TP_CPU_RSVD<8> CPU_CFG<13> CPU_CFG<9> TP_CPU_RSVD<35> CPU_CFG<11> TP_CPU_RSVD<36> TP_PE_TX_N<2> TP_PE_TX_N<0> TP_PE_RX_P<0> =PEG_R2D_C_N<9> TP_CPU_FDI_TX_P<2> TP_CPU_FDI_TX_P<1> TP_CPU_FDI_TX_P<0> CPU_FDI_FSYNC<1> DMI_N2S_P<1> CPU_FDI_LSYNC<1> =PEG_R2D_C_P<11> =PEG_R2D_C_P<13> TP_CPU_RSVD<38> TP_CPU_RSVD<5> TP_CPU_RSVD<28> TP_CPU_RSVD<21> TP_CPU_RSVD<10> CPU_CFG<12> TP_CPU_NCTF<4> TP_CPU_RSVD<41> TP_CPU_RSVD<39> CPU_CFG<1> TP_CPU_RSVD<23> CPU_CFG<10> TP_CPU_RSVD<40> TP_CPU_RSVD<20> TP_CPU_RSVD<34> TP_CPU_RSVD<37> TP_CPU_RSVD<16> TP_CPU_RSVD<15> TP_CPU_RSVD<14> SNS_CPU_THERMD_N SNS_CPU_THERMD_P TP_CPU_FDI_TX_N<7> TP_CPU_RSVD<25> TP_CPU_RSVD<26> TP_CPU_FDI_TX_N<1> =PEG_R2D_C_P<5> =PEG_R2D_C_N<11> TP_CPU_FDI_TX_N<2> DMI_S2N_N<3> TP_CPU_FDI_TX_P<5> TP_CPU_FDI_TX_N<5> DMI_N2S_P<2> TP_PE_TX_P<3> =PEG_R2D_C_P<1> =PEG_R2D_C_P<9> TP_PE_RX_N<3> TP_PE_RX_N<2> TP_CPU_RSVD<22> =PEG_D2R_P<9> TP_CPU_FDI_TX_N<0> TP_CPU_FDI_TX_P<7> CPU_FDI_FSYNC<0> TP_PE_RX_N<0> TP_PE_TX_P<0> TP_CPU_RSVD<29> TP_CPU_RSVD<27> TP_CPU_RSVD<33> TP_CPU_RSVD<19> TP_CPU_RSVD<32> TP_CPU_RSVD<31> DMI_N2S_P<0> DMI_N2S_N<1> DMI_N2S_N<2> TP_CPU_RSVD<9> CPU_CFG<17> =PEG_R2D_C_P<2> TP_CPU_RSVD<46> TP_CPU_RSVD<45> TP_CPU_RSVD<43> TP_CPU_RSVD<42> TP_CPU_RSVD_NCTF<1> TP_CPU_NCTF<5> TP_CPU_FDI_TX_N<3> MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=CPU_RCOMP MIN_NECK_WIDTH=0.2MM CPU_FDI_COMPIO =PEG_R2D_C_N<6> =PEG_R2D_C_P<15> =PEG_R2D_C_P<14> =PEG_R2D_C_P<12> =PEG_R2D_C_P<7> =PEG_R2D_C_N<10> =PEG_R2D_C_N<8> =PEG_R2D_C_N<7> =PEG_D2R_P<10> =PEG_D2R_P<6> =PEG_R2D_C_P<4> =PEG_D2R_P<3> =PEG_R2D_C_N<2> =PEG_D2R_N<14> DMI_S2N_N<2> DMI_S2N_N<1> DMI_N2S_N<3> =PEG_R2D_C_N<4> =PEG_R2D_C_N<1> TP_CPU_FDI_TX_P<4> DMI_N2S_P<3> =PEG_D2R_P<1> =PEG_D2R_P<4> =PEG_D2R_N<13> =PEG_D2R_N<11> =PEG_D2R_N<1> =PEG_D2R_P<8> =PEG_D2R_N<4> =PEG_D2R_N<3> =PEG_D2R_N<6> =PEG_D2R_N<5> =PEG_D2R_P<0> =PEG_D2R_N<15> =PEG_R2D_C_N<0> =PEG_D2R_P<15> =PEG_D2R_P<14> =PEG_D2R_P<12> =PEG_D2R_P<11> =PEG_R2D_C_P<10> =PEG_R2D_C_P<0> =PEG_R2D_C_N<15> =PEG_R2D_C_N<14> =PEG_R2D_C_N<13> =PEG_R2D_C_N<12> =PEG_D2R_N<12> =PEG_D2R_N<8> =PEG_D2R_N<7> CPU_PEG_COMP NET_SPACING_TYPE=CPU_RCOMP MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM =PEG_D2R_N<0> =PEG_D2R_N<2> TP_CPU_RSVD<13> TP_CPU_RSVD<12> TP_CPU_RSVD<11> TP_CPU_RSVD<7> TP_CPU_RSVD<30> TP_CPU_RSVD<2> =PPVCCIO_S0_CPU =PEG_D2R_P<2> =PEG_D2R_P<7> =PEG_D2R_P<5> TP_CPU_RSVD_NCTF<2> TP_CPU_RSVD_NCTF<4> TP_CPU_NCTF<1> CPU_CFG<16> CPU_CFG<15> CPU_CFG<14> CPU_CFG<7> CPU_CFG<3> CPU_CFG<2> CPU_CFG<0> CPU_CFG<4> TP_CPU_RSVD<44> =PEG_D2R_N<10> =PEG_D2R_N<9> TP_CPU_RSVD<6> TP_CPU_RSVD<4> TP_CPU_RSVD<3> TP_CPU_RSVD<1> TP_CPU_RSVD<24> =PEG_D2R_P<13> TP_CPU_FDI_TX_P<3> =PEG_R2D_C_N<3> =PEG_R2D_C_N<5> 10 OF 110 11.1.0 051-8115 10 OF 98 8 8 8 15 8 8 8 8 8 8 15 8 8 8 8 8 8 8 8 8 8 8 15 15 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 15 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 90 8 8 8 8 8 8 6 11 13 16 65 8 8 8 8 8 8 8 www.vinafix.vn
BI BI BI BI BI IN IN OUT IN IN OUT OUT BI BI G D S IN NC IN IN OUT IN IN IN OUT IN IN IN IN IN FC_AH4 FC_AH1 SM_VREF SM_DRAMRST* SM_DRAMPWROK PM_SYNC PREQ* TMS TRST* TDI TDO DBR* BPM[0]* BPM[1]* BPM[2]* BPM[3]* BPM[4]* BPM[5]* BPM[6]* BPM[7]* TCK PRDY* BCLK_ITP BCLK_0 BCLK_ITP* BCLK_0* UNCOREPWRGOOD SKTOCC* RESET* THERMTRIP* CATERR* PECI PROCHOT* PROC_SEL THERMALDDR3MISCPWRMGMT CLOCKS (2 OF 10) JTAG&BPM OUT OUT BI BI BI II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PM_MEM_PWRGD MUST ASSERT MIN. 100ns AFTER =PP1V5_S0_CPU_MEM IS STABLE CAN ADJUST R1190 AND C1180 OPEN-DRAIN BUFFER FROM PCH BASED ON INTEL MOBILE SOLUTION 25 90 25 90 25 90 25 90 25 90 2 1 R1111 MF-LF 1/16W 402 5% 1K 2889 212597 2 1 C1111 NOSTUFF 402 16V X5R 10% 0.1UF 2 1C1110 16V 0.1UF NOSTUFF 10% X5R 402 3297 18 90 18 90 1997 4797 476597 214697 2 1 R1126 1/16W MF-LF 402 NOSTUFF 5% 0 2 1 R1124 PLACEMENT_NOTE=PLACE WITHIN 2 INCHES OF CPU 402 5% MF-LF 1/16W 75 2 1 R1121 1% 402 MF-LF 121 1/16W 2 1 R1120 402 200 1% 1/16W MF-LF 1 2 6 Q1180 SOT-563 DMB53D0UV 1997 2 1 R1183 4.7K 402 MF-LF 1/16W 5% 4 3 5 Q1180 SOT-563 DMB53D0UV 2 1C1180 0.015UF 16V 402 10% X7R 2 1 R1190 402 5% 1/16W MF-LF 12K 4 5 3 2 U1190 74LVC1G07 SC70 2 1C1190 402 20% 10V CERM 0.1UF 647397 2 1 R1101 MF-LF 402 51 5% 1/16W 2 1 R1100 1K 1/16W 402 MF-LF 5% NOSTUFF 25 25 25 90 25 90 25 90 25 90 25 90 18 90 18 90 1997 2 1 R1104 1/16W 402 MF-LF 5% 51 NOSTUFF 2 1 R1125 1/16W MF-LF 402 5% 43 2797 J40 J39 L38 G35 L39 L40 M40 AJ22 AW18 AJ19 AJ33 F36 H34 K32 K40 K38 E38 J35 AH4 AH1 E39 E37 F40 E40 F38 G39 G40 G38 H38 H40 D40 C40 W1 W2 U1000 SANDY_BRIDGE LGA1155-SKT OMIT 6397 2 1 R1102 402 NOSTUFF 1K MF-LF 5% 1/16W 25 97 25 90 25 90 25 90 CPU CLOCK/MISC/JTAG ITPCPU_CLK100M_P ITPCPU_CLK100M_N DMI_CLK100M_CPU_P DMI_CLK100M_CPU_N XDP_CPU_PRDY_L XDP_CPU_PREQ_L XDP_CPU_TCK XDP_CPU_TMS XDP_CPU_TRST_L XDP_CPU_TDI XDP_CPU_TDO XDP_DBRESET_L XDP_BPM_L<0> XDP_BPM_L<1> XDP_BPM_L<2> XDP_BPM_L<3> XDP_BPM_L<4> XDP_BPM_L<5> XDP_BPM_L<6> XDP_BPM_L<7> CPU_PROC_SEL CPU_CATERR_L CPU_SKTOCC_L PM_SYNC CPU_MEM_RESET_L CPU_DDR_VREF CPU_PECI CPU_PROCHOT_L CPU_THRMTRIP_L CPU_PWRGD CPU_RESET_L PM_MEM_PWRGD_L PM_PGOOD_P1V5_S0_FET =PPVCCIO_S0_CPU TP_CPU_DIMM_VREF_A TP_CPU_DIMM_VREF_B PLT_RESET_LS1V05_L PGOOD_P1V5_S0_DLY PM_MEM_PWRGD_R=PP1V5_S0_CPU_MEM =PPVCCIO_S0_CPU =PP3V3_S5_PWRCTL =PP3V3_S0_RSTBUF NO_TEST=TRUE NC_U1190_P1 =PP3V3_S0_RSTBUF PM_MEM_PWRGD 11 OF 110 11.1.0 051-8115 11 OF 98 1 97 97 61011131665 97 97 97 613162829 61011131665 66364 61127 61127 www.vinafix.vn
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT DDRSYSTEMMEMORYA (3 OF 10) SA_ODT_3 SA_MA_9 SA_MA_8 SA_MA_7 SA_MA_6 SA_MA_5 SA_MA_4 SA_MA_3 SA_MA_2 SA_MA_15 SA_MA_14 SA_MA_13 SA_MA_12 SA_MA_11 SA_MA_10 SA_MA_1 SA_MA_0 SA_ECC_CB_7 SA_ECC_CB_6 SA_ECC_CB_5 SA_ECC_CB_4 SA_ECC_CB_3 SA_ECC_CB_2 SA_ECC_CB_1 SA_ECC_CB_0 SA_DQS_8 SA_DQS_7* SA_DQS_7 SA_DQS_6* SA_DQS_6 SA_DQS_5* SA_DQS_5 SA_DQS_4* SA_DQS_4 SA_DQS_3* SA_DQS_3 SA_DQS_2* SA_DQS_2 SA_DQS_1* SA_DQS_1 SA_DQS_0* SA_DQS_0 SA_DQ_8 SA_DQ_7 SA_DQ_6 SA_DQ_59 SA_DQ_58 SA_DQ_57 SA_DQ_56 SA_DQ_55 SA_DQ_54 SA_DQ_53 SA_DQ_52 SA_DQ_51 SA_DQ_50 SA_DQ_5 SA_DQ_49 SA_DQ_48 SA_DQ_47 SA_DQ_46 SA_DQ_45 SA_DQ_44 SA_DQ_43 SA_DQ_42 SA_DQ_41 SA_DQ_40 SA_DQ_4 SA_DQ_39 SA_DQ_38 SA_DQ_37 SA_DQ_36 SA_DQ_35 SA_DQ_34 SA_DQ_31 SA_DQ_30 SA_DQ_3 SA_DQ_29 SA_DQ_28 SA_DQ_27 SA_DQ_26 SA_DQ_25 SA_DQ_24 SA_DQ_23 SA_DQ_22 SA_DQ_21 SA_DQ_20 SA_DQ_2 SA_DQ_19 SA_DQ_18 SA_DQ_17 SA_DQ_16 SA_DQ_15 SA_DQ_14 SA_DQ_13 SA_DQ_12 SA_DQ_11 SA_DQ_10 SA_DQ_1 SA_DQ_0 SA_CS_3* SA_CS_2* SA_CS_1* SA_CS_0* SA_CKE_3 SA_CKE_2 SA_CKE_1 SA_CKE_0 SA_CK_3* SA_CK_3 SA_CK_2* SA_CK_2 SA_CK_1* SA_CK_0* SA_CK_0 SA_WE* SA_RAS* SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_CK_1 SA_DQ_9 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SA_BS_0 SA_BS_1 SA_CAS* SA_BS_2 SA_DQS_8* SA_DQ_33 SA_DQ_32 DDRSYSTEMMEMORYB (4 OF 10) SB_ODT_3 SB_ODT_2 SB_ODT_1 SB_ODT_0 SB_MA_9 SB_MA_8 SB_MA_7 SB_MA_6 SB_MA_5 SB_MA_4 SB_MA_3 SB_MA_2 SB_MA_15 SB_MA_14 SB_MA_13 SB_MA_12 SB_MA_11 SB_MA_10 SB_MA_1 SB_MA_0 SB_ECC_CB_7 SB_ECC_CB_6 SB_ECC_CB_5 SB_ECC_CB_4 SB_ECC_CB_3 SB_ECC_CB_2 SB_ECC_CB_1 SB_ECC_CB_0 SB_DQS_8 SB_DQS_7* SB_DQS_7 SB_DQS_6* SB_DQS_6 SB_DQS_5* SB_DQS_5 SB_DQS_4* SB_DQS_3 SB_DQS_2* SB_DQS_1* SB_DQS_1 SB_DQS_0* SB_DQS_0 SB_DQ_9 SB_DQ_8 SB_DQ_7 SB_DQ_63 SB_DQ_62 SB_DQ_61 SB_DQ_60 SB_DQ_6 SB_DQ_59 SB_DQ_58 SB_DQ_57 SB_DQ_56 SB_DQ_55 SB_DQ_54 SB_DQ_53 SB_DQ_52 SB_DQ_51 SB_DQ_50 SB_DQ_5 SB_DQ_49 SB_DQ_48 SB_DQ_47 SB_DQ_46 SB_DQ_45 SB_DQ_44 SB_DQ_43 SB_DQ_42 SB_DQ_41 SB_DQ_40 SB_DQ_4 SB_DQ_39 SB_DQ_38 SB_DQ_37 SB_DQ_36 SB_DQ_35 SB_DQ_34 SB_DQ_32 SB_DQ_31 SB_DQ_30 SB_DQ_3 SB_DQ_29 SB_DQ_28 SB_DQ_27 SB_DQ_26 SB_DQ_25 SB_DQ_24 SB_DQ_23 SB_DQ_22 SB_DQ_21 SB_DQ_20 SB_DQ_2 SB_DQ_19 SB_DQ_18 SB_DQ_17 SB_DQ_16 SB_DQ_15 SB_DQ_14 SB_DQ_13 SB_DQ_12 SB_DQ_11 SB_DQ_10 SB_DQ_1 SB_DQ_0 SB_CKE_2 SB_CKE_1 SB_CKE_0 SB_CK_3* SB_CK_3 SB_CK_2* SB_CK_2 SB_CK_1 SB_CK_0* SB_CK_0 SB_BS_2 SB_BS_1 SB_BS_0 SB_WE* SB_RAS* SB_CAS* SB_CS_3* SB_CS_2* SB_CS_1* SB_CS_0* SB_CKE_3 SB_DQS_8* SB_DQS_2 SB_DQS_4 SB_DQ_33 SB_DQS_3* SB_CK_1* II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3089 3089 3089 3089 3089 3089 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 32 89 32 89 30 89 32 89 32 89 30 89 30 89 30 89 30 89 30 89 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3189 3189 3189 3189 3189 3189 32 89 32 89 31 89 32 89 32 89 31 89 31 89 31 89 31 89 31 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 30 89 30 89 30 89 30 89 32 89 32 89 30 89 32 89 32 89 30 89 32 89 32 89 31 89 32 89 32 89 31 89 31 89 31 89 31 89 31 89 30 89 31 89 AW29 AU28 AW33 AU30 AU32 AV31 AT22 AV22 AU22 AT23 AT24 AV23 AW23 AW24 AT20 AU20 AW32 AT21 AU21 AV28 AY24 AV27 AW12 AY12 AU11 AU13 AY13 AW13 AU14 AU12 AV12 AV13 AF39 AF38 AK39 AK38 AP39 AP38 AV36 AV37 AW8 AV8 AV4 AW4 AP2 AP3 AK2 AK3 AN4 AN1 AL1 AE40 AE39 AG38 AG39 AL2 AE37 AE38 AG37 AG40 AJ40 AJ39 AL38 AL39 AJ37 AJ38 AJ1 AL37 AL40 AN40 AN39 AR38 AR39 AN37 AN38 AR37 AR40 AJ2 AU37 AU38 AY36 AW35 AU36 AU39 AW37 AU35 AY9 AW9 AL4 AW7 AV7 AU9 AV9 AU7 AY7 AY5 AU5 AU3 AU2 AL3 AW5 AV5 AW3 AV2 AR1 AR2 AN3 AN2 AR4 AR3 AJ4 AJ3 AU33 AW30 AV32 AU29 AV18 AU18 AT19 AV19 AW26 AV26 AY27 AW27 AU25 AU24 AW25 AY25 AV30 AV20 AW28 AY29 U1000 OMIT LGA1155-SKT SANDY_BRIDGE AR25 AP24 AK26 AM26 AP26 AL26 AY17 AN18 AL18 AM18 AP18 AP19 AK18 AM19 AV16 AY16 AR26 AT18 AU17 AN23 AM20 AK24 AP15 AR15 AM15 AL15 AR16 AP16 AM16 AL16 AN15 AN16 AG34 AG35 AM33 AL33 AR33 AP33 AN28 AN29 AN12 AN13 AP8 AR8 AL8 AM8 AH6 AH7 AM7 AL7 AJ7 AF35 AF33 AJ34 AJ35 AJ6 AE35 AE34 AH34 AH35 AL34 AM35 AL31 AM34 AL32 AL35 AG6 AM31 AM32 AR34 AR35 AR31 AR32 AP34 AP35 AP31 AP32 AG5 AM29 AM28 AP29 AP28 AL29 AL28 AR29 AR28 AP12 AR12 AJ8 AL13 AL12 AP13 AR13 AM13 AM12 AR9 AP9 AR6 AP6 AJ9 AR10 AP10 AR7 AP7 AM9 AL9 AM6 AL6 AL10 AM10 AG8 AG7 AT26 AL25 AN26 AN25 AV15 AW15 AY15 AU16 AN21 AP21 AM22 AL23 AK20 AL20 AL22 AL21 AK25 AW17 AM24 AP23 U1000 OMIT LGA1155-SKT SANDY_BRIDGE SYNC_DATE=01/06/2011 CPU DDR3 INTERFACES TP_MEM_B_DQS_P<8> MEM_B_A<6> TP_MEM_A_DQ_CB<7> MEM_A_DQ<26> MEM_A_DQ<17> MEM_A_DQ<12> MEM_A_WE_L MEM_A_RAS_L MEM_A_CAS_L MEM_A_DQ<32> MEM_A_DQ<33> TP_MEM_A_DQS_N<8> MEM_A_BA<2> MEM_A_BA<1> MEM_A_BA<0> MEM_A_DQ<63> MEM_A_DQ<62> MEM_A_DQ<61> MEM_A_DQ<60> MEM_A_DQ<9> MEM_A_CLK_P<1> MEM_A_ODT<2> MEM_A_ODT<1> MEM_A_ODT<0> MEM_A_CLK_P<0> MEM_A_CLK_N<0> MEM_A_CLK_N<1> MEM_A_CLK_P<2> MEM_A_CLK_N<2> MEM_A_CLK_P<3> MEM_A_CLK_N<3> MEM_A_CKE<0> MEM_A_CKE<1> MEM_A_CKE<2> MEM_A_CKE<3> MEM_A_CS_L<0> MEM_A_CS_L<1> MEM_A_CS_L<2> MEM_A_CS_L<3> MEM_A_DQ<0> MEM_A_DQ<1> MEM_A_DQ<10> MEM_A_DQ<11> MEM_A_DQ<13> MEM_A_DQ<14> MEM_A_DQ<15> MEM_A_DQ<16> MEM_A_DQ<18> MEM_A_DQ<19> MEM_A_DQ<2> MEM_A_DQ<20> MEM_A_DQ<21> MEM_A_DQ<22> MEM_A_DQ<23> MEM_A_DQ<24> MEM_A_DQ<25> MEM_A_DQ<27> MEM_A_DQ<28> MEM_A_DQ<29> MEM_A_DQ<3> MEM_A_DQ<30> MEM_A_DQ<31> MEM_A_DQ<34> MEM_A_DQ<35> MEM_A_DQ<36> MEM_A_DQ<37> MEM_A_DQ<38> MEM_A_DQ<39> MEM_A_DQ<4> MEM_A_DQ<40> MEM_A_DQ<41> MEM_A_DQ<42> MEM_A_DQ<43> MEM_A_DQ<44> MEM_A_DQ<45> MEM_A_DQ<46> MEM_A_DQ<47> MEM_A_DQ<48> MEM_A_DQ<49> MEM_A_DQ<5> MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52> MEM_A_DQ<53> MEM_A_DQ<54> MEM_A_DQ<55> MEM_A_DQ<56> MEM_A_DQ<57> MEM_A_DQ<58> MEM_A_DQ<59> MEM_A_DQ<6> MEM_A_DQ<7> MEM_A_DQ<8> MEM_A_DQS_P<0> MEM_A_DQS_N<0> MEM_A_DQS_P<1> MEM_A_DQS_N<1> MEM_A_DQS_P<2> MEM_A_DQS_N<2> MEM_A_DQS_P<3> MEM_A_DQS_N<3> MEM_A_DQS_P<4> MEM_A_DQS_N<4> MEM_A_DQS_P<5> MEM_A_DQS_N<5> MEM_A_DQS_P<6> MEM_A_DQS_N<6> MEM_A_DQS_P<7> MEM_A_DQS_N<7> TP_MEM_A_DQS_P<8> TP_MEM_A_DQ_CB<0> TP_MEM_A_DQ_CB<1> TP_MEM_A_DQ_CB<2> TP_MEM_A_DQ_CB<3> TP_MEM_A_DQ_CB<4> TP_MEM_A_DQ_CB<5> TP_MEM_A_DQ_CB<6> MEM_A_A<0> MEM_A_A<1> MEM_A_A<10> MEM_A_A<11> MEM_A_A<12> MEM_A_A<13> MEM_A_A<14> MEM_A_A<15> MEM_A_A<2> MEM_A_A<3> MEM_A_A<4> MEM_A_A<5> MEM_A_A<6> MEM_A_A<7> MEM_A_A<8> MEM_A_A<9> MEM_A_ODT<3> MEM_B_ODT<3> MEM_B_ODT<2> MEM_B_ODT<1> MEM_B_ODT<0> MEM_B_A<9> MEM_B_A<8> MEM_B_A<7> MEM_B_A<5> MEM_B_A<4> MEM_B_A<3> MEM_B_A<2> MEM_B_A<15> MEM_B_A<14> MEM_B_A<13> MEM_B_A<12> MEM_B_A<11> MEM_B_A<10> MEM_B_A<1> MEM_B_A<0> TP_MEM_B_DQ_CB<7> TP_MEM_B_DQ_CB<6> TP_MEM_B_DQ_CB<5> TP_MEM_B_DQ_CB<4> TP_MEM_B_DQ_CB<3> TP_MEM_B_DQ_CB<2> TP_MEM_B_DQ_CB<1> TP_MEM_B_DQ_CB<0> MEM_B_DQS_N<7> MEM_B_DQS_P<7> MEM_B_DQS_N<6> MEM_B_DQS_P<6> MEM_B_DQS_N<5> MEM_B_DQS_P<5> MEM_B_DQS_N<4> MEM_B_DQS_P<3> MEM_B_DQS_N<2> MEM_B_DQS_N<1> MEM_B_DQS_P<1> MEM_B_DQS_N<0> MEM_B_DQS_P<0> MEM_B_DQ<9> MEM_B_DQ<8> MEM_B_DQ<7> MEM_B_DQ<63> MEM_B_DQ<62> MEM_B_DQ<61> MEM_B_DQ<60> MEM_B_DQ<6> MEM_B_DQ<59> MEM_B_DQ<58> MEM_B_DQ<57> MEM_B_DQ<56> MEM_B_DQ<55> MEM_B_DQ<54> MEM_B_DQ<53> MEM_B_DQ<52> MEM_B_DQ<51> MEM_B_DQ<50> MEM_B_DQ<5> MEM_B_DQ<49> MEM_B_DQ<48> MEM_B_DQ<47> MEM_B_DQ<46> MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43> MEM_B_DQ<42> MEM_B_DQ<41> MEM_B_DQ<40> MEM_B_DQ<4> MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37> MEM_B_DQ<36> MEM_B_DQ<35> MEM_B_DQ<34> MEM_B_DQ<32> MEM_B_DQ<31> MEM_B_DQ<30> MEM_B_DQ<3> MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27> MEM_B_DQ<26> MEM_B_DQ<25> MEM_B_DQ<24> MEM_B_DQ<23> MEM_B_DQ<22> MEM_B_DQ<21> MEM_B_DQ<20> MEM_B_DQ<2> MEM_B_DQ<19> MEM_B_DQ<18> MEM_B_DQ<17> MEM_B_DQ<16> MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12> MEM_B_DQ<11> MEM_B_DQ<10> MEM_B_DQ<1> MEM_B_DQ<0> MEM_B_CKE<2> MEM_B_CKE<1> MEM_B_CKE<0> MEM_B_CLK_N<3> MEM_B_CLK_P<3> MEM_B_CLK_N<2> MEM_B_CLK_P<2> MEM_B_CLK_P<1> MEM_B_CLK_N<0> MEM_B_CLK_P<0> MEM_B_BA<0> MEM_B_CS_L<3> MEM_B_CS_L<2> MEM_B_CS_L<1> MEM_B_CS_L<0> MEM_B_CKE<3> TP_MEM_B_DQS_N<8> MEM_B_DQS_P<2> MEM_B_DQS_P<4> MEM_B_DQ<33> MEM_B_DQS_N<3> MEM_B_CLK_N<1> MEM_B_BA<2> MEM_B_BA<1> MEM_B_CAS_L MEM_B_RAS_L MEM_B_WE_L 12 OF 110 11.1.0 051-8115 12 OF 98 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 www.vinafix.vn
CPUCORESUPPLY VCCSA NCTF CPUCORESUPPLY (10 OF 10) POWER VCC_097 VCC_092 VCC_091 VCC_090 VCC_089 VCC_088 VCC_087 VCC_083 VCC_112 VCC_117 VCC_113 VCC_114 VCC_115 VCC_116 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCCSA0 VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA8 VCCSA9 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VCC_073 VCC_072 VCC_071 VCC_155 VCC_154 VCC_084 VCC_093 VSS_NCTF0 VCC_100 VCC_101 VCC_104 VCC_106 VCC_105 VCC_096 VCC_095 VCC_094 VCC_086 VCC_085 VCCSA7 VCCSA10 VCC_107 VCC_082 VCC_077 VCC_074 VCC_076 VCC_161 VCC_126 VCC_127 VCC_111 VCC_098 VCC_099 VCC_075 VCC_081 VCC_103 VCC_102 VCC_078 VCC_079 VCC_080 VCC_108 VCC_109 VCC_110 VCCSA_VID VCCIO_39 VCCIO_38 VCCIO_37 VCCIO_32 VCCIO_25 VCCIO_24 VCCIO_23 VCCIO_21 VCCIO_22 VCCIO_18 VCCIO_17 VCCIO_15 VCC_019 VCCIO_03 VCC_053 VCC_054 VCC_055 VCC_056 VCC_SENSE VCCIO_41 VSS_SENSE VIDSOUT VIDSCLK VIDALERT* VCCSA_SENSE VCCIO_19 VCCIO_16 VCCIO_14 VCCIO_13 VCCIO_12 VCCIO_11 VCCIO_10 VCCIO_08 VCCIO_07 VCCIO_06 VCCIO_05 VCCIO_04 VCCIO_43 VCCIO_40 VCCIO_36 VCCIO_35 VCCIO_34 VCCIO_33 VCCIO_26 VCCIO_20 VCCIO_01 VCCIO_02 VCC_070 VCC_069 VCC_068 VCC_067 VCC_066 VCC_065 VCC_064 VCC_063 VCC_062 VCC_061 VCC_060 VCC_059 VCC_058 VCC_057 VCC_052 VCC_051 VCC_050 VCC_049 VCC_048 VCC_047 VCC_046 VCC_045 VCC_044 VCC_043 VCC_042 VCC_041 VCC_040 VCC_039 VCC_037 VCC_036 VCC_035 VCC_034 VCC_033 VCC_032 VCC_031 VCC_030 VCC_029 VCC_028 VCC_027 VCC_026 VCC_025 VCC_023 VCC_022 VCC_021 VCC_020 VCC_018 VCC_017 VCC_016 VCC_014 VCC_013 VCC_011 VCC_010 VCC_009 VCC_008 VCC_007 VCC_006 VCC_005 VCC_015 VCC_012 VCCIO_27 VCC_004 VCC_003 VCC_002 VCC_001 VCCIO_09 VCCIO_28 VCCIO_29 VCCIO_42 VCC_038 VCC_024 VCCIO_SENSE VSSIO_SENSE VCCAXG_SENSE VSSAXG_SENSE VCCIO_30 VCCIO_45 VCCIO_SEL VCCIO_44 VCCIO_31 SENSELINES CPUCORESUPPLY IOPOWER POWERCPUVIDS (6 OF 10) VCCAXG_08 VCCAXG_01 VDDQ5 VDDQ18 VDDQ17 VDDQ15 VCCAXG_20 VCCAXG_23 VCCAXG_17 VCCAXG_18 VCCAXG_19 VCCAXG_21 VCCAXG_22 VCCAXG_24 VCCAXG_25 VCCAXG_26 VCCAXG_27 VCCAXG_28 VCCAXG_29 VCCAXG_30 VCCAXG_31 VCCAXG_32 VCCAXG_33 VCCAXG_34 VCCAXG_35 VCCAXG_36 VCCAXG_37 VCCAXG_38 VCCAXG_39 VCCAXG_40 VCCAXG_41 VCCAXG_42 VCCAXG_04 VCCAXG_05 VCCAXG_06 VCCAXG_07 VCCAXG_09 VCCAXG_10 VCCAXG_11 VCCAXG_12 VCCAXG_13 VCCAXG_14 VCCAXG_15 VCCAXG_16 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ16 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VCCPLL0 VCCPLL1 VDDQ10 VCCAXG_03 VCCAXG_02 VCCAXG_43 VCCAXG_44 GRAPHICS DDR3-1.5VRAILS POWER 1.8V ( 7 OF 10 ) OUT OUT OUT OUT OUT IN BI OUT OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 Fixed at 1.05V PLACEMENT NOTE: R1302 NEAR CPU PLACE R1300 AND (NOT controlled by VCCIO_SEL) AY37 AV39 B3 A4 M11 M10 L12 L11 K11 K10 J10 H12 M12 H11 H10 M30 M28 M27 M25 M24 M22 M21 M19 M18 M16 M15 M14 L30 L28 L27 L25 L24 L22 L21 L19 L18 L16 L15 L14 L13 K30 K28 K27 K25 K24 K22 K21 K19 K18 K16 K15 J30 J28 J27 J25 J24 J22 J21 J19 J18 J16 J15 J12 H32 H31 H30 H28 H27 H25 H24 H22 H21 H19 H18 H16 H15 H14 H13 G33 G32 G31 G30 G28 G27 G25 G24 G22 G21 G19 G18 G16 G15 F34 F33 F32 F31 F30 F28 F27 F25 F24 F22 F21 F19 F18 F16 U1000 OMIT SANDY_BRIDGE LGA1155-SKT AB3 M32 B36 B37 C37 A37 P34 T2 AB4 P33 W3 V8 U7 U4 U3 R7 R4 R3 N7 N4 N3 M13 L7 L4 L3 J8 J7 J4 J3 G4 G3 E4 E3 D6 D10 B9 AK30 AK29 AK27 AK23 AK21 AK19 AK17 AK15 AJ32 AJ28 AJ26 AJ17 AJ16 AG33 AF8 AB8 AA3 A7 A11 L32 A36 F15 E35 E34 E33 E31 E30 E28 E27 E25 E24 E22 E21 E19 E18 E16 E15 D36 D35 D34 D33 D31 D30 D28 D27 D25 D24 D22 D21 D19 D18 D16 D15 D14 D13 C36 C34 C33 C31 C30 C28 C27 C25 C24 C22 C21 C19 C18 C16 C15 B34 B33 B31 B30 B28 B27 B25 B24 B18 B16 B15 A28 A27 A25 A24 A18 A16 A15 A14 A13 A12 U1000 OMIT LGA1155-SKT SANDY_BRIDGE AR24 AR23 AR22 AR21 AR20 AJ24 AJ23 AY28 AY26 AY23 AJ20 AW31 AV33 AV29 AV25 AV24 AV21 AU31 AU27 AU23 AU19 AJ14 AJ13 AK12 AK11 Y38 Y37 Y36 Y35 Y34 Y33 W38 W37 W36 W35 W34 W33 U40 U39 U38 U37 U36 U35 U34 U33 T40 T39 T38 T37 T36 T35 T34 T33 AC40 AC39 AC38 AC37 AC36 AC35 AC34 AC33 AB40 AB39 AB38 AB37 AB36 AB35 AB34 AB33 U1000 OMIT LGA1155-SKT SANDY_BRIDGE 69 95 65 95 65 95 68 95 68 95 2 1 R1300 PLACEMENT_NOTE=Place close to CPU MF-LF 75 1/16W 402 1% 2 1 R1302 402 1/16W MF-LF 110 1% PLACEMENT_NOTE=Place close to CPU 21 R1310 402MF-LF 1/16W1% 44.2 65 95 21 R1312 MF-LF 402 1/16W5% 0 65 95 21 R1311 402 5% 1/16W MF-LF 0 65 95 65 95 65 95 SYNC_DATE=01/06/2011 CPU POWER SYNC_MASTER=K62 =PPVAXG_S0_CPU =PP1V5_S0_CPU_MEM =PP1V8_S0_CPU_PLL =PPVCCIO_S0_CPU CPU_VIDALERT_L CPU_VIDSCLK CPU_VIDSOUT CPU_VAXG_SENSE_N CPU_VAXG_SENSE_P CPU_VCCIO_SENSE_N CPU_VCCIO_SENSE_P CPU_VCCSA_SENSE CPU_VIDALERT_L_R CPU_VCC_SENSE_N CPU_VCC_SENSE_P TP_CPU_VCCSA_VID CPU_VIDSOUT_R CPU_VIDSCLK_R =PPVCORE_S0_CPU =PPVCCIO_S0_CPU TP_CPU_VCCIO_SEL =PPVCORE_S0_CPU =PPVCCSA_S0_CPU 13 OF 110 11.1.0 051-8115 13 OF 98 6175065 6 11 16 28 29 6 16 6 10 11 13 16 65 95 95 95 613165065 6 10 11 13 16 65613165065 6 50 www.vinafix.vn
VSS ( 8 OF 10 ) VSS_018 VSS_017 VSS_016 VSS_022 VSS_021 VSS_015 VSS_014 VSS_013 VSS_011 VSS_010 VSS_009 VSS_008 VSS_007 VSS_006 VSS_012 VSS_005 VSS_004 VSS_003 VSS_002 VSS_001 VSS_019 VSS_020 VSS_023 VSS_024 VSS_025 VSS_026 VSS_027 VSS_028 VSS_029 VSS_030 VSS_031 VSS_032 VSS_033 VSS_034 VSS_035 VSS_036 VSS_037 VSS_038 VSS_039 VSS_040 VSS_041 VSS_042 VSS_043 VSS_044 VSS_045 VSS_046 VSS_047 VSS_048 VSS_049 VSS_050 VSS_051 VSS_052 VSS_053 VSS_054 VSS_055 VSS_056 VSS_057 VSS_058 VSS_059 VSS_060 VSS_061 VSS_062 VSS_063 VSS_064 VSS_065 VSS_066 VSS_067 VSS_068 VSS_069 VSS_070 VSS_071 VSS_072 VSS_073 VSS_074 VSS_075 VSS_076 VSS_077 VSS_078 VSS_079 VSS_080 VSS_081 VSS_082 VSS_083 VSS_084 VSS_085 VSS_086 VSS_087 VSS_088 VSS_089 VSS_090 VSS_091 VSS_092 VSS_093 VSS_094 VSS_095 VSS_096 VSS_097 VSS_098 VSS_099 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS (9 OF 10) VSS_183 VSS_184 VSS_185 VSS_181 VSS_186 VSS_187 VSS_182 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_188 VSS_197 VSS_198 VSS_199 VSS_200 VSS_194 VSS_195 VSS_196 SKT_MNT_HOLE VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 AV10 AU8 AU6 AU4 AU34 AU26 AU15 AU1 AT9 AT8 AT7 AT6 AT5 AT40 AT4 AT39 AT38 AT37 AT36 AT35 AT34 AT33 AT32 AT31 AT30 AT3 AT29 AT28 AT27 AT25 AT2 AT17 AT16 AT15 AT13 AT12 AT10 AT1 AR5 AR36 AR30 AR27 AR19 AR18 AR17 AR14 AR11 AP5 AP40 AP4 AP37 AP36 AP30 AP27 AP25 AP22 AP17 AP14 AP11 AP1 AN9 AN8 AN7 AN6 AN5 AN36 AN35 AN34 AN33 AN32 AN31 AN30 AN27 AN24 AN22 AN19 AN17 AN14 AN11 AN10 AM5 AM40 AM4 AM39 AM38 AM37 AM36 AM30 AM3 AM27 AM25 AM23 AM21 AM2 AM17 AM14 AM11 AM1 AL5 AL36 AL30 AL27 AL24 AL19 AL17 AL14 AL11 AK9 AK8 AK7 AK6 AK5 AK40 AK4 AK37 AK36 AK35 AK34 AK33 AK32 AK31 AK28 AK22 AK16 AK14 AK13 AK10 AK1 AJ5 AJ36 AJ27 AJ25 AJ21 AJ18 AJ15 AJ12 AH8 AH5 AH40 AH39 AH38 AH37 AH36 AH33 AH3 AH2 AG36 AF7 AF6 AF5 AF40 AF37 AF36 AF34 AF1 AE36 AE33 AE3 AD8 AD5 AD40 AD39 AD38 AD36 AD33 AC6 AC1 AB5 AA6 AA38 AA37 AA36 AA35 AA34 AA33 A35 A29 A26 A23 A17 U1000 SANDY_BRIDGE LGA1155-SKT OMIT Y8 Y5 W6 V5 V40 V39 V38 V37 V36 V35 V34 V33 V2 V1 U8 T6 T5 T1 R8 R39 R37 R35 R33 P6 P5 P40 P38 P36 P2 P1 N8 M9 M6 M5 M39 M37 M35 M33 M29 M26 M23 M20 M2 M17 M1 L8 L29 L26 L23 L20 L17 L10 K6 K5 K39 K37 K35 K33 K29 K26 K23 K20 K2 K17 K14 K13 K12 K1 J32 J29 J26 J23 J20 J17 J11 H9 H6 H5 H39 H37 H35 H33 H29 H26 H23 H20 H2 H17 H1 G8 G7 G34 G29 G26 G23 G20 G17 G12 G11 F9 F6 F5 F39 F37 F35 F29 F26 F23 F20 F2 F17 F14 F13 F10 F1 E8 E7 E36 E32 E29 E26 E23 E20 E17 E12 E11 D9 D5 D4 D39 D37 D32 D29 D26 D23 D20 D2 D17 C8 C7 C35 C32 C29 C26 C23 C20 C17 C12 C11 B6 B38 B35 B32 B29 B26 B23 B17 B14 B13 B10 AY8 AY6 AY4 AY35 AY18 AY14 AY11 AW6 AW36 AW16 AW14 AW11 AW10 AV6 AV38 AV35 AV3 AV17 AV14 AV11 1158 1157 1156 U1000 SANDY_BRIDGE LGA1155-SKT OMIT CPU GROUNDS 14 OF 110 11.1.0 051-8115 14 OF 98 www.vinafix.vn
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 REMOVE THESE PULL DOWN RESISTORS AFTER PROTO REMOVE THESE PULL DOWN RESISTORS AFTER PROTO These can be Placed close to J2500 and Only for debug access New SP_DESCRIPTOR_OVERRIDE_L strap Multiplux with Mini 2 1 R1500 1K 5% 1/16W MF-LF 402 2 1 R1556 1/16W 10K MF-LF 402 5% 2 1 R1572 NOSTUFF 10K 1/16W MF-LF 5% 402 2 1 R1573 10K MF-LF 5% 1/16W 402 2 1 R1574 1/16W 5% MF-LF 402 10K 2 1 R1575 1/16W MF-LF 5% 402 10K 2 1 R1585 1K 1/16W 402 5% MF-LF NOSTUFF 2 1 R1586 1K NOSTUFF 5% MF-LF 402 1/16W 2 1 R1587 1K NOSTUFF MF-LF 5% 402 1/16W 2 1 R1588 NOSTUFF 1K MF-LF 5% 402 1/16W 2 1 R1576 10K 402 MF-LF 5% 1/16W 2 1 R1571 1/16W 5% MF-LF 10K 402 NOSTUFF 2 1 R1592 NOSTUFF 1/16W 5% 10K MF-LF 402 21 R1595 402 0 5% 1/16W MF-LF 21 R1596 NOSTUFF 0 MF-LF 402 1/16W 5% 2 1 R1509 MF-LF 1/16W 5% 10K 402 2 1 R1520 NOSTUFF 402 MF-LF 5% 1/16W 4.7K 2 1 R1541 NOSTUFF 1K 5% 402 1/16W MF-LF 2 1 R1521 NOSTUFF 1K MF-LF 5% 402 1/16W 2 1 R1515 402 1/16W 10K NOSTUFF MF-LF 5% 2 1 R1525 1/16W NOSTUFF 10K 5% 402 MF-LF 2 1 R1524 MF-LF 1/16W 402 5% 10K 2 1 R1523 MF-LF 402 5% 1/16W 10K 2 1 R1530 1/16W 10K MF-LF 5% 402 2 1 R1527 10K 402 5% 1/16W MF-LF NOSTUFF 2 1 R1528 MF-LF 402 1/16W 5% 10K NOSTUFF 2 1 R1526 5% 10K 402 MF-LF 1/16W 2 1 R1535 MF-LF 402 10K 5% 1/16W 2 1 R1538 1/16W NOSTUFF 4.7K 5% 402 MF-LF 2 1 R1539 10K 402 1/16W 5% MF-LF 2 1 R1543 5% 402 4.7K MF-LF 1/16W 2 1 R1550 402 MF-LF 1K 5% NOSTUFF 1/16W 2 1 R1551 NOSTUFF 10K 5% 1/16W MF-LF 402 2 1 R1552 NOSTUFF 10K 5% MF-LF 402 1/16W 2 1 R1553 5% MF-LF 402 1/16W 10K NOSTUFF 2 1 R1554 1/16W NOSTUFF 402 MF-LF 5% 10K 2 1 R1564 NOSTUFF 5% MF-LF 402 1/16W 1K 2 1 R1563 NOSTUFF MF-LF 402 1/16W 5% 1K 2 1 R1503 1/16W MF-LF 5% 402 10K 2 1 R1562 NOSTUFF 5% MF-LF 402 1/16W 1K 2 1 R1561 NOSTUFF 5% 402 1/16W MF-LF 1K 2 1 R1560 NOSTUFF 402 MF-LF 1/16W 5% 1K 2 1 R1569 NOSTUFF 1K 402 MF-LF 5% 1/16W 2 1 R1568 NOSTUFF MF-LF 1K 5% 1/16W 402 2 1 R1567 1K MF-LF NOSTUFF 1/16W 402 5% 2 1 R1566 NOSTUFF 1K MF-LF 402 5% 1/16W 2 1 R1565 NOSTUFF 1K 5% 1/16W MF-LF 402 2 1 R1504 NOSTUFF MF-LF 402 1/16W 5% 10K 2 1 R1570 NOSTUFF 10K 5% 402 1/16W MF-LF 2 1 R1506 10K MF-LF 1/16W 5% NOSTUFF 402 2 1 R1507 5% 402 10K 1/16W MF-LF 2 1 R1508 10K 5% 1/16W 402 MF-LF 2 1 R1510 402 MF-LF 1/16W 5% 10K 2 1 R1511 10K 1/16W 5% MF-LF 402 2 1 R1590 1/16W 10K MF-LF 5% 402 2 1 R1591 1/16W 5% 10K MF-LF 402 2 1 R1512 10K 5% MF-LF 402 1/16W 2 1 R1519 402 1/16W 5% MF-LF 10K 2 1 R1517 1/16W MF-LF 5% 10K 402 NOSTUFF 2 1 R1522 402 NOSTUFF 10K 5% MF-LF 1/16W 2 1 R1534 5% MF-LF 402 1/16W 10K NOSTUFF 2 1 R1548 10K 1/16W MF-LF 5% 402 2 1 R1555 402 5% 1/16W MF-LF 10K NOSTUFF SYNC_DATE=01/06/2011SYNC_MASTER=K62 STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU PM_CLKRUN_L PCH_GPIO70_TACH6 PCH_GPIO71_TACH7 JTAG_T29_TMS SDCARD_RESET PCH_SPKR CPU_CFG<2> ENET_SW_RESET_L PCH_GPIO19_SATA1GP FW_PME_L BLC_GPIO PCH_GPIO0_BMBUSY_L DP_AUXCH_ISOL PCH_GPIO49_SATA5GP T29_SW_RESET_L FW_PWR_EN FW_MINI_CLKREQ_L JTAG_T29_TCK =PP3V3_S0_PCH_STRAPS PCH_GPIO36_SATA2GP PCH_GPIO7_TACH3 =PP3V3_S0_PCH_STRAPS JTAG_T29_TDI MINI_CLKREQ_L =PP3V3_S0_PCH_STRAPS MINI_CLKREQ_L ENET_MEDIA_SENSE PCH_GPIO24 FW_CLKREQ_L PCH_GPIO8 HDA_SDOUT SMC_WAKE_SCI_L PCH_GPIO29_SLP_LAN_L CPU_CFG<0> PCH_GPIO30_SUSWARN_L PCH_FDI_FSYNC<1> PCH_FDI_LSYNC<0> PCH_FDI_LSYNC<1> PCH_FDI_INT CPU_FDI_FSYNC<0> CPU_FDI_INT CPU_FDI_FSYNC<1> CPU_FDI_LSYNC<1> CPU_FDI_LSYNC<0> ODD_PWR_EN_L PCH_PCI_GNT0_L PCH_PCI_GNT1_L PCH_INIT3V3_L CPU_CFG<5> T29_CLKREQ_L FW_MINI_CLKREQ_L CPU_CFG<1> JTAG_T29_TDO PCH_FDI_FSYNC<0> PCH_GPIO15 CPU_CFG<3> CPU_CFG<16> CPU_CFG<6> =PP3V3_S5_PCH_STRAPS ENET_CLKREQ_L PM_BATLOW_L =PP3V3_S0_PCH_STRAPS PCH_PCI_GNT2_L PCH_PCI_GNT3_L ENET_LOW_PWR =PP3V3_S5_PCH_STRAPS 15 OF 110 11.1.0 051-8115 15 OF 98 19 46 48 97 21 21 18 86 96 21 44 97 98 18 102590 21 36 91 18 25 21 39 97 6 21 91 21 25 18 25 84 91 21 25 21 80 91 21 97 15 18 91 21 25 86 96 615 21 25 21 615 21 86 96 15 33 97 615 15 33 97 183792 21 39 97 21 18 56 91 18 21 46 97 19 102590 19 19 19 19 19 10 10 10 10 10 214297 20 20 21 102590 21 80 91 151891 102590 21 86 96 19 21 25 102590 102590 102590 615 18 36 91 19 46 97 615 20 20 213797 615 www.vinafix.vn
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 10x 10UF and 10x 1UF CAPACITORS Note: VCCSA decoupling is on regulator page INTEL RECOMMENDATION 9X22UF 0805,16X 0805 placeholders BULK CAPS ON VTT REG PAGE 78 PLACEMENT_NOTE (C1660-C1665): BULK CAPS ON CPU VREG PAGE 72 PLL (CPU VCCSFR) DECOUPLING CPU VCORE DECOUPLING 2x 47uF, 1x 22uF 0805, 1x 10uF 0603, 1x 4.7uF 0603, 1x 2.2uF 0402, 2x 1uF 0402. INTEL RECOMMENDATION 10x 10uF 0805 8X 22UF 0805, 6X 10UF 0805 BULK CAPS ON CPU VREG PAGE 72 PLACEMENT_NOTE (C1650-C1657): CPU VCCIO DECOUPLING PLACEMENT_NOTE (C1600-C1613): 14x 22UF,0805 INTEL RECOMMENDATION 18X 22UF 0805 (14 Inside cavity and 4 North of processor) 6x 22uF 0805, 5x 1uF 0402. INTEL RECOMMENDATION 9X 22uF 0805 Memory (CPU VCCDDR) DECOUPLING 2 1 C1693 X5R 10% 1UF 402 10V 2 1 C1692 402 2.2UF 6.3V 10% X5R 2 1 C1691 4.7UF X5R-CERM 6.3V 603 10% 2 1 C1690 20% 6.3V 22uF CERM-X5R 805 2 1 C1681 CERM-X5R 805 20% 22uF 6.3V 2 1 C1685 1UF 10% 402 X5R 10V 2 1 C1684 10V 402 1UF 10% X5R 2 1 C1686 10V 402 10% X5R 1UF 2 1 C1609 Place inside socket cavity 805-3 22UF 20% 6.3V CERM-X5R2 1 C1608 20% 6.3V CERM-X5R Place inside socket cavity 22UF 805-3 2 1 C1607 Place inside socket cavity 22UF 20% 6.3V CERM-X5R 805-3 2 1 C1613 20% 6.3V CERM-X5R 805-3 22UF Place inside socket cavity 2 1 C1612 22UF 20% 6.3V CERM-X5R 805-3 Place inside socket cavity 2 1 C1611 805-3 6.3V 20% 22UF CERM-X5R Place inside socket cavity 2 1 C1610 805-3 CERM-X5R 6.3V 20% 22UF Place inside socket cavity 2 1 C1629 Place inside socket cavity X5R 603 10V 20% 10UF 2 1 C1600 805-3 22UF CERM-X5R 6.3V 20% Place inside socket cavity 2 1 C1628 X5R 603 10UF 10V 20% Place inside socket cavity 2 1 C1627 X5R 603 10UF 10V 20% Place inside socket cavity 2 1 C1626 X5R 603 10UF 10V Place inside socket cavity 20% 2 1 C1624 20% 10V 10UF 603 X5R Place inside socket cavity 2 1 C1623 603 X5R 10V 20% 10UF Place inside socket cavity 2 1 C1622 20% 10V 10UF 603 X5R Place inside socket cavity 2 1 C1621 20% 10V 603 X5R 10UF Place inside socket cavity 2 1 C1620 10UF 20% X5R 603 10V Place inside socket cavity 2 1 C1630 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1625 X5R 10UF 10V 20% Place inside socket cavity 603 2 1 C1631 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1632 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1633 X5R 402 1UF 16V 10% Place inside socket cavity 2 1 C1634 10% 16V X5R 402 Place inside socket cavity 1UF 2 1 C1635 1UF 10% X5R 402 16V Place inside socket cavity 2 1 C1636 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1637 1UF 10% X5R 16V Place inside socket cavity 402 2 1 C1638 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1639 402 X5R 16V 10% 1UF Place inside socket cavity 2 1 C1601 20% 805-3 22UF 6.3V CERM-X5R Place inside socket cavity 2 1 C1670 POLY 2V 330UF-0.0045OHM 20% CASE-D2-SM 2 1 C1696 6.3V 20% 47UF 0805 X5R2 1 C1695 20% 6.3V 10UF 603 X5R 2 1 C1697 X5R 0805 47UF 20% 6.3V 2 1 C1679 6.3V 22uF 20% 805 CERM-X5R2 1 C1678 20% 6.3V 22uF CERM-X5R 805 2 1 C1677 6.3V 22uF 20% 805 CERM-X5R2 1 C1676 20% 6.3V 22uF CERM-X5R 805 2 1 C1602 805-3 CERM-X5R Place inside socket cavity 6.3V 20% 22UF 2 1 C1603 805-3 CERM-X5R 6.3V 20% 22UF Place inside socket cavity 2 1 C1604 805-3 6.3V Place inside socket cavity 22UF 20% CERM-X5R 2 1 C1650 6.3V 22UF 805 20% CERM-X5R Place under socket cavity on secondary side. 2 1 C1605 Place inside socket cavity 22UF 20% 6.3V CERM-X5R 805-3 2 1 C1606 6.3V Place inside socket cavity 22UF 20% 805-3 CERM-X5R 2 1 C1651 CERM-X5R Place under socket cavity on secondary side. 22UF 20% 6.3V 805 2 1 C1652 Place under socket cavity on secondary side. 805 20% CERM-X5R 6.3V 22UF 2 1 C1653 Place under socket cavity on secondary side. CERM-X5R 805 22UF 20% 6.3V 2 1 C1654 Place under socket cavity on secondary side. 805 20% 6.3V CERM-X5R 22UF 2 1 C1655 6.3V CERM-X5R Place under socket cavity on secondary side. 805 20% 22UF 2 1 C1656 CERM-X5R 805 22UF Place under socket cavity on secondary side. 20% 6.3V 2 1 C1657 6.3V 20% 22UF 805 Place under socket cavity on secondary side. CERM-X5R 2 1 C1665 603 6.3V 20% 10uF X5R Place at edge of socket. 2 1 C1664 Place at edge of socket. X5R 6.3V 20% 603 10uF 2 1 C1663 20% Place at edge of socket. 603 X5R 6.3V 10uF 2 1 C1662 10uF 20% Place at edge of socket. X5R 6.3V 603 2 1 C1661 603 6.3V 10uF 20% X5R Place at edge of socket. 2 1 C1660 6.3V 10uF 20% Place at edge of socket. 603 X5R 2 1 C1680 805 CERM-X5R 22uF 6.3V 20% 2 1 C1682 402 10V X5R 10% 1UF 2 1 C1683 10V 10% X5R 402 1UF 2 1 C1694 10V 402 10% X5R 1UF SYNC_DATE=01/06/2011 CPU NON-GFX DECOUPLING SYNC_MASTER=K62 =PPVCORE_S0_CPU =PPVCORE_S0_CPU =PPVCCIO_S0_CPU =PP1V5_S0_CPU_MEM =PP1V8_S0_CPU_PLL 16 OF 110 11.1.0 051-8115 16 OF 98 613165065 61316 5065 6101113 65 6111328 29 613 www.vinafix.vn
TABLE_5_ITEM TABLE_5_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# PLACEMENT_NOTE (C1704-C1709): INTEL RECOMMENDATION 6X22UF 0805,3X 4.7UF VAXG DECOUPLING BULK CAPS ON CPU VREG PAGE 73 21 R1760 1/16W 5% 0 402 MF-LF 21 R1765 5% 1/16W 0 402 MF-LF 21 R1750 0 402 5% 1/16W MF-LF 2 1 C1709 22UF 20% 6.3V CERM-X5R 805-3 VAXG Place inside socket cavity 2 1 C1708 6.3V 22UF 20% CERM-X5R 805-3 VAXG Place inside socket cavity 2 1 C1707 22UF 20% 6.3V CERM-X5R 805-3 Place inside socket cavity VAXG 2 1 C1706 805-3 CERM-X5R 6.3V 20% 22UF Place inside socket cavity VAXG 2 1 C1705 805-3 CERM-X5R 6.3V 20% Place inside socket cavity 22UF VAXG 2 1 C1704 805-3 20% Place inside socket cavity CERM-X5R 6.3V 22UF VAXG 2 1 C1710 603 X5R-CERM 4.7UF 10% Place inside socket cavity 6.3V OMIT 2 1 C1711 X5R-CERM Place inside socket cavity 603 VAXG 4.7UF 10% 6.3V 2 1 C1712 X5R-CERM 10% 6.3V Place inside socket cavity 603 VAXG 4.7UF GFX DECOUPLING & PCH PWR ALIAS SYNC_DATE=01/06/2011SYNC_MASTER=K62 C17101 CAP,4.7UF,10%,6.3V,0603138S0586 VAXG NO_VAXGRES,0 OHM,5%,06031113S0022 C1710 PP1V05_S0_PCH_VCCADPLLB_F VOLTAGE=1.05V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM VOLTAGE=1.05V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM PP1V05_S0_PCH_VCCADPLLA_F=PP1V05_S0_PCH_VCCADPLL MIN_LINE_WIDTH=0.4 MM VOLTAGE=3.3V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM PP3V3_S0_PCH_VCCA_DAC_F =PPVAXG_S0_CPU =PP3V3_S0_PCH_VCCADAC 17 OF 110 11.1.0 051-8115 17 OF 98 22 95 22 956 22 95 6135065 6 www.vinafix.vn
IN IN OUT OUT OUT IN BI BI BI BI OUT BI IN IN OUT OUT IN IN OUT OUT IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN OUT OUT OUT BI OUT BI IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN OUT BI OUT OUT IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN SATA1RXN SATA0TXP SATA0TXN SATA2RXN SATA2RXP SATA5RXP SATA0RXP LDRQ0* L_BKLTEN L_VDD_EN SATA3COMPI SATA3RCOMP0 SATA3RBIAS RTCRST* SRTCRST* INTRUDER* INTVRMEN HDA_BCLK HDA_SYNC HDA_RST* SPKR HDA_SDIN0 HDA_SDIN1 HDA_SDIN3 HDA_SDIN2 HDA_SDO HDA_DOCK_EN*/GPIO33 HDA_DOCK_RST*/GPIO13 JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO SPI_CS0* SPI_CLK SPI_CS1* SPI_MOSI SPI_MISO FWH0/LAD0RTCX1 RTCX2 SATA1TXP SATA0RXN SERIRQ LDRQ1*/GPIO23 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME* SATA1RXP SATA1TXN SATA2TXN SATA2TXP SATA3RXN SATA3RXP SATA3TXN SATA3TXP SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5TXN SATA5TXP SATAICOMPO SATAICOMPI SATALED* SATA0GP/GPIO21 SATA1GP/GPIO19 L_BKLTCTL JTAGSPI SATALPC IHDARTC SYM 1 OF 10 SMBDATA SML0CLK SML0ALERT*/GPIO60 SML0DATA SML1ALERT*/PCHHOT*/GPIO74 SML1CLK/GPIO58 SML1DATA/GPIO75 PETP1 PERP2 PERN2 PERP3 PETN3 PERN4 PETP3 PERP4 PETN4 PERN5 PETP4 PERP5 PETN5 PETP5 PERN6 PERP6 PETP6 PETN6 PERN7 PERP7 PETN7 PERN8 PETP7 PETN8 PERP8 PETP8 SMBALERT*/GPIO11 SMBCLK PERN1 PETN1 CLKOUT_PCIE0P CLKOUT_PCIE0N CLKOUT_PCIE1P CLKOUT_PCIE1N CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2*/GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE4N CLKOUT_PCIE3P CLKOUT_PCIE5N CLKOUT_PCIE4P PCIECLKRQ5*/GPIO44 CLKOUT_PCIE5P CLKOUT_PEG_B_P CLKOUT_PEG_B_N CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLKOUT_DMI_N CLKOUT_DMI_P CLKOUT_DP_P CLKOUT_DP_N CLKIN_DMI_N CLKIN_DMI_P CLKIN_DOT_96N CLKIN_DOT_96P CLKIN_SATA_P CLKIN_SATA_N REFCLK14IN CLKIN_PCILOOPBACK XTAL25_IN XTAL25_OUT XCLK_RCOMP CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P CLKIN_GND0_P CLKIN_GND0_N CLKIN_GND1_N CLKIN_GND1_P CL_CLK1 CL_DATA1 CL_RST1* PERP1 PETN2 PETP2 PERN3 SMBUS FLEX CLOCKFROMCLKBUFFERPEG PCI-E* SYM 2 OF 10 OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PLACE THESE 33 OHM RESISTORS CLOSE TO PCH (MIN 500MIL) DOES THIS NEED LENGTH MATCH??? PLACE THIS RESISTOR NEAR THE PCH PIN TIE THEM TOGETHER VERY CLOSE TO PINS. PLACE THE RESISTOR LESS THAN 200MILS FROM THE PINS 2791 5691 4855 91 4891 4855 91 485591 46 48 91 46 48 91 46 48 91 46 48 91 46 48 91 46 48 42 90 42 90 42 90 42 90 42 90 42 90 42 90 42 90 3792 3792 3390 3390 3990 3990 3792 3792 3390 3390 3990 3990 3790 3790 3390 3390 3990 3990 1591 11 90 11 90 9 9 8 8 26 90 26 90 26 90 26 90 26 90 26 90 26 91 27 91 27 79 91 27 91 2791 49 94 49 94 49 94 49 94 8 8 8 8 2 1 R1800 390K 402 1/16W 5% MF-LF 2 1 R1801 402 MF-LF 5% 1/16W 1M 2 1 R1802 402 MF-LF 5% 1/16W 20K 2 1 R1803 20K 1/16W 5% 402 MF-LF 2 1 C1803 1UF 10% 402 10V X5R2 1 C1802 X5R 402 1UF 10% 10V 2 1 R1830 37.4 MF-LF 402 1/16W 1% PLACE R1830 AT BALL AJ53 2 1 R1820 402 1/16W 10K 5% MF-LF 8696 8696 2 1 R1890 PLACE R1890 AT BALL AL2 MF-LF 402 1% 1/16W 90.9 21 R1810 402 MF-LF 1/16W 5% 33 21 R1811 402 MF-LF 33 1/16W 5% 21 R1812 1/16W MF-LF 33 402 5% 21 R1813 402 1/16W 5% MF-LF 33 56 91 56 91 56 91 15 56 91 2 1 R1850 MF-LF 402 10K 5% 1/16W 153691 49 94 49 94 2 1 R1853 1/16W 10K MF-LF 402 5% 2 1 R1854 10K MF-LF 1/16W 5% 402 2 1 R1855 MF-LF 1/16W 5% 402 10K 8 8 42 90 42 90 42 90 42 90 21R18601/16W MF-LF 4025% 33 21R1861 4025% 33 MF-LF1/16W 21R18625% 33 4021/16W MF-LF 21R18635% 33 1/16W 402MF-LF 21R1864 4021/16W 33 MF-LF5% 21R1822 5% 1/16W 22 MF-LF 402 21R1823 1/16W MF-LF 22 4025% 8 8 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 BN37 BE56 AU53 AT55 AR56 AT57 AR54 AV52 BF57 AJ53 AJ55 AV49 AV50 AT44 AT46 AT49 AT50 AN50 AN49 AM55 AN56 AN44 AN46 AE52 AC52 AE54 AL53 AL56 AL49 AL50 AG47 AG49 AA56 AA53 AY52 AE44 AE46 AB55 AC56 BC54 BN39 BR39 BT41 BA20 BK17 AG17 AG18 AG12 BC50 BF47 BC52 BA43 BN41 BM38 BP23 BT23 BJ22 BK22 BF22 BD22 BC22 BA25 BC25 BU22 BG17 BG20 BJ20 BJ17 BK15 U1800 OMIT WLCSP COUGAR-POINT AJ5 AJ3 AL2 BK46 BJ46 BR46 BM50 BT51 BU49 BR49 BT47 BN49 AN8 D13 F13 B15 C16 E17 B21 A22 F23 B13 F15 A16 B17 F18 E21 C22 F25 J10 H12 L15 M15 M17 J17 R20 L20 H10 J12 J15 N15 P17 H17 P20 J20 BL54 AV43 BA2 AW5 BA5 AT9 AE11 AE12 AG9 AG8 AG2 AF3 Y8 Y9 AB8 AB9 AB14 AB12 W5 AA5 AC6 AE6 N52 R52 M55 N56 R31 P31 AG56 AF55 BD15 P27 R27 V52 W53 BF38 BD38 R33 P33 BF49 BF50 BA50 U1800 OMIT COUGAR-POINT WLCSP 2 1 R1832 PLACE R1832 AT BALL AC52 1/16W 402 1% MF-LF 750 2 1 R1831 1/16W PLACE R1831 AT BALL AE52 402 MF-LF 1% 49.9 2 1 R1870 402 5% 1/16W MF-LF 10K 2 1 R1871 MF-LF 1/16W 402 10K 5% 2 1 R1873 10K 402 5% MF-LF 1/16W 2 1 R1872 MF-LF 1/16W 5% 402 10K 21 R1841 402 MF-LF 1/16W 0 5% NOSTUFF 21 R1840 NOSTUFF 0 5% MF-LF 1/16W 402 46 9721 R1880 PLACE R1880 CLOSE TO R1813 MF-LF NOSTUFF 0 5% 1/16W 402 21 R1895 0 MF-LF 402 1/16W 5% NOSTUFF SYNC_MASTER=K62 PCH SATA/PCIE/CLK/LPC/SPI SYNC_DATE=01/06/2011 PCIE_CLK100M_MINI_P PCIE_CLK100M_MINI_N PCIE_CLK100M_ENET_N PCIE_T29_R2D_C_N<2> FW_MINI_CLKREQ_L PCIE_CLK100M_T29_N TP_PCIE_CLK100M_PE4N TP_PCIE_CLK100M_PE5N TP_DMI_MIDBUS_CLK100M_PEGB1N TP_DMI_MIDBUS_CLK100M_PEGB1P TP_PCIE_CLK100M_PE5P SATA_SSD_D2R_P PCH_SATAICOMP TOTAL_ETCH_LENGTH=5 MM PCIE_T29_R2D_C_P<1> PCIE_T29_R2D_C_N<1> PCIE_T29_D2R_N<1> TP_PCH_L_BKLTCTL PCH_SATA3COMP TOTAL_ETCH_LENGTH=5 MM =PP1V05_S0_PCH PCH_CLK96M_DOT_N PCH_CLK96M_DOT_P PCH_CLK33M_PCIIN LPC_R_AD<0> PCIE_ENET_R2D_C_N =PP1V05_S0_PCH_VCCIO_SATA PCH_CLK32K_RTCX2 =PP3V3_S0_PCH LPC_FRAME_R_L T29_PWR_EN TP_LPC_DREQ0_L LPC_AD<1> LPC_SERIRQ PCH_GPIO19_SATA1GP DP_AUXCH_ISOL PCH_SATALED_L LPC_FRAME_L PCH_SRTCRST_L HDA_SDIN0 TP_HDA_SDIN1 TP_HDA_SDIN2 TP_HDA_SDIN3 HDA_SDOUT_R PCH_INTRUDER_L PCH_INTVRMEN_L TP_SATA_D_R2D_CP TP_PCIE_CLK100M_PE4P PCIE_CLK100M_T29_P PEG_CLK100M_N SML_PCH_0_DATA PCIE_FW_R2D_C_N PCH_SPKR HDA_RST_R_L TP_PCH_GPIO65_CLKOUTFLEX1 TP_PCH_GPIO66_CLKOUTFLEX2 DP_GPU_T29_SEL TP_PCH_GPIO67_CLKOUTFLEX3 ITPXDP_CLK100M_N ITPXDP_CLK100M_P PCH_CLK25M_XTALOUT PCH_CLK25M_XTALIN ENET_CLKREQ_L HDA_SYNC_R HDA_BIT_CLK_R SPI_DESCRIPTOR_OVERRIDE_L PP3V3_G3H_RTC SPI_MOSI_R HDA_SYNC_R PCIE_CLK100M_FW_P PCIE_CLK100M_FW_N PCIE_T29_D2R_P<2> PCIE_T29_R2D_C_P<2> PCIE_T29_D2R_N<3> PCIE_T29_R2D_C_P<3> PCIE_CLK100M_ENET_P SATA_ODD_R2D_C_N SATA_SSD_D2R_N XDP_PCH_TDO SPI_MOSI_1_R PCH_CLKIN_GNDP0 PCH_CLKIN_GNDN1 PCH_CLKIN_GNDP1 TP_PCH_CL_DATA1 PCH_SRTCRST_L LPC_R_AD<1> TP_PCH_CL_CLK1 LPC_R_AD<3> PCH_CLK100M_SATA_N PCH_CLK100M_DMI_N HDA_RST_LHDA_RST_R_L HDA_SDOUT LPC_AD<0> SPI_CLK_R SPI_CLK_1_R PCH_INTVRMEN_L RTC_RESET_L PCH_INTRUDER_L PCIE_MINI_R2D_C_P PCIE_T29_D2R_N<2> HDA_SYNC HDA_SDOUT_R ITPXDP_CLK100M_P TP_PCH_CL_RST1 PCH_CLK14P3M_REFCLK PCH_CLK100M_SATA_P PCH_CLK100M_DMI_P SPI_CS0_R_L =PP1V05_S0_PCH_VCCIO_PCIE SPI_MISO XDP_PCH_TMS TP_SPI_CS1_L =PP3V3_S0_SATALED PCIE_MINI_D2R_N LPC_AD<3> ITPCPU_CLK100M_N PCH_CLKIN_GNDN0 SATA_SSD_R2D_C_P LPC_AD<2> ITPXDP_CLK100M_N HDA_BIT_CLK HDA_SDOUT_R TP_PCH_CLKOUT_DPP SML_PCH_1_DATA SML_PCH_1_CLK SML_PCH_1_ALERT_L LPC_R_AD<2> PCIE_T29_R2D_C_N<3> PCIE_T29_D2R_P<3> PCIE_FW_D2R_P PCIE_T29_D2R_P<0> PCIE_T29_R2D_C_P<0> TP_PCIE_R2D_PETP4 TP_PCIE_R2D_PETN4 PCIE_FW_R2D_C_P TP_PCH_L_VDD_EN TP_PCH_L_BKLTEN TP_SATA_E_R2D_CP TP_SATA_E_R2D_CN TP_SATA_E_D2RP TP_SATA_E_D2RN PCIE_T29_D2R_P<1> PCIE_T29_R2D_C_N<0> PCIE_T29_D2R_N<0> SATA_ODD_D2R_P SATA_ODD_R2D_C_P TP_SATA_D_D2RN TP_SATA_D_R2D_CN TP_SATA_F_R2D_CN TP_SATA_F_D2RN TP_SATA_D_D2RP PCH_SATA3RBIAS XDP_PCH_TCK ENET_MEDIA_SENSE JTAG_T29_TMS PCH_SATALED_L XDP_PCH_TDI PCIE_MINI_R2D_C_N PCIE_FW_D2R_N PCIE_MINI_D2R_P SML_PCH_0_CLK TOTAL_ETCH_LENGTH=5 MM PCH_XCLK_RCOMP PCH_GPIO11_SMBALERT_L ITPCPU_CLK100M_P SML_PCH_0_ALERT_L PCH_GPIO11_SMBALERT_L =PP3V3_S5_PCH PCIE_ENET_D2R_N TP_PCH_CLKOUT_DPN DMI_CLK100M_CPU_P DMI_CLK100M_CPU_N PEG_CLK100M_P SML_PCH_0_ALERT_L SMBUS_PCH_DATA SMBUS_PCH_CLK SATA_HDD_D2R_N SATA_HDD_D2R_P SATA_HDD_R2D_C_N SATA_HDD_R2D_C_P SATA_ODD_D2R_N TP_SATA_F_D2RP TP_SATA_F_R2D_CP RTC_RESET_L PCH_CLK32K_RTCX1 HDA_BIT_CLK_R PCIE_ENET_R2D_C_P PCIE_ENET_D2R_P SATA_SSD_R2D_C_N TP_PCIE_D2R_PERP4 TP_PCIE_D2R_PERN4 SML_PCH_1_ALERT_L SMC_WAKE_SCI_L 18 OF 110 11.1.0 051-8115 18 OF 98 91 8 91 6 24 79 91 62224 62124 91 80 97 8 15 25 15 25 84 91 18 42 1897 8 8 8 1891 18 1897 8 15 1891 61 83 91 18 25 90 18 25 90 1891 1891 19222795 1891 2591 8 18 97 91 8 91 1891 91 18 97 18 27 97 18 1891 182590 8 6192224 2591 642 11 90182590 1891 18 8 8 8 8 8 8 8 8 8 8 8 91 2591 153792 158696 18 42 2591 91 18 11 90 18 6192124 18 8 8 182797 1891 18 15214697 www.vinafix.vn
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A
APPLE A1311 K60 820-3126-A

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APPLE A1311 K60 820-3126-A

  • 1. TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEMTABLE_TABLEOFCONTENTS_ITEM DRAWING DRAWING TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECNREV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3456 D B 8 7 6 5 4 2 1 12 APPD CK DESCRIPTION OF REVISION K60 MLB 1 OF 98 051-8115 11.1.0 1 OF 110 2011-02-08 Contents Sync Date(.csa) Page 49 01/06/2011 K60_MARK 52 SMBUS CONNECTIONSTable of Contents 1 1 K60 05/21/2009 ABBREV=DRAWING TITLE=K22 LAST_MODIFIED=Tue Feb 8 14:39:56 2011 LAST_MODIFIED=Tue Feb 8 14:39:56 2011 Page (.csa) Contents Date Sync 50 01/06/2011 K62 53 CPU/PCH/GPU POWER SENSE 51 01/06/2011 K62 54 HDD OOB SENSE 52 01/06/2011 K60_MARK 55 TEMP SENSORS 53 01/06/2011 K62 56 HD AND OD FAN 54 01/06/2011 K60_JERRY 57 CPU FAN 55 01/06/2011 K62 61 SPI ROM 56 01/06/2011 K60_DAVID 62 AUDIO: CODEC/REGULATOR 57 01/06/2011 K60_DAVID 63 AUDIO: FILTER/BUFFER 58 01/06/2011 K60_DAVID 64 AUDIO: SPEAKER AMP_1 59 01/06/2011 K60_DAVID 65 AUDIO: SPEAKER AMP 60 01/06/2011 K60_DAVID 66 Audio: MLB to I/O Conn. 61 11/24/2010 K60_DAVID 67 AUDIO: Detects/Grounding 62 01/06/2011 K60_DAVID 68 AUDIO: Mikey 63 01/06/2011 K62 69 POWER SEQUENCING ENABLES 64 01/06/2011 K62 70 POWER SEQUENCING PGOOD 65 N/A K60_AARON 71 VREG: PPVCORE_S0_CPU 66 01/06/2011 K62 72 VREG: CPU CORE - PHASES 1-3 67 N/A K60_AARON 73 VREG:AXG PHASE/CORE - CAPS 68 01/06/2011 K62 74 1V05 REGULATOR 69 11/15/2010 K62 75 CPU VCCSA REGULATOR 70 01/06/2011 K62 77 5V_S3 / 3V3_S5 VREGS 71 01/06/2011 K62 78 1.5V / 1.8V VREGS 72 01/06/2011 K62 79 3.42 G3HOT SUPPLY 73 01/06/2011 K62 80 S3+S0 FETS 74 01/06/2011 K60_JERRY 81 12V_S0 & 12V_S5 switch 75 01/06/2011 K62 84 MXM PCIe, DP & Power 76 N/A K60_MASTER 85 MXM I/O 77 01/06/2011 K62 86 MXM PCIE CAPS 78 07/18/2010 K60_AARON 87 DP ALIAS AND CONTROL 79 01/06/2011 K62 88 GREEN CLOCK 80 01/06/2011 K62 89 T29 POWER 81 01/06/2011 K62 90 Display: Int DP Connector 82 11/14/2010 K62 91 2V9/3V3/12V POWER SWITCH 83 01/06/2011 K62 92 Internal DP MUXing 84 11/14/2010 K62 93 DisplayPort/T29 A MUXing 85 01/06/2011 K62 94 DisplayPort/T29 A Connector 86 01/06/2011 K62 97 T29 Host (1 of 2) 87 01/06/2011 K62 98 T29 Host (2 of 2) 88 01/06/2011 K62 100 K60/K62 RULE DEFINITIONS 89 01/06/2011 K60_ROSITA 101 Memory Constraints 90 01/06/2011 K62 102 PCIE/DMI/FDI/SATA CONSTRAINTS 91 01/06/2011 K62 103 IBEX PEAK CONSTRAINTS 92 01/06/2011 K62 104 USB/ENET/SD/FW/AUD CONSTRAINTS 93 01/06/2011 K62 105 GRAPHICS CONSTRAINTS 94 01/06/2011 K62 106 SMC Constraints 95 01/06/2011 K62 107 POWER CONSTRAINTS 96 01/06/2011 K62 108 T29 CONSTRAINTS 97 01/06/2011 K62 109 PM RESETS ENABLES PGOOD CONST 98 01/06/2011 K62 110 K60/K62 ICT/FCT System Block Diagram 2 2 K60_SIJI 01/06/2011 Power Block Diagram 3 3 K60_JERRY 01/06/2011 BOM Configuration 4 4 K60_AARON N/A DEBUG LEDS 5 5 K62 01/06/2011 Power Conn / Alias 6 6 K60_MARK 12/30/2010 Holes 7 7 K74_MASTER N/A UNUSED SIGNAL ALIAS 8 8 K62 01/06/2011 Signal Aliases 9 9 K62 01/06/2011 CPU DMI/PEG/FDI/RSVD 10 10 K62 01/06/2011 CPU CLOCK/MISC/JTAG 11 11 K62 01/06/2011 CPU DDR3 INTERFACES 12 12 K62 01/06/2011 CPU POWER 13 13 K62 01/06/2011 CPU GROUNDS 14 14 K62 01/06/2011 STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU 15 15 K62 01/06/2011 CPU NON-GFX DECOUPLING 16 16 K62 01/06/2011 GFX DECOUPLING & PCH PWR ALIAS 17 17 K62 01/06/2011 PCH SATA/PCIE/CLK/LPC/SPI 18 18 K62 01/06/2011 PCH DMI/FDI/GRAPHICS 19 19 K62 01/06/2011 PCH PCI/FLASHCACHE/USB 20 20 K62 01/06/2011 PCH MISC 21 21 K62 01/06/2011 PCH POWER 22 22 K62 01/06/2011 PCH GROUNDS 23 23 K62 01/06/2011 PCH DECOUPLING 24 24 K62 01/06/2011 CPU & PCH XDP 25 25 K62 01/06/2011 CLOCK (CK505) 26 26 K62 01/06/2011 CHIPSET SUPPORT 28 27 K62 01/06/2011 DDR3 VREF MARGINING 29 28 K62 01/06/2011 MEMORY CAPS 30 29 K62 01/06/2011 DDR3 SO-DIMM 0 & 2 31 30 K62 01/06/2011 DDR3 SO-DIMM 1 & 3 32 31 K62 01/06/2011 DDR3 SUPPORT AND BITSWAPS 33 32 K62 01/06/2011 PCI-E Wireless Connector 34 33 K62 01/06/2011 USB HUB 1 35 34 K62 01/06/2011 USB HUB 2 36 35 K62 01/06/2011 CAESAR IV SUPPORT 38 36 K62 01/06/2011 ETHERNET PHY (CAESAR IV) 39 37 K62 01/06/2011 Ethernet Connector 40 38 K60_MARK 01/06/2011 FireWire LLC/PHY (FW643) 41 39 K60_ROSITA 01/06/2011 FireWire: 1394B MISC 42 40 K62 01/06/2011 FIREWIRE CONNECTOR 43 41 K62 01/06/2011 SATA Connectors 45 42 K60_JERRY 01/06/2011 EXTERNAL USB CONNECTORS 46 43 K62 01/06/2011 Internal USB Connections 47 44 K62 01/06/2011 SD READER CONNECTOR 48 45 K62 01/06/2011 SMC 49 46 K62 01/06/2011 SMC Support 50 47 K62 01/06/2011 LPC+SPI Debug Connector 51 48 K62 01/06/2011 SCH,K60,MLB www.vinafix.vn
  • 2. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 USB CAMERAPG 47 J47XX J47XX SD CARDPG 47 TO ENET 25MHz XTAL IN 25MHz XTAL IN 25MHz XTAL IN X4 PCI-E GEN2 PG 88 U8800 GREEN CLK X16 PCI-E GEN2 FDI INTERFACE DDR3 1333 CHB DDR3 1333 CHA J4800 SATA-A2 SATA CONN ODD T3900 MAGNETICS PG 38 AND PHY GB E-NET SATA CONN LGA1155 - SANDY BRIDGE PG 19 PG 47 J4700 ALS XDP CONN SO-DIMMS XDP CONN PG 55 FAN CONN AND CONTROL PG 56,57 J5600, J5601, J5700 FW643 SD CARD HDA SMB E-NET CONNECTOR J4530 X1 PCIE GEN1 LANE 2.5GBITPS X1 PCIE GEN1 LANE 2.5GBITPS PG 19 CONTROLLER HDMI/DVI/DP (UPTO14DEVICES) LPC 6 SATA 2.O PORTS PG 18 X4 DMI (PORT B) RGB OUT DIGITAL VIDEO OUTPUT (PORT C) 1312111083 SATA (SUPPORTED UPTO 4 REQ/GNT) E-NET PCI PWR DIGITAL VIDEO OUTPUT SATA 3.0 6GHZ. SATA 3.0 6GHZ. HDD SSD MIDBUS PROBE PG 25 J2500 Port80,serial PG 51 XDP J3900 (PORT D) PG 39 U3800 PG 18 INTERFACE PG 18 PG 19 DMI INTERFACE PG 18 HDMI/DVI/DP PG 19 PG18 PG 18 PG 18 PG20 PG 19 PG 20 PG 25 U2510 PG 39 0125679 USB2.0 DIMM’s SPI Boot ROM PG 13 U6100 PG 32 PG 31 J3200, J3200 J3100, J3100 PG 53 POWER SENSE TO BIDIVI HW PG 10 CTRL Fan MIKEY J4300 SPI B,0 BSB SMC ADC 4 PG 34PG 43 AirPort Mini PCI-E PG 49 U4900 DIGITAL VIDEO OUTPUT Conn FireWire J3400 PG 41 U4100 HDMI/DVI/DP U1000 2 SO-DIMMS J5100 Prt Ser PG 61 CLK LPC+SPI CONN (PORT A) ANALOG VIDEO OUTPUT SATA-A0 SYNTH PG 45 J4510 J4520 PG 45 PG 45 PCI-EGEN2 UPTO8LANES3 U6201 Audio Audio Conns Codec U6400, U6500 SPEAKER AMPS HEADPHONES INTERNAL/EXTERNAL MICROPHONES LINE INPUT J6600,J6601,J6602,J6603 2 SO-DIMMS GPIOs SO-DIMMS PG 48 INTEL CPU POWER SUPPLY TEMP SENSORS TEMP, CURRENT SENSE GPU HEATSINK AMBIENT INTAKE CPU DIE-PECI LEFT SKIN TEMP RIGHT SKIN TEMP MXM CONNECTOR J8400 X4 DP X4 DP LOGIC PG 84 X4 DPX4 DP T29 ROUTER X4 DP T29 LANES T29 LANES DP LANES TO INT MUX EXTERNAL PG 94 PORT CONNDISPLAY J9400 X4 DP PG 90 DISPINTERNAL J9002 Misc INTEL COUGAR POINT U1800 PG 46 PG 46 PG 47 EXTA EXTB BLUETOOTH J4610 PG 46 J4700 J4600 PG 47 PG 46 EXTDJ4630 IR EXTCJ4620 J4780 PG 36 PG 35 USB HUB1 U3500 U3600 USB HUB2 LCD TEMP OPTICAL DRIVE HARD DRIVE (OOB) MXM - GPU DIE CPU HEATSINK SATA CONN X1 PCIE GEN1 LANE 2.5GBITPS SATA 2.0 3GHZ. SATA-A1 SYNC_MASTER=K60_SIJI System Block Diagram SYNC_DATE=01/06/2011 2 OF 110 11.1.0 051-8115 2 OF 98 www.vinafix.vn
  • 3. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PP12V_T29 PP12V_S5_LED 3.75A USB Ext Port 4.7APP5V_USB_PORTx Spec:14A(170W) PM_SLP_S3 ODD_PWR_EN_L (GPIO-22) ENET_PWR_EN(GPIO-42) AP_PWR_EN(GPIO-59) PP3V3_S3 BT PAGE 34 PP3V3_S3_ENET PM_SMC_G2_EN PP12V_S5:Peak 6.9A(83W) PCH SMSC USB Hubx2 SWReg ISL8013A 1A PAGE 78 PP3V3_S3_MINI FET 2.75A/1.1A/0.19A FET 0.25A/0.2A/0.06A PP12V_G3H: FET 7A/2.7A SSD 0.8A HDD 1.8A P5VS0_EN FET 2.9A/1.2A PAGE 80 BOOT ROM PAGE 80 USB_CAMERA USB_IR PM_EN_USB_PWR FET 12V V@1.1A 1.1A/12VPP12V_T29 FANS 0.75A LCD PANEL 0.6A PP12V_S0_FWR 1.2A AUDIO 1.7A PP12V_S0_HDD 1.2A MXM 3.38A(45W TDP) PP12V_S0:Peak 16.9A(203W) 12V_G3H INA219EMC1403 I2C CLK,DATA TEMP SENSOR PAGE 76 8.8AVCCSAPPVCCSA LDO 0.925V@8.8A PAGE 76 SWReg ISL9563A PAGE 76 AIRPORT DP_RDRV 0.7/0.02A ISL62383 3.3V@6.2A PP3V3_S5_REG PAGE 77 P3V3S3_EN ODD 1.5A PAGE 38 ETHERNET SD Card(250mA) MXM 1A Max FIREWIRE FET 3.4A/ 1.9A PCH Lazarus(100mA) PP3V3_S0_SD AUDIO PP3V3_S0 ISL62383 5V@10.3A PP5V_S3_REG 1V05 VCCIO 6.5A (PCH) 1V05 T29 3A (T29) PP1V05_S0 AC/DC POWER SUPPLY (Spec:215W) PAGE 48 SMC VREF VAXG 6.5A CORE 75A CPU VCCIO 8.5A (CPU) 1.1V @ 30A PAGE 71-73 SWreg ISL6364 .65V-1.5V @ 75A/55A PPVCORE/AXG CPU PLL PAGE 46 AUDIO MXM 2.5A PCH FW PAGE 42 CPU MEM AUDIO MEM_VTT PP0V75_S0 TPS2560 PP5V_S0 P3V3S0_EN PAGE 77 MAIN MEMORY PAGE 78 PP1V5_S0 FET 6.2A/3A PM_SLP_S3 PAGE 80 0.75V @ 0.6A PAGE 75 PAGE 78 PP1V5_S3_REG TPS51116, 1.5V 11A/6.7A PP3V3_S5_AVREF_SMC PAGE 50 LDO SN0903048 SMC SW LT3470A PP3V42_G3H_REG PAGE 79 12V LED Power Spec:3.75A (45W) PP1V8_S0_REG BJT 1.0V @ 0.08A PP1V0_FWPHY SYNC_DATE=01/06/2011SYNC_MASTER=K60_JERRY Power Block Diagram 3 OF 110 11.1.0 051-8115 3 OF 98 www.vinafix.vn
  • 4. BOM OPTIONSBOM GROUP TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_BOMGROUP_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_BOMGROUP_ITEM BOM OPTIONSBOM NAMEBOM NUMBER TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM TABLE_BOMGROUP_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM BOM OPTIONSBOM NAMEBOM NUMBER TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 6 7 BOTTOM 4 3 5 2 TOP POWER GROUND SIGNAL POWER SIGNAL GROUND SIGNAL BOARD STACK-UP SIGNAL K60 ALTERNATE PARTS BOM Variants RAW: 335S0539 CPUS RAW: 335S0709 RAW: 337S3997 COMMON RAW: 335S0550 RAW: 338S0878 RAW: 335S0807 K60 PARTS BOM GROUPS CPU SOCKET & ILM SUB-BOMS SYNC_MASTER=K60_AARON BOM Configuration SYNC_DATE=N/A K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,YES_DBGPCBA,MLB,K60,2.7G,4C,PRQ,P2_ODD639-1820 K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,YES_DBGPCBA,MLB,K60,2.8G,4C,PRQ,P2_ODD639-1821 PCBA,MLB,K60,2.7G,4C,PRQ,P2_ODD,NO_DBG K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,NO_DBG639-2159 PCBA,MLB,K60,2.5G,4C,PRQ,P2_ODD,NO_DBG K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,NO_DBG639-2160 K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,YES_DBGPCBA,MLB,K60,2.5G,4C,PRQ,P2_ODD639-1767 PCBA,MLB,DEV,K60085-0801 DEVELOPMENT,DEV_GROUP BASIC2 AP,BT,IR,T29 BASIC1 COMMON,ALTERNATE,MXM,FCIM,CPU_1V5_SENSE,CPU_VCCSA_SENSE,1V05_PCH_SENSE,HUB_USX2061,PRODUCTION,VAXG,SSD NO_DBG MOJOMUX:NO,LPCPLUS:NO 371S0652 PIN DIODE371S0679 USB DIODE377S0107 377S0066 376S0972 376S0612 ROHM TRA-BJT 128S0293 330UF128S0298 341T0184 1 FLASH,EFI BOOTROM,K60/K62 CRITICALU6100 U3990SFLASH ENET 2MBIT,CIV341T0328 CRITICAL1 T29 ROUTER, IC ASSP T29338S0945 CRITICAL1 U9700 IC,T29,SERIAL EEPROM T29341T0257 CRITICAL1 U9790 IC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25341T0326 T29CRITICALU93301 IC,MXM SYS ROM,24C02 U8570341T0330 1 CRITICAL IC,SMC,K60 CRITICAL1 K60341T0185 U4900 PCBF,MLB,K60 MLB11 K60820-2641 K60SCH,MLB,K60051-8115 SCH11 2P5GHZ_SNB_CPU_PRQSNB,SR00S,PRQ,D2,2.5,65W,4+1,6M,LGA337S4043 CPU1 CRITICAL 2P7GHZ_SNB_CPU_PRQSNB,SR009,PRQ,D2,2.7,65W,4+1,6M,LGA CPU1 CRITICAL337S4062 2P8GHZ_SNB_CPU_PRQCPU1 CRITICALSNB,SR00E,PRQ,D2,2.8,65W,4+1,8M,LGA337S4061 TYCO_SOCKETU1000511S0071 CRITICAL1 SOCKET,LGA1155,CPU-LF ILM604-1474 1 TYCO_SOCKETASSY,PURCHASED,ILM,TYCO CRITICAL U1000 MOLEX_SOCKETCRITICALSOCKET,LGA1155,CPU-LF1511S0073 604-1161 MOLEX_SOCKETILM1 ASSY,PURCHASED,ILM,MOLEX CRITICAL SUB ASSY,CPU SOCKET,K60,TYCO TYCO_SOCKET085-2452 085-2453 SKT_ILM MOLEX ALTERNATE085-2452 CRITICAL1 TYCO CPU SOCKET AND ILM SKT_ILM085-2452 085-2453 MOLEX_SOCKETSUB ASSY,CPU SOCKET,K60,MOLEX DEV_GROUP VREFMRGN_A,VREFMRGN_B,DIMM_1V5_SENSE YES_DBG XDP,XDP_CONN,XDP_CPU_BPM,MOJOMUX:YES,LPCPLUS:YES IC,BCM57765,ENET&SD,8X8 CRITICAL343S0534 1 U3900 MLB LABEL,48.0X4.8 X14 CRITICAL825-7122 1 353S3055 IC,PI3VEDP212,X2 DP MUX,QFN CRITICAL1 U9390 IC,FW643,1394B_PCIE,PHY/LINK U4100 CRITICAL338S0753 1 337S4088 IC,COUGAR POINT,SLJ4F,BD82Z68,PRQ,B31 CRITICALU1800 639-2118 PCBA,MLB,K60,2.5G,4C,PRQ,P1_ODD K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,YES_DBG PCBA,MLB,K60,2.7G,4C,PRQ,P1_ODD639-2122 K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,YES_DBG PCBA,MLB,K60,2.8G,4C,PRQ,P1_ODD K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,YES_DBG639-2119 PCBA,MLB,K60,2.5G,4C,PRQ,P1_ODD,NO_DBG K60,2P5GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,NO_DBG639-2132 PCBA,MLB,K60,2.7G,4C,PRQ,P1_ODD,NO_DBG K60,2P7GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,NO_DBG639-2133 K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P1,NO_DBG639-2134 PCBA,MLB,K60,2.8G,4C,PRQ,P1_ODD,NO_DBG PCBA,MLB,K60,2.8G,4C,PRQ,P2_ODD,NO_DBG K60,2P8GHZ_SNB_CPU_PRQ,BASIC1,BASIC2,CPUVCORE-3PH,ODD_SATA:P2,NO_DBG639-2161 4 OF 110 11.1.0 051-8115 4 OF 98 www.vinafix.vn
  • 5. IN G D SIN G D SIN G D SIN IN G D S G D S IN G D SIN G D SIN G D SIN IN G D S II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 S5 Led SILKSCREEN:1 SILKSCREEN:6 SILKSCREEN:7 SILKSCREEN:8 SILKSCREEN:10 SILKSCREEN:11 VIDEO ON LedMXM PWR GOOD Led SILKSCREEN:4 SILKSCREEN:3 SILKSCREEN:2 SILKSCREEN:9 SILKSCREEN:12 ALL_SYS_PWRGD Led PROTO DEBUG LEDS ARE SHOWN BELOW SILKSCREEN:5 192632364647638297 K A LED550 DEVELOPMENT GREEN-3.6MCD 2.0X1.25MM-SM SILK_PART=VCORE_PGOOD 4 5 3 Q540 SOT-363 2N7002DW-X-G DEVELOPMENT 25646597 K A LED500 2.0X1.25MM-SM DEVELOPMENT GREEN-3.6MCD SILK_PART=SLP_S4 K A LED530 SILK_PART=DDR_PGOOD DEVELOPMENT GREEN-3.6MCD 2.0X1.25MM-SM 2 1 R540 DEVELOPMENT MF-LF 5% 3.3K 1/16W 402 1 2 6 Q520 2N7002DW-X-G SOT-363 DEVELOPMENT 637197 K A LED540SILK_PART=PCHCORE_PGOOD 2.0X1.25MM-SM GREEN-3.6MCD DEVELOPMENT 1 2 6 Q540 SOT-363 2N7002DW-X-G DEVELOPMENT 6497 2 1 R500 3.3K 5% MF-LF DEVELOPMENT 1/16W 402 2 1 R530 DEVELOPMENT 3.3K 5% MF-LF 1/16W 402 2 1 R550 3.3K 5% MF-LF DEVELOPMENT 1/16W 402 2 1 R502 1/16W 5% MF-LF 1K 402 81 K A LED502GREEN-3.6MCD 2.0X1.25MM-SM 4 5 3 Q502 2N7002DW-X-G SOT-363 4 5 3 Q500 DEVELOPMENT SOT-363 2N7002DW-X-G 2 1 R504 5% MF-LF 1/16W 402 1K 326497 K A LED504GREEN-3.6MCD 2.0X1.25MM-SM 2 1 R505 DEVELOPMENT MF-LF 5% 1K 1/16W 402 K A LED505 2.0X1.25MM-SM GREEN-3.6MCD DEVELOPMENT 2 1 R5011K 1/16W 402 MF-LF 5% K A LED501 2.0X1.25MM-SM GREEN-3.6MCD 2 1 R510 402 1/16W DEVELOPMENT 5% 3.3K MF-LF 2 1 R503 402 1K 5% 1/16W MF-LF K A LED503 2.0X1.25MM-SM GREEN-3.6MCD 1 2 6 Q502 2N7002DW-X-G SOT-363212597 2 1 R549 DEVELOPMENT 3.3K MF-LF 5% 1/16W 402 K A LED542 GREEN-3.6MCD 2.0X1.25MM-SM SILK_PART=VAXG_PGOOD DEVELOPMENT 4 5 3 Q520 2N7002DW-X-G SOT-363 DEVELOPMENT 6597 K A LED510SILK_PART=SLP_S3 DEVELOPMENT GREEN-3.6MCD 2.0X1.25MM-SM 2 1 R560 DEVELOPMENT 5% MF-LF 3.3K 1/16W 402 K A LED560 DEVELOPMENT 2.0X1.25MM-SM GREEN-3.6MCD SILK_PART=SLP_S5 4 5 3 Q530 2N7002DW-X-G SOT-363 DEVELOPMENT 1946476397 2 1 C501 20% 0.1UF 10V 402 CERM 193246476397 1 2 6 Q500 SOT-363 DEVELOPMENT 2N7002DW-X-G SYNC_MASTER=K62 SYNC_DATE=01/06/2011 DEBUG LEDS =PP3V3_S5_LED =PP3V3_S5_LED CORE_VOLTAGES_ON PM_PGOOD_PVCORE_CPU =PP3V3_S0_LED GPU_PRESENT_R VIDEO_ON_L PM_LED1_AXG =PP3V3_S0_LED PM_LED_AXG PM_LED_PCHCORE PM_LED1_PCHCORE PGOOD_PCH_S0 MXM_GOOD GPU_PRESENT_DRAIN =PP3V3_S0_LED LCD_SHOULD_ON_R =PP3V3_S0_LED PM_LED1_DDRREG PM_LED_DDRREG PM_LED1_S3 PM_LED_S3 PM_LED1_PVCORE CORE_VOLTAGES_ON_R =PP3V3_S3_LED ITS_PLUGGED_IN PM_PGOOD_DDR1V5_S3_REG PM_LED_PVCORE PM_PGOOD_PVAXG =PP3V3_S3_LED ITS_ALIVE PM_SLP_S4_L PM_LED1_S4 =PP3V3_S5_LED PM_LED_S4 PM_LED_S5 =PP3V3_S5_LED PM_LED1_S5 PM_SLP_S5_L PM_SLP_S3_L ALL_SYS_PWRGD_R =PP3V3_S5_LED =PP3V3_S0_LED 5 OF 110 11.1.0 051-8115 5 OF 98 56 56 56 56 56 56 56 56 56 56 56 56 www.vinafix.vn
  • 6. IN BI G S D IN G S D BI IN G S D IN IN BI IN II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 3V3 RISES BEFORE MLB TO BLC ISOLATION CIRCUIT FET DIODE IS S TO D MLB 3V3). (FACES BLC WHICH POWER SUPPLY TO MLB "G3H" RAILS T29 RAILS ON IN RUN AND SLEEP BLC SDA/SCL 518S0543 MLB TO PS 518S0813 518-0373 ALWAYS ON WHEN UNIT HAS AC POWER AND IN S5 ONLY ON IN RUN "S0" RAILS "S5" RAILS GND RAILS "S3" RAILS ALWAYS ON WHEN UNIT HAS AC POWER AND IN G3HOT PER SMC G3H: ALIASES 2 1 C602 402 CERM 50V 5% 47PF 21 R602 402 1/16W 0 5% 2 1 C604 CERM 402 50V 47PF 5% 21 R601 402 0 5% 1/16W 2 1 C603 0.001UF 10% X7R 50V 402 PLACE C603 CLOSE TO CONNECTOR 49 49 2 1 C610 603-1 PLACE C610 CLOSE TO CONNECTOR 25V X5R 10% 1UF 21R605 0 402 5%1/16W 6 5 4 3 2 1 J600 M-RT-TH 76833-0106 2 1 3 Q610 2N7002 SOT23-HF1 2 1 C606 X7R PLACE C606 CLOSE TO CONNECTOR 10% 0.001UF 50V 4026397 2 1 C611 PLACE C611 CLOSE TO CONNECTOR 25V X5R 10% 1UF 603-1 7 6 5 4 3 2 1 J601 50293-00771-H01 M-ST-SM CRITICAL 21 R631 0 1/16W 402 5% 2 1 C628 NOSTUFF 402 47PF 5% 50V CERM 8 7 6 5 4 3 2 1 10 9 J602 CRITICAL F-RT-SM 53780-8608 2 1 R620 402 MF-LF 1/16W 5% 021 R622 0 1/16W 402 5% 21 L602 FERR-1000-OHM 0402 2 1 C627 NOSTUFF 47PF 402 5% 50V CERM 21 R630 5% 1/16W 0 402 1 2 6 Q600 2N7002DW-X-G SOT-363 498194 498194 2 1 C621 47PF 5% 402 CERM 50V NOSTUFF 21 R617 1/16W 402 5% 0 NOSTUFF 21 R618 5% 402 0 NOSTUFF 1/16W 4 5 3 Q600 2N7002DW-X-G SOT-363 152191 8197 49 49 2 1 C622 NOSTUFF 50V 5% 402 47PF CERM Power Conn / Alias SYNC_MASTER=K60_MARK SYNC_DATE=12/30/2010 GND MAX_NECK_LENGTH=4.1 MM MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=GND VOLTAGE=0V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM =PP3V3_G3H_LPCPLUS =PP3V3_G3H_SMCUSBMUX =PP3V3_G3H_SMC PP3V42_G3H_REG =PP12V_S5_T29_A =PP12V_S5_PWRCTL =PP12V_S5_P5VS3_VREG PP12V_S5_FET PP5V_S5_LDO =PP5V_S5_PCH NET_SPACING_TYPE=POWER MIN_LINE_WIDTH=0.6MM VOLTAGE=3.42V MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM PP3V42_G3H VOLTAGE=12V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=POWER MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM PP12V_S5 MAKE_BASE=TRUE NET_SPACING_TYPE=POWER VOLTAGE=5V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 mm MAX_NECK_LENGTH=3 MM PP5V_S5 =PP3V3_S5_RSTBUF =PP3V3_S5_PCH_VCCSUS3_3_USB =PP3V3_S0_SMC_LS =PP3V3_S0_SMBUS =PP3V3_S0_ENET_PHY =PP3V3_S0_T29I2C =PP3V3_S0_DP =PP3V3_S0_PCH_VCC3_3_PCI =PP3V3_S0_PCH_PM =PP3V3_S0_P1V05_VREG =PP3V3_S0_PCH_VCC3V3 =PP3V3_S3_VRD =PP3V3_S3_VREFMRGN =PP3V3_S0_DPSDRVA =PP3V3_S0_INTDPMUX =PP1V5_S0_CK505 =PP3V3_S0_SATALED =PP3V3_S0_PCH_VCC3_3_GPIO VOLTAGE=1.5V MIN_LINE_WIDTH=0.4MM NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE PP1V5_S0 =PP1V5_S0_PWR PP1V5_S0_FET =PP1V5_S0_AUD_DIG =PPVCCSA_S0_PWRCTL =PPVCCIO_S0_CPU_VCCSA PPVCCSA_S0_INPUT_SNS MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM VOLTAGE=1.05V MAX_NECK_LENGTH=3 MM MAKE_BASE=TRUE NET_SPACING_TYPE=POWER PP1V05_S0_INPUT_VCCSA =PP3V3_S0_T29PWRCTL =PP3V3_S0_P3V3T29FET =PP3V3_S0_LED =PP3V3_S0_VRD =PP3V3_S0_SDCARD =PP3V3_S0_SMBUS_SMC_BSA =PP3V3_S0_RSTBUF =PP3V3_S0_PCH_VCC3_3_SATA =PP3V3_S0_PCH_STRAPS =PP3V3_S0_PCH_GPIO =PP3V3_S0_FWPHY =PP3V3_S0_PWRCTL =PP3V3_S0_SENSE =PP3V3_S0_ODD =PP3V3_S0_MXM =PP3V3_S0_SMBUS_SMC_0 =PPSPD_S0_MEM_B =PP3V3_S0_PCH PP3V3_S0_FET =PP1V5_S0_CPU_MEM PPVAXG_S0 MAKE_BASE=TRUE VOLTAGE=1.05V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.3MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER PP1V05_S0_REG =PP1V05_S0_PWR PP12V_S0_PS =PP5V_S0_LPCPLUS =PP5V_S3_P3V3R2V9_REG_A =PP5V_S3_VREFMRGN =PP5V_S3_DDR_VREG =PP5V_S3_MEMRESET =PP5V_S3_IR =PP5V_S3_CAMERA MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=POWER VOLTAGE=5V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM PP5V_S3 =PP3V3_S5_CPU_VCCSA =PP3V3_S5_MEMRESET =PP3V3_S5_PCH =PP3V3_S5_PCH_GPIO =PP3V3_S5_PCH_VCCSPI =PP3V3_S5_S3FET =PP3V3_S5_VRD PP3V3_S5_REG NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.25MM MAKE_BASE=TRUE VOLTAGE=1.05V MIN_LINE_WIDTH=0.5MM MAX_NECK_LENGTH=3 MM PP1V05_S0 =PP1V05_S0_PCH_VCCIO_SATA =PP1V05_S0_PCH_VCCIO_PCIE =PP1V05_S0_PCH_VCC_CORE =PP12V_S0_CPU_VCCSA PP12V_S0_MXM_SNS =PP12V_S0_MXM =PP12V_S0_SENSE =PP12V_S0_PWRCTL =PP12V_S0_P1V05_VREG =PP12V_S0_LCD =PP12V_S0_VRD =PP12V_S0_AUDIO_SPKRAMP =PP3V3_SW_DPAPWR =PP3V3_S3_MEMRESET =PP1V05_S0_PCH_VCCADPLLMIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER MIN_LINE_WIDTH=0.6 mm VOLTAGE=1.05V PP1V05_S0_PCH =PPVCCIO_S0_CPU =PPVCCIO_S0_XDP =PP12V_S0_MXM_PWR PP1V5_S3_REG MIN_LINE_WIDTH=0.6MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM VOLTAGE=12V NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM PP12V_S0_MXM =PP1V05_S0_PCH_VCCASW =PP1V05_S0_PCH =PP1V8_S0_PCH =PP5V_S0_P1V8_REG PPVCORE_S0_CPU_REG =PP1V5_S3_MEMRESET =PP1V5_S3_MEM_PWR =PP3V3R1V8_S0_PCH_VCCDFTERM =PP1V8_S0_CPU_PLL =PP0V75_S0_MEM_VTT_A =PPVCORE_S0_CPU =PPVCCSA_S0_INPUT_PWR =PP5V_S0_P1V05_VREG =PP5V_S0_PCH =PP1V05_S0_PCH_VCC_DMI =PP1V05_S0_PCH_PWR =PP1V8R1V5_S0_PCH_VCCVRM =PP1V8_S0_PWRCTL PP1V8_S0_REG PP0V75_S0 MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.4 mm VOLTAGE=0.75V =PP1V05_S0_PCH_V_PROC_IO NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm VOLTAGE=1.5V MAKE_BASE=TRUE PP1V5_S3 =PP12V_S0_SATA PPVAXG_S0_REG =PP3V3_T29_RTR =PP12V_G3H_S5_FET =PP1V05_S0_PCH_VCCSSC =PP0V75_S0_MEM_VTT_B PPVTT_S0_DDR_FET MAX_NECK_LENGTH=3 MM VOLTAGE=1.1V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.3MM NET_SPACING_TYPE=POWER MAKE_BASE=TRUE PPVCORE_S0_CPU =PP5V_S0_MXM =PP5V_S0_AUDIO =PP5V_S0_VRD PP1V05_T29_FET =PP1V05_T29_RTR =PP1V05_T29 MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER VOLTAGE=1.05V MIN_LINE_WIDTH=0.6MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM PP1V05_S0_T29 =PPVCCIO_S0_SMC =PP1V5_S3_S0FET PP3V3_T29_FET =PP1V05_S0_PCH_VCCDIFFCLK PP1V05_S0_PCH_SNS =PP5V_S0_ISENSE =PP1V05_S0_CK505 PP12V_G3H_ACDC MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER MIN_LINE_WIDTH=0.6MM MAKE_BASE=TRUE VOLTAGE=3.3V MIN_NECK_WIDTH=0.2MM PP3V3_S0_T29 =PP0V75_S0_MEM_VTT_S0FET PP5V_S0_FET =PP12V_G3H_3V42 MAKE_BASE=TRUE VOLTAGE=12V MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM PP12V_G3H =PP12V_S0_FAN =PP5V_S0_SATA =PP3V3_S3_LED MAKE_BASE=TRUE VOLTAGE=5V MIN_LINE_WIDTH=0.5 mm NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.2 MM MAX_NECK_LENGTH=3 MM PP5V_S0 PP1V5_S3_MEM_SNS NET_SPACING_TYPE=POWER VOLTAGE=1.5V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm MAX_NECK_LENGTH=3 MM PP1V5_S3_MEM =PP3V3_S3_SDCARD =PP3V3_S3_ENET_PHY =PP3V3_S3_USB_HUB =PP3V3_S3_PWRCTL =PP3V3_S3_SMBUS_SMC_A =PP3V3_S0_AUDIO =PP3V3_S5_ROM =PP3V3_S5_PCH_STRAPS =PP3V3_S5_P3V3R2V9_A MAKE_BASE=TRUE NET_SPACING_TYPE=POWER VOLTAGE=3.3V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM PP3V3_S5 =PP3V3_S5_SMCUSBMUX =PP3V3R1V5_S5_PCH_VCCSUSHDA =PP12V_S0_FW NET_SPACING_TYPE=POWER MIN_NECK_WIDTH=0.5mm MIN_LINE_WIDTH=1mm VOLTAGE=12V MAX_NECK_LENGTH=3 MM MAKE_BASE=TRUE PP12V_S0 =PP1V05_S0_P1V05T29FET =PP1V05_S0_PCH_VCCIO_DMI =PP1V05_S0_PCH_VCCIO_USB =PPVCCSA_S0_CPU MIN_LINE_WIDTH=0.4MM NET_SPACING_TYPE=POWER MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM VOLTAGE=3.3V PP3V3_S0 =PP1V5_S0_MINI PPVTT_S0_DDR_LDO MAKE_BASE=TRUE MIN_LINE_WIDTH=0.5MM NET_SPACING_TYPE=POWER VOLTAGE=1.8V MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.25MM PP1V8_S0 =PP3V3_S0_SMBUS_SMC_B =PP3V3_S0_SMBUS_SMC_MGMT NET_SPACING_TYPE=POWER PPVTT_S0_DDR MIN_LINE_WIDTH=0.4 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE MAX_NECK_LENGTH=3 MM VOLTAGE=0.75V PP12V_G3H_ACDC PP12V_S0_PS PS_ON BL_PWM BL_EN SMB_ACDC_SCL_RC ISOLATED_GND2 =SMB_ACDC_SDA PM_EN_P12V_S0_FET =SMB_ACDC_SCL SMB_BLC_PCH_SDA_R ISOLATED_GND VSYNC_DP_CONN_R BLC_GPIO_R VSYNC_DP_CONN BLC_GPIO =SMB_BLC_PCH_SCL =PP3V3_G3H_RTC_D =PP12V_S5_DDR_VREG =PP3V3_S5_LED =PP3V3_S5_USB_HUB =PP3V3_S5_PCH_VCCDSW =PP3V3_S5_LPCPLUS =PP3V3_S5_XDP =PP3V3_S5_S0FET =PP3V3_S5_PWRCTL SMB_BLC_TCON_SCL =PP1V5_S0_DP =PPVAXG_S0_CPU SMB_BLC_TCON_SCL_R SMB_BLC_TCON_SDA_RSMB_BLC_TCON_SDA SMB_BLC_PCH_SCL_R =PP3V3_S0_CK505 PP1V5_S0_CPU_MEM_SNSPP1V5_S0_CPU_MEM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER VOLTAGE=1.5V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM =SMB_BLC_PCH_SDA =PP3V3_S0_SMBUS SMB_ACDC_SDA_RC VOLTAGE=0.925V MIN_NECK_WIDTH=0.3MM MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=POWER MAX_NECK_LENGTH=3 MM PPVCCSA_S0_CPU PPVCCSA_S0_FET =PP3V3R1V5_S0_PCH_VCCSUSHDA =PPSPD_S0_MEM_A =PP3V3_S0_PCH_VCCADAC =PP3V3_S0_FAN =PP5V_S3_S0FET =PP5V_S3_USB PP5V_S3_REG =PP3V3_S3_SYSCLK =PP3V3_S3_MINI =PP3V3_S3_BT PP3V3_S3_FET =PP1V5_S3_MEM_B =PP1V5_S3_MEM_A =PP3V3_S3_P3V3R2V9_REG_A =PP3V3_S3_PCH VOLTAGE=3.3V MIN_LINE_WIDTH=0.4MM MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=POWER MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2MM PP3V3_S3 6 OF 110 11.1.0 051-8115 6 OF 98 48 43 46 47 72 82 33 64 73 70 74 95 70 24 95 95 95 27 22 24 47 51 6 49 36 37 49 81 22 24 27 68 22 24 71 28 84 83 26 18 42 22 24 95 50 73 56 64 69 5095 80 80 5 65 68 45 49 11 27 22 24 15 20 45 39 40 41 63 64 73 80 50 52 42 21 64 75 76 49 31 18 21 24 73 11 13 16 28 29 95 68 50 6 48 82 28 71 32 44 44 9598 69 32 18 19 21 24 20 22 24 73 70 70 95 18 22 24 18 19 22 24 22 24 69 50 75 51 63 64 80 68 81 65 58 59 78 32 17 95 10 11 13 16 65 25 50 71 95 22 24 18 24 79 19 71 66 32 50 22 24 13 16 30 13 16 50 65 50 69 68 24 22 24 50 24 79 64 71 95 22 24 95 42 67 79 80 86 87 74 22 24 31 32 95 75 56 65 67 80 87 80 95 46 47 73 80 22 24 50 50 26 6 95 32 73 72 95 53 54 42 5 9598 5095 44 45 36 34 35 64 73 82 49 56 58 59 60 61 62 48 55 15 82 95 43 24 41 95 80 22 24 22 24 13 50 95 33 71 95 49 49 95 6 6 8397 8197 27 71 5 34 22 24 48 25 73 11 63 64 83 13 17 50 65 26 5095 649 95 69 24 30 47 17 53 54 73 43 70 79 33 44 73 28 29 31 28 29 30 82 21 9598 www.vinafix.vn
  • 7. REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 MXM STANDOFFS (835-0272) Rear Cover Standoffs (was 860-1255 but now replaced with 860-1430) 4mm Plated Holes (998-0850) DIMM CONNECTOR NUTS Nuts (805-9582) CPU Heatsink PCH HEATSINK MOUNTING HOLES (998-0873, 998-0976) EMC Spring (870-1577); Near DIMMs For EMC 1 ZH0700 OMIT 4P75R4 1 ZH0701 OMIT 4P75R4 1 ZH0702 OMIT 4P75R4 1 ZH0703 OMIT 4P75R4 1 SC0702 NOSTUFF EMI-SPRING CLIP-SM-K2 1 SDF0713 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 NUT0753 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 NUT0752 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 NUT0751 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 NUT0750 CRITICAL NUT-4.25OD1.4H-1.40-3.25-TH 1 SDF0714 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 SDF0715 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 SDF0717 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 SDF0718 CRITICAL STDOFF-6.8OD15.0H-1.56-TH OMIT_TABLE 1 ZH0711 OMIT 5P45R3P6 1 ZH0712 5P45R3P6 OMIT 1 SDF0721 CRITICAL NUT-6.5OD2.7H-1.56-3.8-TH 1 SDF0720 NUT-6.5OD2.7H-1.56-3.8-TH CRITICAL Holes SYNC_MASTER=K74_MASTER SYNC_DATE=N/A STANDOFF,MLB,K60/K62860-1430 5 SDF0713,SDF0714,SDF0715,SDF0717,SDF0718 7 OF 110 11.1.0 051-8115 7 OF 98 www.vinafix.vn
  • 8. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 NC ON UNUSED PCI ALIASES UNUSED CPU SIGNALS NC ON UNUSED MISC ALIASES NC ON UNUSED FDI ALIASES NC ON UNUSED MEM ALIASES NC ON UNUSED DISPLAY ALIASES NC ON UNUSED USB ALIASES NC ON UNUSED SATA ALIASES NC ON UNUSED PCIE ALIASES SYNC_DATE=01/06/2011 UNUSED SIGNAL ALIAS SYNC_MASTER=K62 TP_CRT_IG_HSYNC NC_DP_IG_C_AUXN NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_C_HPD TP_SATA_E_R2D_CN TP_SATA_D_D2RN TP_SATA_F_D2RN NC_PE_RXN<3..0> NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_B_MLN<3..0> TP_DP_IG_B_MLP<3..0> TP_DP_IG_B_AUX_N TP_DP_IG_B_AUX_P MAKE_BASE=TRUE NO_TEST=TRUE NC_DP_IG_B_HPD MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_CLK100M_PE5N MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_R2D_PETP4 TP_PCIE_D2R_PERP4 TP_PCIE_R2D_PETP4 TP_PCIE_R2D_PETN4 NC_PCIE_R2D_PETN4 NO_TEST=TRUEMAKE_BASE=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_D2R_PERN4 NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_D2R_PERP4 TP_USB_13N MAKE_BASE=TRUE NC_USB_13N NO_TEST=TRUE TP_USB_13P MAKE_BASE=TRUE NC_USB_13P NO_TEST=TRUE TP_USB_12P NC_USB_12P MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_12N NC_USB_12N NO_TEST=TRUEMAKE_BASE=TRUE TP_USB_11P NO_TEST=TRUE NC_USB_11P MAKE_BASE=TRUE TP_USB_11N MAKE_BASE=TRUE NC_USB_11N NO_TEST=TRUE TP_USB_10N NC_USB_10N MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_10P NC_USB_10P MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_7N MAKE_BASE=TRUE NO_TEST=TRUE NC_USB_7N TP_USB_7P NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_7P TP_USB_6P NO_TEST=TRUE NC_USB_6P MAKE_BASE=TRUE TP_USB_6N MAKE_BASE=TRUE NO_TEST=TRUE NC_USB_6N TP_USB_5N NC_USB_5N MAKE_BASE=TRUE NO_TEST=TRUE TP_USB_5P NO_TEST=TRUE NC_USB_5P MAKE_BASE=TRUE TP_USB_4P NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_4P TP_USB_3P NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_3P TP_USB_4N NO_TEST=TRUEMAKE_BASE=TRUE NC_USB_4N TP_USB_3N NC_USB_3N NO_TEST=TRUEMAKE_BASE=TRUE TP_USB_2P NO_TEST=TRUE NC_USB_2P MAKE_BASE=TRUE TP_USB_2N MAKE_BASE=TRUE NO_TEST=TRUE NC_USB_2N TP_USB_1P NO_TEST=TRUE NC_USB_1P MAKE_BASE=TRUE TP_USB_1N NO_TEST=TRUE NC_USB_1N MAKE_BASE=TRUE TP_CRT_IG_BLUE TP_PCI_RESET_L MAKE_BASE=TRUE NC_PCI_RESET_L NO_TEST=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_PCI_AD<31..0> NC_PCI_PAR NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_B_DDC_DATA MAKE_BASE=TRUE NC_MEM_A_DQ_CB<7..0> NO_TEST=TRUE TP_PE_RX_N<3..0> NC_PE_TXN<3..0> NO_TEST=TRUEMAKE_BASE=TRUE TP_DP_IG_C_CTRL_CLK TP_PCH_FDI_RX_P<7..0> NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_B_MLP<3..0> NO_TEST=TRUE NC_DP_IG_B_AUXN MAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_VSYNC NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_B_MLN<3..0> TP_PCI_C_BE_L<3..0> TP_PCH_L_BKLTCTL TP_PCH_L_BKLTEN TP_PCH_L_VDD_EN TP_SDVO_TVCLKINN NC_SDVO_TVCLKINP NO_TEST=TRUEMAKE_BASE=TRUE TP_PCH_FDI_RX_N<7..0> TP_CPU_FDI_TX_N<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_D2RN NC_PCH_FDI_RXN<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_CLK100M_PE7N NO_TEST=TRUEMAKE_BASE=TRUE NO_TEST=TRUE NC_PCIE_CLK100M_PE7P MAKE_BASE=TRUE TP_DP_IG_B_HPD TP_DP_IG_C_AUX_N TP_CRT_IG_DDC_DATA TP_MEM_A_DQS_N<8> MAKE_BASE=TRUE NC_MEM_A_DQSN<8> NO_TEST=TRUE TP_MEM_A_DQ_CB<7..0> MAKE_BASE=TRUE NC_PCH_CL_RST1 NO_TEST=TRUE TP_PCH_SST TP_PCH_PWM2 MAKE_BASE=TRUE NC_PCH_L_BKLTEN NO_TEST=TRUE TP_PCH_CLKOUT_DPN TP_PCH_CLKOUT_DPP NC_PCH_CLKOUT_DPN MAKE_BASE=TRUE NO_TEST=TRUE NC_PCH_CLKOUT_DPP NO_TEST=TRUEMAKE_BASE=TRUE NC_PCH_L_VDD_EN NO_TEST=TRUEMAKE_BASE=TRUE TP_SATA_E_R2D_CP TP_SATA_F_R2D_CN TP_SATA_F_R2D_CPMAKE_BASE=TRUE NO_TEST=TRUE NC_DP_IG_D_MLN<3..0> NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_F_D2RN NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_E_R2D_CP NC_SATA_E_R2D_CN NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_E_D2RP MAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_R2D_CP NO_TEST=TRUEMAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_R2D_CN MAKE_BASE=TRUE MAKE_BASE=TRUE NC_SATA_E_D2RN NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_SATA_D_D2RP TP_SATA_E_D2RP TP_SATA_D_D2RP TP_SATA_E_D2RN TP_SATA_D_R2D_CP TP_SATA_D_R2D_CN TP_SATA_F_D2RP NO_TEST=TRUEMAKE_BASE=TRUE NC_PCH_FDI_RXP<7..0> TP_CPU_FDI_TX_P<7..0> NC_CPU_FDI_TXN<7..0> NO_TEST=TRUEMAKE_BASE=TRUE MAKE_BASE=TRUE NC_SDVO_TVCLKINN NO_TEST=TRUE NC_DP_IG_D_CTRL_CLK NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_D_AUXN MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_D_MLP<3..0> NO_TEST=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_C_CTRL_DATA NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_C_HPD NC_DP_IG_B_CTRL_DATA MAKE_BASE=TRUE NO_TEST=TRUE NC_DP_IG_B_CTRL_CLK NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_HSYNC NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_BLUE MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_CRT_IG_GREEN NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_CRT_IG_DDC_DATA TP_CRT_IG_RED TP_MEM_B_DQS_P<8> NC_HDA_SDIN1 MAKE_BASE=TRUE NO_TEST=TRUE TP_DP_IG_D_HPD TP_DP_IG_D_CTRL_DATA TP_SDVO_STALLN TP_DP_IG_D_MLP<3..0> TP_DP_IG_C_CTRL_DATA TP_DP_IG_C_AUX_P TP_DP_IG_C_MLP<3..0> TP_DP_IG_C_MLN<3..0> TP_DP_IG_B_DDC_CLK TP_CRT_IG_VSYNC NO_TEST=TRUE NC_PCH_PWM0 MAKE_BASE=TRUE NC_HDA_SDIN3 MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_HDA_SDIN2 NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_MEM_B_DQSP<8> MAKE_BASE=TRUE NO_TEST=TRUE NC_MEM_B_DQSN<8>TP_MEM_B_DQS_N<8> NC_MEM_B_DQ_CB<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_MEM_A_DQSP<8> MAKE_BASE=TRUE NO_TEST=TRUE TP_MEM_A_DQS_P<8> TP_PCH_PWM1 TP_HDA_SDIN1 TP_MEM_B_DQ_CB<7..0> TP_HDA_SDIN3 TP_HDA_SDIN2 NC_SATA_F_D2RP NO_TEST=TRUEMAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_DP_IG_D_CTRL_DATA NC_SATA_F_R2D_CP MAKE_BASE=TRUE NO_TEST=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_SATA_F_R2D_CN NC_DP_IG_D_HPD MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_C_AUXP NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_C_MLN<3..0> NO_TEST=TRUE MAKE_BASE=TRUE NC_CPU_FDI_TXP<7..0> NO_TEST=TRUE NC_DP_IG_C_MLP<3..0> MAKE_BASE=TRUE NO_TEST=TRUE TP_DP_IG_D_CTRL_CLK TP_DP_IG_D_AUXP MAKE_BASE=TRUE NC_DP_IG_C_CTRL_CLK NO_TEST=TRUE NC_DP_IG_D_AUXP MAKE_BASE=TRUE NO_TEST=TRUE NO_TEST=TRUE NC_SDVO_STALLN MAKE_BASE=TRUE TP_SDVO_INTP TP_SDVO_INTN TP_SDVO_STALLP MAKE_BASE=TRUE NC_SDVO_INTP NO_TEST=TRUE NO_TEST=TRUE NC_SDVO_INTN MAKE_BASE=TRUE NC_PCH_L_BKLTCTL MAKE_BASE=TRUE NO_TEST=TRUE MAKE_BASE=TRUE NC_DP_IG_B_AUXP NO_TEST=TRUE TP_DP_IG_D_AUXN NC_SDVO_STALLP MAKE_BASE=TRUE NO_TEST=TRUE TP_PCH_PWM3 NO_TEST=TRUE NC_PCH_SST MAKE_BASE=TRUE NO_TEST=TRUE NC_PCH_PWM3 MAKE_BASE=TRUE TP_PCH_CL_DATA1 TP_PCH_CL_RST1 NO_TEST=TRUEMAKE_BASE=TRUE NC_PCH_PWM2 MAKE_BASE=TRUE NC_PCH_PWM1 NO_TEST=TRUE TP_PCH_PWM0 NC_PCH_CL_DATA1 NO_TEST=TRUEMAKE_BASE=TRUE TP_PCH_CL_CLK1 NC_PCH_CL_CLK1 NO_TEST=TRUEMAKE_BASE=TRUE TP_PCI_AD<31..0> TP_LPC_DREQ0_L NO_TEST=TRUEMAKE_BASE=TRUE NC_CRT_IG_DDC_CLK TP_DP_IG_D_MLN<3..0> TP_CRT_IG_DDC_CLK MAKE_BASE=TRUE NO_TEST=TRUE NC_PE_RXP<3..0>TP_PE_RX_P<3..0> TP_PE_TX_N<3..0> NC_PE_TXP<3..0> NO_TEST=TRUEMAKE_BASE=TRUE MAKE_BASE=TRUE NC_CRT_IG_RED NO_TEST=TRUE NO_TEST=TRUE NC_PCI_C_BE_L<3..0> MAKE_BASE=TRUE TP_SDVO_TVCLKINP TP_CRT_IG_GREEN TP_PCIE_CLK100M_PE5P TP_PCIE_CLK100M_PE5N TP_PCIE_CLK100M_PE6P TP_PCIE_CLK100M_PE6N NO_TEST=TRUE NC_PCIE_CLK100M_PE5P MAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_CLK100M_PE6P NC_PCIE_CLK100M_PE6N NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_CLK100M_PE4N NO_TEST=TRUEMAKE_BASE=TRUE NC_PCIE_CLK100M_PE4P MAKE_BASE=TRUE NO_TEST=TRUE TP_PCIE_CLK100M_PE4N TP_PCIE_CLK100M_PE4P TP_PCIE_CLK100M_PE7N TP_PCIE_CLK100M_PE7P TP_CPU_RSVD<46..19> TP_CPU_RSVD<16..1> NO_TEST=TRUEMAKE_BASE=TRUE NC_CPU_RSVD<16..1> MAKE_BASE=TRUE NO_TEST=TRUE NC_CPU_RSVD<46..19> TP_PCI_PAR NO_TEST=TRUEMAKE_BASE=TRUE NC_LPC_DREQ0_L TP_PCIE_D2R_PERN4 TP_PE_TX_P<3..0> 8 OF 110 11.1.0 051-8115 8 OF 98 19 19 18 18 18 19 19 19 19 18 18 18 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 19 20 19 10 19 19 20 18 18 18 19 19 10 19 19 19 12 12 21 21 18 18 18 18 18 18 18 18 18 18 18 10 19 12 19 19 19 19 19 19 19 19 19 19 12 12 21 18 12 18 18 19 19 19 19 19 19 21 18 18 21 18 20 18 19 19 10 10 19 19 18 18 21 21 18 18 21 21 10 10 20 18 10 www.vinafix.vn
  • 9. OUT OUTIN IN IN IN OUT OUT IN IN IN OUT OUTIN OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 THIS SIGNAL NAME IS CONNECTED TO MXM PEG Slot Support 77 90 77 9010 10 77 90 77 90 10 10 18 18 199197 21 R929 PLACEMENT_NOTE=PLACE CLOSE TO U1800 1/16W 5% MF-LF 22 402 46 91 97 75 9721 75 75 SYNC_DATE=01/06/2011SYNC_MASTER=K62 Signal Aliases CLK_100M_MXM_P MAKE_BASE=TRUE PEG_RESET_LMXM_RESET_L PEG_CLK100M_P PM_CLK32K_SUSCLK_R PM_CLK32K_SUSCLK =PEG_D2R_P<0..15> MAKE_BASE=TRUE PEG_D2R_P<0..15> =PEG_R2D_C_N<0..15> =PEG_D2R_N<0..15> MAKE_BASE=TRUE MXM_CLKREQ_LPEG_CLKREQ_L =PEG_R2D_C_P<0..15> MAKE_BASE=TRUE GPU_CLK100M_PCIE_N MAKE_BASE=TRUE PEG_R2D_C_P<0..15> MAKE_BASE=TRUE PEG_R2D_C_N<0..15> CLK_100M_MXM_N MAKE_BASE=TRUE PEG_D2R_N<0..15> GPU_CLK100M_PCIE_P MAKE_BASE=TRUE PEG_CLK100M_N 9 OF 110 11.1.0 051-8115 9 OF 98 27 9775 90 90 www.vinafix.vn
  • 10. IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN PEG_TX_6* PEG_RX_5* PEG_RX_0* PEG_RX_2* PEG_RX_7* PEG_RX_8* PEG_RX_9* PEG_RX_10* PEG_RCOMPO PEG_RX_14 PEG_RX_13 PEG_RX_6* PEG_RX_12* PEG_RX_14* PEG_RX_1 PEG_ICOMPO PEG_COMPI FDI_INT FDI_ICOMPO FDI_COMPIO DMI_RX_0 DMI_RX_0* DMI_RX_1 DMI_RX_1* DMI_RX_2 DMI_RX_2* DMI_RX_3 DMI_RX_3* DMI_TX_0 DMI_TX_0* DMI_TX_1 DMI_TX_2 DMI_TX_2* DMI_TX_3 DMI_TX_3* FDI_FSYNC_0 FDI_FSYNC_1 FDI_LSYNC_0 FDI_LSYNC_1 FDI_TX_0 FDI_TX_0* FDI_TX_1 FDI_TX_1* FDI_TX_2 FDI_TX_2* FDI_TX_3 FDI_TX_3* FDI_TX_4 FDI_TX_4* FDI_TX_5 FDI_TX_5* FDI_TX_6 FDI_TX_6* FDI_TX_7 FDI_TX_7* PEG_RX_0 PEG_RX_1* PEG_RX_2 PEG_RX_3 PEG_RX_3* PEG_RX_4 PEG_RX_4* PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_11* PEG_RX_12 PEG_RX_13* PEG_RX_15 PEG_RX_15* PEG_TX_0 PEG_TX_0* PEG_TX_1 PEG_TX_1* PEG_TX_2 PEG_TX_2* PEG_TX_3 PEG_TX_3* PEG_TX_4 PEG_TX_4* PEG_TX_5 PEG_TX_5* PEG_TX_6 PEG_TX_7 PEG_TX_7* PEG_TX_8 PEG_TX_8* PEG_TX_9 PEG_TX_9* PEG_TX_10 PEG_TX_10* PEG_TX_11 PEG_TX_11* PEG_TX_12 PEG_TX_12* PEG_TX_13 PEG_TX_13* PEG_TX_14 PEG_TX_14* PEG_TX_15 PEG_TX_15* PE_RX_0 PE_RX_0* PE_RX_1 PE_RX_1* PE_RX_2 PE_RX_2* PE_RX_3 PE_RX_3* PE_TX_0 PE_TX_0* PE_TX_1 PE_TX_1* PE_TX_2 PE_TX_2* PE_TX_3 PE_TX_3* DMI_TX_1* PCIEXPRESSDMIFLEXIBLEDISPLAYINTERFACE (1 OF 10) PCIEXPRESS--GRAPHICS RSVD_C39 RSVD_D38 RSVD_C38 RSVD_H7 RSVD_H8 RSVD_J9 RSVD_AY10 RSVD_AW34 RSVD_AV34 RSVD_AU10 RSVD_AT14 RSVD_AT11 RSVD_AP20 RSVD_AN20 RSVD_AJ31 RSVD_AJ30 RSVD_AJ29 RSVD_AJ11 RSVD_AG4 RSVD_AF4 RSVD_AE6 RSVD_AD37 RSVD_AD35 RSVD_AD34 RSVD_AB7 RSVD_AB6 RSVD_R40 RSVD_R38 RSVD_R36 RSVD_R34 RSVD_P39 RSVD_P37 RSVD_P35 RSVD_N34 RSVD_N33 RSVD_M34 RSVD_L34 RSVD_L33 RSVD_L31 RSVD_L9 RSVD_K34 RSVD_K31 RSVD_K9 CFG_17 CFG_16 CFG_15 CFG_14 CFG_13 CFG_12 CFG_11 CFG_10 CFG_9 CFG_7 CFG_6 CFG_5 CFG_4 CFG_3 CFG_2 CFG_1 CFG_0 RSVD_J31 RSVD_J33 RSVD_J34 CFG_8 NCTF_A38 NCTF_C2 NCTF_D1 NCTF_AU40 NCTF_AW38 RSVD_NCTF_B39 RSVD_NCTF_AY3 RSVD_NCTF_AW2 RSVD_NCTF_AV1 RESERVED (5 OF 10) OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 (Unused) ThermDC ThermDA SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4 MIL TRACE TO R1010.1 ROUTE B5 TO R1010.1 AS A SEPERATE 10 MIL TRACE. FOR SANDYBRIDGE PROCESSOR CFG [6:5] :PCIE CONFIGURATION SELECT 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4 INTEL SUGGESTS TO KEEP THESE TPS CFG [2] :PCIE LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED (AvailableforWorkstationonly) 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 1990 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 21 R1010 MF-LF 1% 1/16W 24.9 402 PLACEMENT_NOTE=Place within 12.7MM of CPU 152590 152590 2590 2590 2590 2590 2590 2590 2590 2590 2590 152590 152590 2590 152590 152590 152590 2590 G9 G10 F7 F8 E5 E6 C3 D3 D7 D8 J13 J14 F11 F12 G13 G14 N6 N5 L5 L6 M7 M8 J6 J5 K8 K7 G6 G5 E13 E14 C14 C13 G1 G2 F3 F4 E1 E2 A6 A5 C5 C6 B7 B8 E9 E10 C9 C10 N2 N1 M4 M3 L2 L1 K4 K3 J2 J1 H4 H3 D11 D12 B12 B11 C4 B5 B4 U6 U5 R5 R6 T8 T7 P7 P8 U1 U2 T3 T4 R1 R2 P4 P3 AG1 AG2 AF2 AF3 AE8 AE7 AD6 AD7 AD3 AD4 AD1 AD2 AC3 AC2 AC7 AC8 AE4 AC4 AG3 AE1 AE5 AC5 AE2 AA8 AA7 Y7 Y6 W8 W7 V6 V7 AA5 AA4 Y4 Y3 V4 V3 W4 W5 U1000 LGA1155-SKT SANDY_BRIDGE OMIT R40 R38 R36 R34 P39 P37 P35 B39 AY3 AW2 AV1 N34 N33 M34 L9 L34 L33 L31 K9 K34 K31 J9 J34 J33 J31 H8 H7 D38 C39 C38 AY10 AW34 AV34 AU10 AT14 AT11 AP20 AN20 AJ31 AJ30 AJ29 AJ11 AG4 AF4 AE6 AD37 AD35 AD34 AB7 AB6 D1 C2 AW38 AU40 A38 L35 J38 M36 L37 N35 L36 K36 J37 G36 G37 N40 N37 N39 N38 N36 M38 J36 H36 U1000 SANDY_BRIDGE LGA1155-SKT OMIT 5294 5294 2 1 R1011 PLACEMENT_NOTE=Place within 12.7MM of CPU 402 1/16W MF-LF 5% 0 CPU DMI/PEG/FDI/RSVD TP_CPU_FDI_TX_P<6> TP_CPU_RSVD_NCTF<3> TP_CPU_NCTF<2> TP_CPU_NCTF<3> CPU_CFG<6> CPU_CFG<5> =PEG_R2D_C_P<6> =PEG_R2D_C_P<8> DMI_N2S_N<0> TP_CPU_FDI_TX_N<6> TP_CPU_FDI_TX_N<4> DMI_S2N_P<2> DMI_S2N_P<3> CPU_FDI_LSYNC<0> TP_PE_RX_N<1> TP_PE_TX_P<1> TP_PE_TX_N<1> TP_PE_RX_P<3> TP_PE_RX_P<2> TP_PE_RX_P<1> CPU_FDI_INT DMI_S2N_N<0> DMI_S2N_P<1> DMI_S2N_P<0> TP_PE_TX_P<2> TP_PE_TX_N<3> CPU_CFG<8> =PEG_R2D_C_P<3> TP_CPU_RSVD<8> CPU_CFG<13> CPU_CFG<9> TP_CPU_RSVD<35> CPU_CFG<11> TP_CPU_RSVD<36> TP_PE_TX_N<2> TP_PE_TX_N<0> TP_PE_RX_P<0> =PEG_R2D_C_N<9> TP_CPU_FDI_TX_P<2> TP_CPU_FDI_TX_P<1> TP_CPU_FDI_TX_P<0> CPU_FDI_FSYNC<1> DMI_N2S_P<1> CPU_FDI_LSYNC<1> =PEG_R2D_C_P<11> =PEG_R2D_C_P<13> TP_CPU_RSVD<38> TP_CPU_RSVD<5> TP_CPU_RSVD<28> TP_CPU_RSVD<21> TP_CPU_RSVD<10> CPU_CFG<12> TP_CPU_NCTF<4> TP_CPU_RSVD<41> TP_CPU_RSVD<39> CPU_CFG<1> TP_CPU_RSVD<23> CPU_CFG<10> TP_CPU_RSVD<40> TP_CPU_RSVD<20> TP_CPU_RSVD<34> TP_CPU_RSVD<37> TP_CPU_RSVD<16> TP_CPU_RSVD<15> TP_CPU_RSVD<14> SNS_CPU_THERMD_N SNS_CPU_THERMD_P TP_CPU_FDI_TX_N<7> TP_CPU_RSVD<25> TP_CPU_RSVD<26> TP_CPU_FDI_TX_N<1> =PEG_R2D_C_P<5> =PEG_R2D_C_N<11> TP_CPU_FDI_TX_N<2> DMI_S2N_N<3> TP_CPU_FDI_TX_P<5> TP_CPU_FDI_TX_N<5> DMI_N2S_P<2> TP_PE_TX_P<3> =PEG_R2D_C_P<1> =PEG_R2D_C_P<9> TP_PE_RX_N<3> TP_PE_RX_N<2> TP_CPU_RSVD<22> =PEG_D2R_P<9> TP_CPU_FDI_TX_N<0> TP_CPU_FDI_TX_P<7> CPU_FDI_FSYNC<0> TP_PE_RX_N<0> TP_PE_TX_P<0> TP_CPU_RSVD<29> TP_CPU_RSVD<27> TP_CPU_RSVD<33> TP_CPU_RSVD<19> TP_CPU_RSVD<32> TP_CPU_RSVD<31> DMI_N2S_P<0> DMI_N2S_N<1> DMI_N2S_N<2> TP_CPU_RSVD<9> CPU_CFG<17> =PEG_R2D_C_P<2> TP_CPU_RSVD<46> TP_CPU_RSVD<45> TP_CPU_RSVD<43> TP_CPU_RSVD<42> TP_CPU_RSVD_NCTF<1> TP_CPU_NCTF<5> TP_CPU_FDI_TX_N<3> MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=CPU_RCOMP MIN_NECK_WIDTH=0.2MM CPU_FDI_COMPIO =PEG_R2D_C_N<6> =PEG_R2D_C_P<15> =PEG_R2D_C_P<14> =PEG_R2D_C_P<12> =PEG_R2D_C_P<7> =PEG_R2D_C_N<10> =PEG_R2D_C_N<8> =PEG_R2D_C_N<7> =PEG_D2R_P<10> =PEG_D2R_P<6> =PEG_R2D_C_P<4> =PEG_D2R_P<3> =PEG_R2D_C_N<2> =PEG_D2R_N<14> DMI_S2N_N<2> DMI_S2N_N<1> DMI_N2S_N<3> =PEG_R2D_C_N<4> =PEG_R2D_C_N<1> TP_CPU_FDI_TX_P<4> DMI_N2S_P<3> =PEG_D2R_P<1> =PEG_D2R_P<4> =PEG_D2R_N<13> =PEG_D2R_N<11> =PEG_D2R_N<1> =PEG_D2R_P<8> =PEG_D2R_N<4> =PEG_D2R_N<3> =PEG_D2R_N<6> =PEG_D2R_N<5> =PEG_D2R_P<0> =PEG_D2R_N<15> =PEG_R2D_C_N<0> =PEG_D2R_P<15> =PEG_D2R_P<14> =PEG_D2R_P<12> =PEG_D2R_P<11> =PEG_R2D_C_P<10> =PEG_R2D_C_P<0> =PEG_R2D_C_N<15> =PEG_R2D_C_N<14> =PEG_R2D_C_N<13> =PEG_R2D_C_N<12> =PEG_D2R_N<12> =PEG_D2R_N<8> =PEG_D2R_N<7> CPU_PEG_COMP NET_SPACING_TYPE=CPU_RCOMP MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM =PEG_D2R_N<0> =PEG_D2R_N<2> TP_CPU_RSVD<13> TP_CPU_RSVD<12> TP_CPU_RSVD<11> TP_CPU_RSVD<7> TP_CPU_RSVD<30> TP_CPU_RSVD<2> =PPVCCIO_S0_CPU =PEG_D2R_P<2> =PEG_D2R_P<7> =PEG_D2R_P<5> TP_CPU_RSVD_NCTF<2> TP_CPU_RSVD_NCTF<4> TP_CPU_NCTF<1> CPU_CFG<16> CPU_CFG<15> CPU_CFG<14> CPU_CFG<7> CPU_CFG<3> CPU_CFG<2> CPU_CFG<0> CPU_CFG<4> TP_CPU_RSVD<44> =PEG_D2R_N<10> =PEG_D2R_N<9> TP_CPU_RSVD<6> TP_CPU_RSVD<4> TP_CPU_RSVD<3> TP_CPU_RSVD<1> TP_CPU_RSVD<24> =PEG_D2R_P<13> TP_CPU_FDI_TX_P<3> =PEG_R2D_C_N<3> =PEG_R2D_C_N<5> 10 OF 110 11.1.0 051-8115 10 OF 98 8 8 8 15 8 8 8 8 8 8 15 8 8 8 8 8 8 8 8 8 8 8 15 15 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 15 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 90 8 8 8 8 8 8 6 11 13 16 65 8 8 8 8 8 8 8 www.vinafix.vn
  • 11. BI BI BI BI BI IN IN OUT IN IN OUT OUT BI BI G D S IN NC IN IN OUT IN IN IN OUT IN IN IN IN IN FC_AH4 FC_AH1 SM_VREF SM_DRAMRST* SM_DRAMPWROK PM_SYNC PREQ* TMS TRST* TDI TDO DBR* BPM[0]* BPM[1]* BPM[2]* BPM[3]* BPM[4]* BPM[5]* BPM[6]* BPM[7]* TCK PRDY* BCLK_ITP BCLK_0 BCLK_ITP* BCLK_0* UNCOREPWRGOOD SKTOCC* RESET* THERMTRIP* CATERR* PECI PROCHOT* PROC_SEL THERMALDDR3MISCPWRMGMT CLOCKS (2 OF 10) JTAG&BPM OUT OUT BI BI BI II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PM_MEM_PWRGD MUST ASSERT MIN. 100ns AFTER =PP1V5_S0_CPU_MEM IS STABLE CAN ADJUST R1190 AND C1180 OPEN-DRAIN BUFFER FROM PCH BASED ON INTEL MOBILE SOLUTION 25 90 25 90 25 90 25 90 25 90 2 1 R1111 MF-LF 1/16W 402 5% 1K 2889 212597 2 1 C1111 NOSTUFF 402 16V X5R 10% 0.1UF 2 1C1110 16V 0.1UF NOSTUFF 10% X5R 402 3297 18 90 18 90 1997 4797 476597 214697 2 1 R1126 1/16W MF-LF 402 NOSTUFF 5% 0 2 1 R1124 PLACEMENT_NOTE=PLACE WITHIN 2 INCHES OF CPU 402 5% MF-LF 1/16W 75 2 1 R1121 1% 402 MF-LF 121 1/16W 2 1 R1120 402 200 1% 1/16W MF-LF 1 2 6 Q1180 SOT-563 DMB53D0UV 1997 2 1 R1183 4.7K 402 MF-LF 1/16W 5% 4 3 5 Q1180 SOT-563 DMB53D0UV 2 1C1180 0.015UF 16V 402 10% X7R 2 1 R1190 402 5% 1/16W MF-LF 12K 4 5 3 2 U1190 74LVC1G07 SC70 2 1C1190 402 20% 10V CERM 0.1UF 647397 2 1 R1101 MF-LF 402 51 5% 1/16W 2 1 R1100 1K 1/16W 402 MF-LF 5% NOSTUFF 25 25 25 90 25 90 25 90 25 90 25 90 18 90 18 90 1997 2 1 R1104 1/16W 402 MF-LF 5% 51 NOSTUFF 2 1 R1125 1/16W MF-LF 402 5% 43 2797 J40 J39 L38 G35 L39 L40 M40 AJ22 AW18 AJ19 AJ33 F36 H34 K32 K40 K38 E38 J35 AH4 AH1 E39 E37 F40 E40 F38 G39 G40 G38 H38 H40 D40 C40 W1 W2 U1000 SANDY_BRIDGE LGA1155-SKT OMIT 6397 2 1 R1102 402 NOSTUFF 1K MF-LF 5% 1/16W 25 97 25 90 25 90 25 90 CPU CLOCK/MISC/JTAG ITPCPU_CLK100M_P ITPCPU_CLK100M_N DMI_CLK100M_CPU_P DMI_CLK100M_CPU_N XDP_CPU_PRDY_L XDP_CPU_PREQ_L XDP_CPU_TCK XDP_CPU_TMS XDP_CPU_TRST_L XDP_CPU_TDI XDP_CPU_TDO XDP_DBRESET_L XDP_BPM_L<0> XDP_BPM_L<1> XDP_BPM_L<2> XDP_BPM_L<3> XDP_BPM_L<4> XDP_BPM_L<5> XDP_BPM_L<6> XDP_BPM_L<7> CPU_PROC_SEL CPU_CATERR_L CPU_SKTOCC_L PM_SYNC CPU_MEM_RESET_L CPU_DDR_VREF CPU_PECI CPU_PROCHOT_L CPU_THRMTRIP_L CPU_PWRGD CPU_RESET_L PM_MEM_PWRGD_L PM_PGOOD_P1V5_S0_FET =PPVCCIO_S0_CPU TP_CPU_DIMM_VREF_A TP_CPU_DIMM_VREF_B PLT_RESET_LS1V05_L PGOOD_P1V5_S0_DLY PM_MEM_PWRGD_R=PP1V5_S0_CPU_MEM =PPVCCIO_S0_CPU =PP3V3_S5_PWRCTL =PP3V3_S0_RSTBUF NO_TEST=TRUE NC_U1190_P1 =PP3V3_S0_RSTBUF PM_MEM_PWRGD 11 OF 110 11.1.0 051-8115 11 OF 98 1 97 97 61011131665 97 97 97 613162829 61011131665 66364 61127 61127 www.vinafix.vn
  • 12. BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT DDRSYSTEMMEMORYA (3 OF 10) SA_ODT_3 SA_MA_9 SA_MA_8 SA_MA_7 SA_MA_6 SA_MA_5 SA_MA_4 SA_MA_3 SA_MA_2 SA_MA_15 SA_MA_14 SA_MA_13 SA_MA_12 SA_MA_11 SA_MA_10 SA_MA_1 SA_MA_0 SA_ECC_CB_7 SA_ECC_CB_6 SA_ECC_CB_5 SA_ECC_CB_4 SA_ECC_CB_3 SA_ECC_CB_2 SA_ECC_CB_1 SA_ECC_CB_0 SA_DQS_8 SA_DQS_7* SA_DQS_7 SA_DQS_6* SA_DQS_6 SA_DQS_5* SA_DQS_5 SA_DQS_4* SA_DQS_4 SA_DQS_3* SA_DQS_3 SA_DQS_2* SA_DQS_2 SA_DQS_1* SA_DQS_1 SA_DQS_0* SA_DQS_0 SA_DQ_8 SA_DQ_7 SA_DQ_6 SA_DQ_59 SA_DQ_58 SA_DQ_57 SA_DQ_56 SA_DQ_55 SA_DQ_54 SA_DQ_53 SA_DQ_52 SA_DQ_51 SA_DQ_50 SA_DQ_5 SA_DQ_49 SA_DQ_48 SA_DQ_47 SA_DQ_46 SA_DQ_45 SA_DQ_44 SA_DQ_43 SA_DQ_42 SA_DQ_41 SA_DQ_40 SA_DQ_4 SA_DQ_39 SA_DQ_38 SA_DQ_37 SA_DQ_36 SA_DQ_35 SA_DQ_34 SA_DQ_31 SA_DQ_30 SA_DQ_3 SA_DQ_29 SA_DQ_28 SA_DQ_27 SA_DQ_26 SA_DQ_25 SA_DQ_24 SA_DQ_23 SA_DQ_22 SA_DQ_21 SA_DQ_20 SA_DQ_2 SA_DQ_19 SA_DQ_18 SA_DQ_17 SA_DQ_16 SA_DQ_15 SA_DQ_14 SA_DQ_13 SA_DQ_12 SA_DQ_11 SA_DQ_10 SA_DQ_1 SA_DQ_0 SA_CS_3* SA_CS_2* SA_CS_1* SA_CS_0* SA_CKE_3 SA_CKE_2 SA_CKE_1 SA_CKE_0 SA_CK_3* SA_CK_3 SA_CK_2* SA_CK_2 SA_CK_1* SA_CK_0* SA_CK_0 SA_WE* SA_RAS* SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_CK_1 SA_DQ_9 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SA_BS_0 SA_BS_1 SA_CAS* SA_BS_2 SA_DQS_8* SA_DQ_33 SA_DQ_32 DDRSYSTEMMEMORYB (4 OF 10) SB_ODT_3 SB_ODT_2 SB_ODT_1 SB_ODT_0 SB_MA_9 SB_MA_8 SB_MA_7 SB_MA_6 SB_MA_5 SB_MA_4 SB_MA_3 SB_MA_2 SB_MA_15 SB_MA_14 SB_MA_13 SB_MA_12 SB_MA_11 SB_MA_10 SB_MA_1 SB_MA_0 SB_ECC_CB_7 SB_ECC_CB_6 SB_ECC_CB_5 SB_ECC_CB_4 SB_ECC_CB_3 SB_ECC_CB_2 SB_ECC_CB_1 SB_ECC_CB_0 SB_DQS_8 SB_DQS_7* SB_DQS_7 SB_DQS_6* SB_DQS_6 SB_DQS_5* SB_DQS_5 SB_DQS_4* SB_DQS_3 SB_DQS_2* SB_DQS_1* SB_DQS_1 SB_DQS_0* SB_DQS_0 SB_DQ_9 SB_DQ_8 SB_DQ_7 SB_DQ_63 SB_DQ_62 SB_DQ_61 SB_DQ_60 SB_DQ_6 SB_DQ_59 SB_DQ_58 SB_DQ_57 SB_DQ_56 SB_DQ_55 SB_DQ_54 SB_DQ_53 SB_DQ_52 SB_DQ_51 SB_DQ_50 SB_DQ_5 SB_DQ_49 SB_DQ_48 SB_DQ_47 SB_DQ_46 SB_DQ_45 SB_DQ_44 SB_DQ_43 SB_DQ_42 SB_DQ_41 SB_DQ_40 SB_DQ_4 SB_DQ_39 SB_DQ_38 SB_DQ_37 SB_DQ_36 SB_DQ_35 SB_DQ_34 SB_DQ_32 SB_DQ_31 SB_DQ_30 SB_DQ_3 SB_DQ_29 SB_DQ_28 SB_DQ_27 SB_DQ_26 SB_DQ_25 SB_DQ_24 SB_DQ_23 SB_DQ_22 SB_DQ_21 SB_DQ_20 SB_DQ_2 SB_DQ_19 SB_DQ_18 SB_DQ_17 SB_DQ_16 SB_DQ_15 SB_DQ_14 SB_DQ_13 SB_DQ_12 SB_DQ_11 SB_DQ_10 SB_DQ_1 SB_DQ_0 SB_CKE_2 SB_CKE_1 SB_CKE_0 SB_CK_3* SB_CK_3 SB_CK_2* SB_CK_2 SB_CK_1 SB_CK_0* SB_CK_0 SB_BS_2 SB_BS_1 SB_BS_0 SB_WE* SB_RAS* SB_CAS* SB_CS_3* SB_CS_2* SB_CS_1* SB_CS_0* SB_CKE_3 SB_DQS_8* SB_DQS_2 SB_DQS_4 SB_DQ_33 SB_DQS_3* SB_CK_1* II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3089 3089 3089 3089 3089 3089 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 30 89 32 89 32 89 30 89 32 89 32 89 30 89 30 89 30 89 30 89 30 89 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3289 3189 3189 3189 3189 3189 3189 32 89 32 89 31 89 32 89 32 89 31 89 31 89 31 89 31 89 31 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 32 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 31 89 30 89 30 89 30 89 30 89 32 89 32 89 30 89 32 89 32 89 30 89 32 89 32 89 31 89 32 89 32 89 31 89 31 89 31 89 31 89 31 89 30 89 31 89 AW29 AU28 AW33 AU30 AU32 AV31 AT22 AV22 AU22 AT23 AT24 AV23 AW23 AW24 AT20 AU20 AW32 AT21 AU21 AV28 AY24 AV27 AW12 AY12 AU11 AU13 AY13 AW13 AU14 AU12 AV12 AV13 AF39 AF38 AK39 AK38 AP39 AP38 AV36 AV37 AW8 AV8 AV4 AW4 AP2 AP3 AK2 AK3 AN4 AN1 AL1 AE40 AE39 AG38 AG39 AL2 AE37 AE38 AG37 AG40 AJ40 AJ39 AL38 AL39 AJ37 AJ38 AJ1 AL37 AL40 AN40 AN39 AR38 AR39 AN37 AN38 AR37 AR40 AJ2 AU37 AU38 AY36 AW35 AU36 AU39 AW37 AU35 AY9 AW9 AL4 AW7 AV7 AU9 AV9 AU7 AY7 AY5 AU5 AU3 AU2 AL3 AW5 AV5 AW3 AV2 AR1 AR2 AN3 AN2 AR4 AR3 AJ4 AJ3 AU33 AW30 AV32 AU29 AV18 AU18 AT19 AV19 AW26 AV26 AY27 AW27 AU25 AU24 AW25 AY25 AV30 AV20 AW28 AY29 U1000 OMIT LGA1155-SKT SANDY_BRIDGE AR25 AP24 AK26 AM26 AP26 AL26 AY17 AN18 AL18 AM18 AP18 AP19 AK18 AM19 AV16 AY16 AR26 AT18 AU17 AN23 AM20 AK24 AP15 AR15 AM15 AL15 AR16 AP16 AM16 AL16 AN15 AN16 AG34 AG35 AM33 AL33 AR33 AP33 AN28 AN29 AN12 AN13 AP8 AR8 AL8 AM8 AH6 AH7 AM7 AL7 AJ7 AF35 AF33 AJ34 AJ35 AJ6 AE35 AE34 AH34 AH35 AL34 AM35 AL31 AM34 AL32 AL35 AG6 AM31 AM32 AR34 AR35 AR31 AR32 AP34 AP35 AP31 AP32 AG5 AM29 AM28 AP29 AP28 AL29 AL28 AR29 AR28 AP12 AR12 AJ8 AL13 AL12 AP13 AR13 AM13 AM12 AR9 AP9 AR6 AP6 AJ9 AR10 AP10 AR7 AP7 AM9 AL9 AM6 AL6 AL10 AM10 AG8 AG7 AT26 AL25 AN26 AN25 AV15 AW15 AY15 AU16 AN21 AP21 AM22 AL23 AK20 AL20 AL22 AL21 AK25 AW17 AM24 AP23 U1000 OMIT LGA1155-SKT SANDY_BRIDGE SYNC_DATE=01/06/2011 CPU DDR3 INTERFACES TP_MEM_B_DQS_P<8> MEM_B_A<6> TP_MEM_A_DQ_CB<7> MEM_A_DQ<26> MEM_A_DQ<17> MEM_A_DQ<12> MEM_A_WE_L MEM_A_RAS_L MEM_A_CAS_L MEM_A_DQ<32> MEM_A_DQ<33> TP_MEM_A_DQS_N<8> MEM_A_BA<2> MEM_A_BA<1> MEM_A_BA<0> MEM_A_DQ<63> MEM_A_DQ<62> MEM_A_DQ<61> MEM_A_DQ<60> MEM_A_DQ<9> MEM_A_CLK_P<1> MEM_A_ODT<2> MEM_A_ODT<1> MEM_A_ODT<0> MEM_A_CLK_P<0> MEM_A_CLK_N<0> MEM_A_CLK_N<1> MEM_A_CLK_P<2> MEM_A_CLK_N<2> MEM_A_CLK_P<3> MEM_A_CLK_N<3> MEM_A_CKE<0> MEM_A_CKE<1> MEM_A_CKE<2> MEM_A_CKE<3> MEM_A_CS_L<0> MEM_A_CS_L<1> MEM_A_CS_L<2> MEM_A_CS_L<3> MEM_A_DQ<0> MEM_A_DQ<1> MEM_A_DQ<10> MEM_A_DQ<11> MEM_A_DQ<13> MEM_A_DQ<14> MEM_A_DQ<15> MEM_A_DQ<16> MEM_A_DQ<18> MEM_A_DQ<19> MEM_A_DQ<2> MEM_A_DQ<20> MEM_A_DQ<21> MEM_A_DQ<22> MEM_A_DQ<23> MEM_A_DQ<24> MEM_A_DQ<25> MEM_A_DQ<27> MEM_A_DQ<28> MEM_A_DQ<29> MEM_A_DQ<3> MEM_A_DQ<30> MEM_A_DQ<31> MEM_A_DQ<34> MEM_A_DQ<35> MEM_A_DQ<36> MEM_A_DQ<37> MEM_A_DQ<38> MEM_A_DQ<39> MEM_A_DQ<4> MEM_A_DQ<40> MEM_A_DQ<41> MEM_A_DQ<42> MEM_A_DQ<43> MEM_A_DQ<44> MEM_A_DQ<45> MEM_A_DQ<46> MEM_A_DQ<47> MEM_A_DQ<48> MEM_A_DQ<49> MEM_A_DQ<5> MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52> MEM_A_DQ<53> MEM_A_DQ<54> MEM_A_DQ<55> MEM_A_DQ<56> MEM_A_DQ<57> MEM_A_DQ<58> MEM_A_DQ<59> MEM_A_DQ<6> MEM_A_DQ<7> MEM_A_DQ<8> MEM_A_DQS_P<0> MEM_A_DQS_N<0> MEM_A_DQS_P<1> MEM_A_DQS_N<1> MEM_A_DQS_P<2> MEM_A_DQS_N<2> MEM_A_DQS_P<3> MEM_A_DQS_N<3> MEM_A_DQS_P<4> MEM_A_DQS_N<4> MEM_A_DQS_P<5> MEM_A_DQS_N<5> MEM_A_DQS_P<6> MEM_A_DQS_N<6> MEM_A_DQS_P<7> MEM_A_DQS_N<7> TP_MEM_A_DQS_P<8> TP_MEM_A_DQ_CB<0> TP_MEM_A_DQ_CB<1> TP_MEM_A_DQ_CB<2> TP_MEM_A_DQ_CB<3> TP_MEM_A_DQ_CB<4> TP_MEM_A_DQ_CB<5> TP_MEM_A_DQ_CB<6> MEM_A_A<0> MEM_A_A<1> MEM_A_A<10> MEM_A_A<11> MEM_A_A<12> MEM_A_A<13> MEM_A_A<14> MEM_A_A<15> MEM_A_A<2> MEM_A_A<3> MEM_A_A<4> MEM_A_A<5> MEM_A_A<6> MEM_A_A<7> MEM_A_A<8> MEM_A_A<9> MEM_A_ODT<3> MEM_B_ODT<3> MEM_B_ODT<2> MEM_B_ODT<1> MEM_B_ODT<0> MEM_B_A<9> MEM_B_A<8> MEM_B_A<7> MEM_B_A<5> MEM_B_A<4> MEM_B_A<3> MEM_B_A<2> MEM_B_A<15> MEM_B_A<14> MEM_B_A<13> MEM_B_A<12> MEM_B_A<11> MEM_B_A<10> MEM_B_A<1> MEM_B_A<0> TP_MEM_B_DQ_CB<7> TP_MEM_B_DQ_CB<6> TP_MEM_B_DQ_CB<5> TP_MEM_B_DQ_CB<4> TP_MEM_B_DQ_CB<3> TP_MEM_B_DQ_CB<2> TP_MEM_B_DQ_CB<1> TP_MEM_B_DQ_CB<0> MEM_B_DQS_N<7> MEM_B_DQS_P<7> MEM_B_DQS_N<6> MEM_B_DQS_P<6> MEM_B_DQS_N<5> MEM_B_DQS_P<5> MEM_B_DQS_N<4> MEM_B_DQS_P<3> MEM_B_DQS_N<2> MEM_B_DQS_N<1> MEM_B_DQS_P<1> MEM_B_DQS_N<0> MEM_B_DQS_P<0> MEM_B_DQ<9> MEM_B_DQ<8> MEM_B_DQ<7> MEM_B_DQ<63> MEM_B_DQ<62> MEM_B_DQ<61> MEM_B_DQ<60> MEM_B_DQ<6> MEM_B_DQ<59> MEM_B_DQ<58> MEM_B_DQ<57> MEM_B_DQ<56> MEM_B_DQ<55> MEM_B_DQ<54> MEM_B_DQ<53> MEM_B_DQ<52> MEM_B_DQ<51> MEM_B_DQ<50> MEM_B_DQ<5> MEM_B_DQ<49> MEM_B_DQ<48> MEM_B_DQ<47> MEM_B_DQ<46> MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43> MEM_B_DQ<42> MEM_B_DQ<41> MEM_B_DQ<40> MEM_B_DQ<4> MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37> MEM_B_DQ<36> MEM_B_DQ<35> MEM_B_DQ<34> MEM_B_DQ<32> MEM_B_DQ<31> MEM_B_DQ<30> MEM_B_DQ<3> MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27> MEM_B_DQ<26> MEM_B_DQ<25> MEM_B_DQ<24> MEM_B_DQ<23> MEM_B_DQ<22> MEM_B_DQ<21> MEM_B_DQ<20> MEM_B_DQ<2> MEM_B_DQ<19> MEM_B_DQ<18> MEM_B_DQ<17> MEM_B_DQ<16> MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12> MEM_B_DQ<11> MEM_B_DQ<10> MEM_B_DQ<1> MEM_B_DQ<0> MEM_B_CKE<2> MEM_B_CKE<1> MEM_B_CKE<0> MEM_B_CLK_N<3> MEM_B_CLK_P<3> MEM_B_CLK_N<2> MEM_B_CLK_P<2> MEM_B_CLK_P<1> MEM_B_CLK_N<0> MEM_B_CLK_P<0> MEM_B_BA<0> MEM_B_CS_L<3> MEM_B_CS_L<2> MEM_B_CS_L<1> MEM_B_CS_L<0> MEM_B_CKE<3> TP_MEM_B_DQS_N<8> MEM_B_DQS_P<2> MEM_B_DQS_P<4> MEM_B_DQ<33> MEM_B_DQS_N<3> MEM_B_CLK_N<1> MEM_B_BA<2> MEM_B_BA<1> MEM_B_CAS_L MEM_B_RAS_L MEM_B_WE_L 12 OF 110 11.1.0 051-8115 12 OF 98 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 www.vinafix.vn
  • 13. CPUCORESUPPLY VCCSA NCTF CPUCORESUPPLY (10 OF 10) POWER VCC_097 VCC_092 VCC_091 VCC_090 VCC_089 VCC_088 VCC_087 VCC_083 VCC_112 VCC_117 VCC_113 VCC_114 VCC_115 VCC_116 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCCSA0 VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA8 VCCSA9 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VCC_073 VCC_072 VCC_071 VCC_155 VCC_154 VCC_084 VCC_093 VSS_NCTF0 VCC_100 VCC_101 VCC_104 VCC_106 VCC_105 VCC_096 VCC_095 VCC_094 VCC_086 VCC_085 VCCSA7 VCCSA10 VCC_107 VCC_082 VCC_077 VCC_074 VCC_076 VCC_161 VCC_126 VCC_127 VCC_111 VCC_098 VCC_099 VCC_075 VCC_081 VCC_103 VCC_102 VCC_078 VCC_079 VCC_080 VCC_108 VCC_109 VCC_110 VCCSA_VID VCCIO_39 VCCIO_38 VCCIO_37 VCCIO_32 VCCIO_25 VCCIO_24 VCCIO_23 VCCIO_21 VCCIO_22 VCCIO_18 VCCIO_17 VCCIO_15 VCC_019 VCCIO_03 VCC_053 VCC_054 VCC_055 VCC_056 VCC_SENSE VCCIO_41 VSS_SENSE VIDSOUT VIDSCLK VIDALERT* VCCSA_SENSE VCCIO_19 VCCIO_16 VCCIO_14 VCCIO_13 VCCIO_12 VCCIO_11 VCCIO_10 VCCIO_08 VCCIO_07 VCCIO_06 VCCIO_05 VCCIO_04 VCCIO_43 VCCIO_40 VCCIO_36 VCCIO_35 VCCIO_34 VCCIO_33 VCCIO_26 VCCIO_20 VCCIO_01 VCCIO_02 VCC_070 VCC_069 VCC_068 VCC_067 VCC_066 VCC_065 VCC_064 VCC_063 VCC_062 VCC_061 VCC_060 VCC_059 VCC_058 VCC_057 VCC_052 VCC_051 VCC_050 VCC_049 VCC_048 VCC_047 VCC_046 VCC_045 VCC_044 VCC_043 VCC_042 VCC_041 VCC_040 VCC_039 VCC_037 VCC_036 VCC_035 VCC_034 VCC_033 VCC_032 VCC_031 VCC_030 VCC_029 VCC_028 VCC_027 VCC_026 VCC_025 VCC_023 VCC_022 VCC_021 VCC_020 VCC_018 VCC_017 VCC_016 VCC_014 VCC_013 VCC_011 VCC_010 VCC_009 VCC_008 VCC_007 VCC_006 VCC_005 VCC_015 VCC_012 VCCIO_27 VCC_004 VCC_003 VCC_002 VCC_001 VCCIO_09 VCCIO_28 VCCIO_29 VCCIO_42 VCC_038 VCC_024 VCCIO_SENSE VSSIO_SENSE VCCAXG_SENSE VSSAXG_SENSE VCCIO_30 VCCIO_45 VCCIO_SEL VCCIO_44 VCCIO_31 SENSELINES CPUCORESUPPLY IOPOWER POWERCPUVIDS (6 OF 10) VCCAXG_08 VCCAXG_01 VDDQ5 VDDQ18 VDDQ17 VDDQ15 VCCAXG_20 VCCAXG_23 VCCAXG_17 VCCAXG_18 VCCAXG_19 VCCAXG_21 VCCAXG_22 VCCAXG_24 VCCAXG_25 VCCAXG_26 VCCAXG_27 VCCAXG_28 VCCAXG_29 VCCAXG_30 VCCAXG_31 VCCAXG_32 VCCAXG_33 VCCAXG_34 VCCAXG_35 VCCAXG_36 VCCAXG_37 VCCAXG_38 VCCAXG_39 VCCAXG_40 VCCAXG_41 VCCAXG_42 VCCAXG_04 VCCAXG_05 VCCAXG_06 VCCAXG_07 VCCAXG_09 VCCAXG_10 VCCAXG_11 VCCAXG_12 VCCAXG_13 VCCAXG_14 VCCAXG_15 VCCAXG_16 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ16 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VCCPLL0 VCCPLL1 VDDQ10 VCCAXG_03 VCCAXG_02 VCCAXG_43 VCCAXG_44 GRAPHICS DDR3-1.5VRAILS POWER 1.8V ( 7 OF 10 ) OUT OUT OUT OUT OUT IN BI OUT OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 Fixed at 1.05V PLACEMENT NOTE: R1302 NEAR CPU PLACE R1300 AND (NOT controlled by VCCIO_SEL) AY37 AV39 B3 A4 M11 M10 L12 L11 K11 K10 J10 H12 M12 H11 H10 M30 M28 M27 M25 M24 M22 M21 M19 M18 M16 M15 M14 L30 L28 L27 L25 L24 L22 L21 L19 L18 L16 L15 L14 L13 K30 K28 K27 K25 K24 K22 K21 K19 K18 K16 K15 J30 J28 J27 J25 J24 J22 J21 J19 J18 J16 J15 J12 H32 H31 H30 H28 H27 H25 H24 H22 H21 H19 H18 H16 H15 H14 H13 G33 G32 G31 G30 G28 G27 G25 G24 G22 G21 G19 G18 G16 G15 F34 F33 F32 F31 F30 F28 F27 F25 F24 F22 F21 F19 F18 F16 U1000 OMIT SANDY_BRIDGE LGA1155-SKT AB3 M32 B36 B37 C37 A37 P34 T2 AB4 P33 W3 V8 U7 U4 U3 R7 R4 R3 N7 N4 N3 M13 L7 L4 L3 J8 J7 J4 J3 G4 G3 E4 E3 D6 D10 B9 AK30 AK29 AK27 AK23 AK21 AK19 AK17 AK15 AJ32 AJ28 AJ26 AJ17 AJ16 AG33 AF8 AB8 AA3 A7 A11 L32 A36 F15 E35 E34 E33 E31 E30 E28 E27 E25 E24 E22 E21 E19 E18 E16 E15 D36 D35 D34 D33 D31 D30 D28 D27 D25 D24 D22 D21 D19 D18 D16 D15 D14 D13 C36 C34 C33 C31 C30 C28 C27 C25 C24 C22 C21 C19 C18 C16 C15 B34 B33 B31 B30 B28 B27 B25 B24 B18 B16 B15 A28 A27 A25 A24 A18 A16 A15 A14 A13 A12 U1000 OMIT LGA1155-SKT SANDY_BRIDGE AR24 AR23 AR22 AR21 AR20 AJ24 AJ23 AY28 AY26 AY23 AJ20 AW31 AV33 AV29 AV25 AV24 AV21 AU31 AU27 AU23 AU19 AJ14 AJ13 AK12 AK11 Y38 Y37 Y36 Y35 Y34 Y33 W38 W37 W36 W35 W34 W33 U40 U39 U38 U37 U36 U35 U34 U33 T40 T39 T38 T37 T36 T35 T34 T33 AC40 AC39 AC38 AC37 AC36 AC35 AC34 AC33 AB40 AB39 AB38 AB37 AB36 AB35 AB34 AB33 U1000 OMIT LGA1155-SKT SANDY_BRIDGE 69 95 65 95 65 95 68 95 68 95 2 1 R1300 PLACEMENT_NOTE=Place close to CPU MF-LF 75 1/16W 402 1% 2 1 R1302 402 1/16W MF-LF 110 1% PLACEMENT_NOTE=Place close to CPU 21 R1310 402MF-LF 1/16W1% 44.2 65 95 21 R1312 MF-LF 402 1/16W5% 0 65 95 21 R1311 402 5% 1/16W MF-LF 0 65 95 65 95 65 95 SYNC_DATE=01/06/2011 CPU POWER SYNC_MASTER=K62 =PPVAXG_S0_CPU =PP1V5_S0_CPU_MEM =PP1V8_S0_CPU_PLL =PPVCCIO_S0_CPU CPU_VIDALERT_L CPU_VIDSCLK CPU_VIDSOUT CPU_VAXG_SENSE_N CPU_VAXG_SENSE_P CPU_VCCIO_SENSE_N CPU_VCCIO_SENSE_P CPU_VCCSA_SENSE CPU_VIDALERT_L_R CPU_VCC_SENSE_N CPU_VCC_SENSE_P TP_CPU_VCCSA_VID CPU_VIDSOUT_R CPU_VIDSCLK_R =PPVCORE_S0_CPU =PPVCCIO_S0_CPU TP_CPU_VCCIO_SEL =PPVCORE_S0_CPU =PPVCCSA_S0_CPU 13 OF 110 11.1.0 051-8115 13 OF 98 6175065 6 11 16 28 29 6 16 6 10 11 13 16 65 95 95 95 613165065 6 10 11 13 16 65613165065 6 50 www.vinafix.vn
  • 14. VSS ( 8 OF 10 ) VSS_018 VSS_017 VSS_016 VSS_022 VSS_021 VSS_015 VSS_014 VSS_013 VSS_011 VSS_010 VSS_009 VSS_008 VSS_007 VSS_006 VSS_012 VSS_005 VSS_004 VSS_003 VSS_002 VSS_001 VSS_019 VSS_020 VSS_023 VSS_024 VSS_025 VSS_026 VSS_027 VSS_028 VSS_029 VSS_030 VSS_031 VSS_032 VSS_033 VSS_034 VSS_035 VSS_036 VSS_037 VSS_038 VSS_039 VSS_040 VSS_041 VSS_042 VSS_043 VSS_044 VSS_045 VSS_046 VSS_047 VSS_048 VSS_049 VSS_050 VSS_051 VSS_052 VSS_053 VSS_054 VSS_055 VSS_056 VSS_057 VSS_058 VSS_059 VSS_060 VSS_061 VSS_062 VSS_063 VSS_064 VSS_065 VSS_066 VSS_067 VSS_068 VSS_069 VSS_070 VSS_071 VSS_072 VSS_073 VSS_074 VSS_075 VSS_076 VSS_077 VSS_078 VSS_079 VSS_080 VSS_081 VSS_082 VSS_083 VSS_084 VSS_085 VSS_086 VSS_087 VSS_088 VSS_089 VSS_090 VSS_091 VSS_092 VSS_093 VSS_094 VSS_095 VSS_096 VSS_097 VSS_098 VSS_099 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS (9 OF 10) VSS_183 VSS_184 VSS_185 VSS_181 VSS_186 VSS_187 VSS_182 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_188 VSS_197 VSS_198 VSS_199 VSS_200 VSS_194 VSS_195 VSS_196 SKT_MNT_HOLE VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 AV10 AU8 AU6 AU4 AU34 AU26 AU15 AU1 AT9 AT8 AT7 AT6 AT5 AT40 AT4 AT39 AT38 AT37 AT36 AT35 AT34 AT33 AT32 AT31 AT30 AT3 AT29 AT28 AT27 AT25 AT2 AT17 AT16 AT15 AT13 AT12 AT10 AT1 AR5 AR36 AR30 AR27 AR19 AR18 AR17 AR14 AR11 AP5 AP40 AP4 AP37 AP36 AP30 AP27 AP25 AP22 AP17 AP14 AP11 AP1 AN9 AN8 AN7 AN6 AN5 AN36 AN35 AN34 AN33 AN32 AN31 AN30 AN27 AN24 AN22 AN19 AN17 AN14 AN11 AN10 AM5 AM40 AM4 AM39 AM38 AM37 AM36 AM30 AM3 AM27 AM25 AM23 AM21 AM2 AM17 AM14 AM11 AM1 AL5 AL36 AL30 AL27 AL24 AL19 AL17 AL14 AL11 AK9 AK8 AK7 AK6 AK5 AK40 AK4 AK37 AK36 AK35 AK34 AK33 AK32 AK31 AK28 AK22 AK16 AK14 AK13 AK10 AK1 AJ5 AJ36 AJ27 AJ25 AJ21 AJ18 AJ15 AJ12 AH8 AH5 AH40 AH39 AH38 AH37 AH36 AH33 AH3 AH2 AG36 AF7 AF6 AF5 AF40 AF37 AF36 AF34 AF1 AE36 AE33 AE3 AD8 AD5 AD40 AD39 AD38 AD36 AD33 AC6 AC1 AB5 AA6 AA38 AA37 AA36 AA35 AA34 AA33 A35 A29 A26 A23 A17 U1000 SANDY_BRIDGE LGA1155-SKT OMIT Y8 Y5 W6 V5 V40 V39 V38 V37 V36 V35 V34 V33 V2 V1 U8 T6 T5 T1 R8 R39 R37 R35 R33 P6 P5 P40 P38 P36 P2 P1 N8 M9 M6 M5 M39 M37 M35 M33 M29 M26 M23 M20 M2 M17 M1 L8 L29 L26 L23 L20 L17 L10 K6 K5 K39 K37 K35 K33 K29 K26 K23 K20 K2 K17 K14 K13 K12 K1 J32 J29 J26 J23 J20 J17 J11 H9 H6 H5 H39 H37 H35 H33 H29 H26 H23 H20 H2 H17 H1 G8 G7 G34 G29 G26 G23 G20 G17 G12 G11 F9 F6 F5 F39 F37 F35 F29 F26 F23 F20 F2 F17 F14 F13 F10 F1 E8 E7 E36 E32 E29 E26 E23 E20 E17 E12 E11 D9 D5 D4 D39 D37 D32 D29 D26 D23 D20 D2 D17 C8 C7 C35 C32 C29 C26 C23 C20 C17 C12 C11 B6 B38 B35 B32 B29 B26 B23 B17 B14 B13 B10 AY8 AY6 AY4 AY35 AY18 AY14 AY11 AW6 AW36 AW16 AW14 AW11 AW10 AV6 AV38 AV35 AV3 AV17 AV14 AV11 1158 1157 1156 U1000 SANDY_BRIDGE LGA1155-SKT OMIT CPU GROUNDS 14 OF 110 11.1.0 051-8115 14 OF 98 www.vinafix.vn
  • 15. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 REMOVE THESE PULL DOWN RESISTORS AFTER PROTO REMOVE THESE PULL DOWN RESISTORS AFTER PROTO These can be Placed close to J2500 and Only for debug access New SP_DESCRIPTOR_OVERRIDE_L strap Multiplux with Mini 2 1 R1500 1K 5% 1/16W MF-LF 402 2 1 R1556 1/16W 10K MF-LF 402 5% 2 1 R1572 NOSTUFF 10K 1/16W MF-LF 5% 402 2 1 R1573 10K MF-LF 5% 1/16W 402 2 1 R1574 1/16W 5% MF-LF 402 10K 2 1 R1575 1/16W MF-LF 5% 402 10K 2 1 R1585 1K 1/16W 402 5% MF-LF NOSTUFF 2 1 R1586 1K NOSTUFF 5% MF-LF 402 1/16W 2 1 R1587 1K NOSTUFF MF-LF 5% 402 1/16W 2 1 R1588 NOSTUFF 1K MF-LF 5% 402 1/16W 2 1 R1576 10K 402 MF-LF 5% 1/16W 2 1 R1571 1/16W 5% MF-LF 10K 402 NOSTUFF 2 1 R1592 NOSTUFF 1/16W 5% 10K MF-LF 402 21 R1595 402 0 5% 1/16W MF-LF 21 R1596 NOSTUFF 0 MF-LF 402 1/16W 5% 2 1 R1509 MF-LF 1/16W 5% 10K 402 2 1 R1520 NOSTUFF 402 MF-LF 5% 1/16W 4.7K 2 1 R1541 NOSTUFF 1K 5% 402 1/16W MF-LF 2 1 R1521 NOSTUFF 1K MF-LF 5% 402 1/16W 2 1 R1515 402 1/16W 10K NOSTUFF MF-LF 5% 2 1 R1525 1/16W NOSTUFF 10K 5% 402 MF-LF 2 1 R1524 MF-LF 1/16W 402 5% 10K 2 1 R1523 MF-LF 402 5% 1/16W 10K 2 1 R1530 1/16W 10K MF-LF 5% 402 2 1 R1527 10K 402 5% 1/16W MF-LF NOSTUFF 2 1 R1528 MF-LF 402 1/16W 5% 10K NOSTUFF 2 1 R1526 5% 10K 402 MF-LF 1/16W 2 1 R1535 MF-LF 402 10K 5% 1/16W 2 1 R1538 1/16W NOSTUFF 4.7K 5% 402 MF-LF 2 1 R1539 10K 402 1/16W 5% MF-LF 2 1 R1543 5% 402 4.7K MF-LF 1/16W 2 1 R1550 402 MF-LF 1K 5% NOSTUFF 1/16W 2 1 R1551 NOSTUFF 10K 5% 1/16W MF-LF 402 2 1 R1552 NOSTUFF 10K 5% MF-LF 402 1/16W 2 1 R1553 5% MF-LF 402 1/16W 10K NOSTUFF 2 1 R1554 1/16W NOSTUFF 402 MF-LF 5% 10K 2 1 R1564 NOSTUFF 5% MF-LF 402 1/16W 1K 2 1 R1563 NOSTUFF MF-LF 402 1/16W 5% 1K 2 1 R1503 1/16W MF-LF 5% 402 10K 2 1 R1562 NOSTUFF 5% MF-LF 402 1/16W 1K 2 1 R1561 NOSTUFF 5% 402 1/16W MF-LF 1K 2 1 R1560 NOSTUFF 402 MF-LF 1/16W 5% 1K 2 1 R1569 NOSTUFF 1K 402 MF-LF 5% 1/16W 2 1 R1568 NOSTUFF MF-LF 1K 5% 1/16W 402 2 1 R1567 1K MF-LF NOSTUFF 1/16W 402 5% 2 1 R1566 NOSTUFF 1K MF-LF 402 5% 1/16W 2 1 R1565 NOSTUFF 1K 5% 1/16W MF-LF 402 2 1 R1504 NOSTUFF MF-LF 402 1/16W 5% 10K 2 1 R1570 NOSTUFF 10K 5% 402 1/16W MF-LF 2 1 R1506 10K MF-LF 1/16W 5% NOSTUFF 402 2 1 R1507 5% 402 10K 1/16W MF-LF 2 1 R1508 10K 5% 1/16W 402 MF-LF 2 1 R1510 402 MF-LF 1/16W 5% 10K 2 1 R1511 10K 1/16W 5% MF-LF 402 2 1 R1590 1/16W 10K MF-LF 5% 402 2 1 R1591 1/16W 5% 10K MF-LF 402 2 1 R1512 10K 5% MF-LF 402 1/16W 2 1 R1519 402 1/16W 5% MF-LF 10K 2 1 R1517 1/16W MF-LF 5% 10K 402 NOSTUFF 2 1 R1522 402 NOSTUFF 10K 5% MF-LF 1/16W 2 1 R1534 5% MF-LF 402 1/16W 10K NOSTUFF 2 1 R1548 10K 1/16W MF-LF 5% 402 2 1 R1555 402 5% 1/16W MF-LF 10K NOSTUFF SYNC_DATE=01/06/2011SYNC_MASTER=K62 STRAPS,PULL UPS,PULL DOWNS FOR PCH AND CPU PM_CLKRUN_L PCH_GPIO70_TACH6 PCH_GPIO71_TACH7 JTAG_T29_TMS SDCARD_RESET PCH_SPKR CPU_CFG<2> ENET_SW_RESET_L PCH_GPIO19_SATA1GP FW_PME_L BLC_GPIO PCH_GPIO0_BMBUSY_L DP_AUXCH_ISOL PCH_GPIO49_SATA5GP T29_SW_RESET_L FW_PWR_EN FW_MINI_CLKREQ_L JTAG_T29_TCK =PP3V3_S0_PCH_STRAPS PCH_GPIO36_SATA2GP PCH_GPIO7_TACH3 =PP3V3_S0_PCH_STRAPS JTAG_T29_TDI MINI_CLKREQ_L =PP3V3_S0_PCH_STRAPS MINI_CLKREQ_L ENET_MEDIA_SENSE PCH_GPIO24 FW_CLKREQ_L PCH_GPIO8 HDA_SDOUT SMC_WAKE_SCI_L PCH_GPIO29_SLP_LAN_L CPU_CFG<0> PCH_GPIO30_SUSWARN_L PCH_FDI_FSYNC<1> PCH_FDI_LSYNC<0> PCH_FDI_LSYNC<1> PCH_FDI_INT CPU_FDI_FSYNC<0> CPU_FDI_INT CPU_FDI_FSYNC<1> CPU_FDI_LSYNC<1> CPU_FDI_LSYNC<0> ODD_PWR_EN_L PCH_PCI_GNT0_L PCH_PCI_GNT1_L PCH_INIT3V3_L CPU_CFG<5> T29_CLKREQ_L FW_MINI_CLKREQ_L CPU_CFG<1> JTAG_T29_TDO PCH_FDI_FSYNC<0> PCH_GPIO15 CPU_CFG<3> CPU_CFG<16> CPU_CFG<6> =PP3V3_S5_PCH_STRAPS ENET_CLKREQ_L PM_BATLOW_L =PP3V3_S0_PCH_STRAPS PCH_PCI_GNT2_L PCH_PCI_GNT3_L ENET_LOW_PWR =PP3V3_S5_PCH_STRAPS 15 OF 110 11.1.0 051-8115 15 OF 98 19 46 48 97 21 21 18 86 96 21 44 97 98 18 102590 21 36 91 18 25 21 39 97 6 21 91 21 25 18 25 84 91 21 25 21 80 91 21 97 15 18 91 21 25 86 96 615 21 25 21 615 21 86 96 15 33 97 615 15 33 97 183792 21 39 97 21 18 56 91 18 21 46 97 19 102590 19 19 19 19 19 10 10 10 10 10 214297 20 20 21 102590 21 80 91 151891 102590 21 86 96 19 21 25 102590 102590 102590 615 18 36 91 19 46 97 615 20 20 213797 615 www.vinafix.vn
  • 16. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 10x 10UF and 10x 1UF CAPACITORS Note: VCCSA decoupling is on regulator page INTEL RECOMMENDATION 9X22UF 0805,16X 0805 placeholders BULK CAPS ON VTT REG PAGE 78 PLACEMENT_NOTE (C1660-C1665): BULK CAPS ON CPU VREG PAGE 72 PLL (CPU VCCSFR) DECOUPLING CPU VCORE DECOUPLING 2x 47uF, 1x 22uF 0805, 1x 10uF 0603, 1x 4.7uF 0603, 1x 2.2uF 0402, 2x 1uF 0402. INTEL RECOMMENDATION 10x 10uF 0805 8X 22UF 0805, 6X 10UF 0805 BULK CAPS ON CPU VREG PAGE 72 PLACEMENT_NOTE (C1650-C1657): CPU VCCIO DECOUPLING PLACEMENT_NOTE (C1600-C1613): 14x 22UF,0805 INTEL RECOMMENDATION 18X 22UF 0805 (14 Inside cavity and 4 North of processor) 6x 22uF 0805, 5x 1uF 0402. INTEL RECOMMENDATION 9X 22uF 0805 Memory (CPU VCCDDR) DECOUPLING 2 1 C1693 X5R 10% 1UF 402 10V 2 1 C1692 402 2.2UF 6.3V 10% X5R 2 1 C1691 4.7UF X5R-CERM 6.3V 603 10% 2 1 C1690 20% 6.3V 22uF CERM-X5R 805 2 1 C1681 CERM-X5R 805 20% 22uF 6.3V 2 1 C1685 1UF 10% 402 X5R 10V 2 1 C1684 10V 402 1UF 10% X5R 2 1 C1686 10V 402 10% X5R 1UF 2 1 C1609 Place inside socket cavity 805-3 22UF 20% 6.3V CERM-X5R2 1 C1608 20% 6.3V CERM-X5R Place inside socket cavity 22UF 805-3 2 1 C1607 Place inside socket cavity 22UF 20% 6.3V CERM-X5R 805-3 2 1 C1613 20% 6.3V CERM-X5R 805-3 22UF Place inside socket cavity 2 1 C1612 22UF 20% 6.3V CERM-X5R 805-3 Place inside socket cavity 2 1 C1611 805-3 6.3V 20% 22UF CERM-X5R Place inside socket cavity 2 1 C1610 805-3 CERM-X5R 6.3V 20% 22UF Place inside socket cavity 2 1 C1629 Place inside socket cavity X5R 603 10V 20% 10UF 2 1 C1600 805-3 22UF CERM-X5R 6.3V 20% Place inside socket cavity 2 1 C1628 X5R 603 10UF 10V 20% Place inside socket cavity 2 1 C1627 X5R 603 10UF 10V 20% Place inside socket cavity 2 1 C1626 X5R 603 10UF 10V Place inside socket cavity 20% 2 1 C1624 20% 10V 10UF 603 X5R Place inside socket cavity 2 1 C1623 603 X5R 10V 20% 10UF Place inside socket cavity 2 1 C1622 20% 10V 10UF 603 X5R Place inside socket cavity 2 1 C1621 20% 10V 603 X5R 10UF Place inside socket cavity 2 1 C1620 10UF 20% X5R 603 10V Place inside socket cavity 2 1 C1630 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1625 X5R 10UF 10V 20% Place inside socket cavity 603 2 1 C1631 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1632 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1633 X5R 402 1UF 16V 10% Place inside socket cavity 2 1 C1634 10% 16V X5R 402 Place inside socket cavity 1UF 2 1 C1635 1UF 10% X5R 402 16V Place inside socket cavity 2 1 C1636 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1637 1UF 10% X5R 16V Place inside socket cavity 402 2 1 C1638 1UF 10% 16V X5R 402 Place inside socket cavity 2 1 C1639 402 X5R 16V 10% 1UF Place inside socket cavity 2 1 C1601 20% 805-3 22UF 6.3V CERM-X5R Place inside socket cavity 2 1 C1670 POLY 2V 330UF-0.0045OHM 20% CASE-D2-SM 2 1 C1696 6.3V 20% 47UF 0805 X5R2 1 C1695 20% 6.3V 10UF 603 X5R 2 1 C1697 X5R 0805 47UF 20% 6.3V 2 1 C1679 6.3V 22uF 20% 805 CERM-X5R2 1 C1678 20% 6.3V 22uF CERM-X5R 805 2 1 C1677 6.3V 22uF 20% 805 CERM-X5R2 1 C1676 20% 6.3V 22uF CERM-X5R 805 2 1 C1602 805-3 CERM-X5R Place inside socket cavity 6.3V 20% 22UF 2 1 C1603 805-3 CERM-X5R 6.3V 20% 22UF Place inside socket cavity 2 1 C1604 805-3 6.3V Place inside socket cavity 22UF 20% CERM-X5R 2 1 C1650 6.3V 22UF 805 20% CERM-X5R Place under socket cavity on secondary side. 2 1 C1605 Place inside socket cavity 22UF 20% 6.3V CERM-X5R 805-3 2 1 C1606 6.3V Place inside socket cavity 22UF 20% 805-3 CERM-X5R 2 1 C1651 CERM-X5R Place under socket cavity on secondary side. 22UF 20% 6.3V 805 2 1 C1652 Place under socket cavity on secondary side. 805 20% CERM-X5R 6.3V 22UF 2 1 C1653 Place under socket cavity on secondary side. CERM-X5R 805 22UF 20% 6.3V 2 1 C1654 Place under socket cavity on secondary side. 805 20% 6.3V CERM-X5R 22UF 2 1 C1655 6.3V CERM-X5R Place under socket cavity on secondary side. 805 20% 22UF 2 1 C1656 CERM-X5R 805 22UF Place under socket cavity on secondary side. 20% 6.3V 2 1 C1657 6.3V 20% 22UF 805 Place under socket cavity on secondary side. CERM-X5R 2 1 C1665 603 6.3V 20% 10uF X5R Place at edge of socket. 2 1 C1664 Place at edge of socket. X5R 6.3V 20% 603 10uF 2 1 C1663 20% Place at edge of socket. 603 X5R 6.3V 10uF 2 1 C1662 10uF 20% Place at edge of socket. X5R 6.3V 603 2 1 C1661 603 6.3V 10uF 20% X5R Place at edge of socket. 2 1 C1660 6.3V 10uF 20% Place at edge of socket. 603 X5R 2 1 C1680 805 CERM-X5R 22uF 6.3V 20% 2 1 C1682 402 10V X5R 10% 1UF 2 1 C1683 10V 10% X5R 402 1UF 2 1 C1694 10V 402 10% X5R 1UF SYNC_DATE=01/06/2011 CPU NON-GFX DECOUPLING SYNC_MASTER=K62 =PPVCORE_S0_CPU =PPVCORE_S0_CPU =PPVCCIO_S0_CPU =PP1V5_S0_CPU_MEM =PP1V8_S0_CPU_PLL 16 OF 110 11.1.0 051-8115 16 OF 98 613165065 61316 5065 6101113 65 6111328 29 613 www.vinafix.vn
  • 17. TABLE_5_ITEM TABLE_5_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# PLACEMENT_NOTE (C1704-C1709): INTEL RECOMMENDATION 6X22UF 0805,3X 4.7UF VAXG DECOUPLING BULK CAPS ON CPU VREG PAGE 73 21 R1760 1/16W 5% 0 402 MF-LF 21 R1765 5% 1/16W 0 402 MF-LF 21 R1750 0 402 5% 1/16W MF-LF 2 1 C1709 22UF 20% 6.3V CERM-X5R 805-3 VAXG Place inside socket cavity 2 1 C1708 6.3V 22UF 20% CERM-X5R 805-3 VAXG Place inside socket cavity 2 1 C1707 22UF 20% 6.3V CERM-X5R 805-3 Place inside socket cavity VAXG 2 1 C1706 805-3 CERM-X5R 6.3V 20% 22UF Place inside socket cavity VAXG 2 1 C1705 805-3 CERM-X5R 6.3V 20% Place inside socket cavity 22UF VAXG 2 1 C1704 805-3 20% Place inside socket cavity CERM-X5R 6.3V 22UF VAXG 2 1 C1710 603 X5R-CERM 4.7UF 10% Place inside socket cavity 6.3V OMIT 2 1 C1711 X5R-CERM Place inside socket cavity 603 VAXG 4.7UF 10% 6.3V 2 1 C1712 X5R-CERM 10% 6.3V Place inside socket cavity 603 VAXG 4.7UF GFX DECOUPLING & PCH PWR ALIAS SYNC_DATE=01/06/2011SYNC_MASTER=K62 C17101 CAP,4.7UF,10%,6.3V,0603138S0586 VAXG NO_VAXGRES,0 OHM,5%,06031113S0022 C1710 PP1V05_S0_PCH_VCCADPLLB_F VOLTAGE=1.05V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM VOLTAGE=1.05V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM PP1V05_S0_PCH_VCCADPLLA_F=PP1V05_S0_PCH_VCCADPLL MIN_LINE_WIDTH=0.4 MM VOLTAGE=3.3V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM PP3V3_S0_PCH_VCCA_DAC_F =PPVAXG_S0_CPU =PP3V3_S0_PCH_VCCADAC 17 OF 110 11.1.0 051-8115 17 OF 98 22 95 22 956 22 95 6135065 6 www.vinafix.vn
  • 18. IN IN OUT OUT OUT IN BI BI BI BI OUT BI IN IN OUT OUT IN IN OUT OUT IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN OUT OUT OUT BI OUT BI IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN OUT BI OUT OUT IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN SATA1RXN SATA0TXP SATA0TXN SATA2RXN SATA2RXP SATA5RXP SATA0RXP LDRQ0* L_BKLTEN L_VDD_EN SATA3COMPI SATA3RCOMP0 SATA3RBIAS RTCRST* SRTCRST* INTRUDER* INTVRMEN HDA_BCLK HDA_SYNC HDA_RST* SPKR HDA_SDIN0 HDA_SDIN1 HDA_SDIN3 HDA_SDIN2 HDA_SDO HDA_DOCK_EN*/GPIO33 HDA_DOCK_RST*/GPIO13 JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO SPI_CS0* SPI_CLK SPI_CS1* SPI_MOSI SPI_MISO FWH0/LAD0RTCX1 RTCX2 SATA1TXP SATA0RXN SERIRQ LDRQ1*/GPIO23 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME* SATA1RXP SATA1TXN SATA2TXN SATA2TXP SATA3RXN SATA3RXP SATA3TXN SATA3TXP SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5TXN SATA5TXP SATAICOMPO SATAICOMPI SATALED* SATA0GP/GPIO21 SATA1GP/GPIO19 L_BKLTCTL JTAGSPI SATALPC IHDARTC SYM 1 OF 10 SMBDATA SML0CLK SML0ALERT*/GPIO60 SML0DATA SML1ALERT*/PCHHOT*/GPIO74 SML1CLK/GPIO58 SML1DATA/GPIO75 PETP1 PERP2 PERN2 PERP3 PETN3 PERN4 PETP3 PERP4 PETN4 PERN5 PETP4 PERP5 PETN5 PETP5 PERN6 PERP6 PETP6 PETN6 PERN7 PERP7 PETN7 PERN8 PETP7 PETN8 PERP8 PETP8 SMBALERT*/GPIO11 SMBCLK PERN1 PETN1 CLKOUT_PCIE0P CLKOUT_PCIE0N CLKOUT_PCIE1P CLKOUT_PCIE1N CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2*/GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE4N CLKOUT_PCIE3P CLKOUT_PCIE5N CLKOUT_PCIE4P PCIECLKRQ5*/GPIO44 CLKOUT_PCIE5P CLKOUT_PEG_B_P CLKOUT_PEG_B_N CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLKOUT_DMI_N CLKOUT_DMI_P CLKOUT_DP_P CLKOUT_DP_N CLKIN_DMI_N CLKIN_DMI_P CLKIN_DOT_96N CLKIN_DOT_96P CLKIN_SATA_P CLKIN_SATA_N REFCLK14IN CLKIN_PCILOOPBACK XTAL25_IN XTAL25_OUT XCLK_RCOMP CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P CLKIN_GND0_P CLKIN_GND0_N CLKIN_GND1_N CLKIN_GND1_P CL_CLK1 CL_DATA1 CL_RST1* PERP1 PETN2 PETP2 PERN3 SMBUS FLEX CLOCKFROMCLKBUFFERPEG PCI-E* SYM 2 OF 10 OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 36 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PLACE THESE 33 OHM RESISTORS CLOSE TO PCH (MIN 500MIL) DOES THIS NEED LENGTH MATCH??? PLACE THIS RESISTOR NEAR THE PCH PIN TIE THEM TOGETHER VERY CLOSE TO PINS. PLACE THE RESISTOR LESS THAN 200MILS FROM THE PINS 2791 5691 4855 91 4891 4855 91 485591 46 48 91 46 48 91 46 48 91 46 48 91 46 48 91 46 48 42 90 42 90 42 90 42 90 42 90 42 90 42 90 42 90 3792 3792 3390 3390 3990 3990 3792 3792 3390 3390 3990 3990 3790 3790 3390 3390 3990 3990 1591 11 90 11 90 9 9 8 8 26 90 26 90 26 90 26 90 26 90 26 90 26 91 27 91 27 79 91 27 91 2791 49 94 49 94 49 94 49 94 8 8 8 8 2 1 R1800 390K 402 1/16W 5% MF-LF 2 1 R1801 402 MF-LF 5% 1/16W 1M 2 1 R1802 402 MF-LF 5% 1/16W 20K 2 1 R1803 20K 1/16W 5% 402 MF-LF 2 1 C1803 1UF 10% 402 10V X5R2 1 C1802 X5R 402 1UF 10% 10V 2 1 R1830 37.4 MF-LF 402 1/16W 1% PLACE R1830 AT BALL AJ53 2 1 R1820 402 1/16W 10K 5% MF-LF 8696 8696 2 1 R1890 PLACE R1890 AT BALL AL2 MF-LF 402 1% 1/16W 90.9 21 R1810 402 MF-LF 1/16W 5% 33 21 R1811 402 MF-LF 33 1/16W 5% 21 R1812 1/16W MF-LF 33 402 5% 21 R1813 402 1/16W 5% MF-LF 33 56 91 56 91 56 91 15 56 91 2 1 R1850 MF-LF 402 10K 5% 1/16W 153691 49 94 49 94 2 1 R1853 1/16W 10K MF-LF 402 5% 2 1 R1854 10K MF-LF 1/16W 5% 402 2 1 R1855 MF-LF 1/16W 5% 402 10K 8 8 42 90 42 90 42 90 42 90 21R18601/16W MF-LF 4025% 33 21R1861 4025% 33 MF-LF1/16W 21R18625% 33 4021/16W MF-LF 21R18635% 33 1/16W 402MF-LF 21R1864 4021/16W 33 MF-LF5% 21R1822 5% 1/16W 22 MF-LF 402 21R1823 1/16W MF-LF 22 4025% 8 8 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 8696 BN37 BE56 AU53 AT55 AR56 AT57 AR54 AV52 BF57 AJ53 AJ55 AV49 AV50 AT44 AT46 AT49 AT50 AN50 AN49 AM55 AN56 AN44 AN46 AE52 AC52 AE54 AL53 AL56 AL49 AL50 AG47 AG49 AA56 AA53 AY52 AE44 AE46 AB55 AC56 BC54 BN39 BR39 BT41 BA20 BK17 AG17 AG18 AG12 BC50 BF47 BC52 BA43 BN41 BM38 BP23 BT23 BJ22 BK22 BF22 BD22 BC22 BA25 BC25 BU22 BG17 BG20 BJ20 BJ17 BK15 U1800 OMIT WLCSP COUGAR-POINT AJ5 AJ3 AL2 BK46 BJ46 BR46 BM50 BT51 BU49 BR49 BT47 BN49 AN8 D13 F13 B15 C16 E17 B21 A22 F23 B13 F15 A16 B17 F18 E21 C22 F25 J10 H12 L15 M15 M17 J17 R20 L20 H10 J12 J15 N15 P17 H17 P20 J20 BL54 AV43 BA2 AW5 BA5 AT9 AE11 AE12 AG9 AG8 AG2 AF3 Y8 Y9 AB8 AB9 AB14 AB12 W5 AA5 AC6 AE6 N52 R52 M55 N56 R31 P31 AG56 AF55 BD15 P27 R27 V52 W53 BF38 BD38 R33 P33 BF49 BF50 BA50 U1800 OMIT COUGAR-POINT WLCSP 2 1 R1832 PLACE R1832 AT BALL AC52 1/16W 402 1% MF-LF 750 2 1 R1831 1/16W PLACE R1831 AT BALL AE52 402 MF-LF 1% 49.9 2 1 R1870 402 5% 1/16W MF-LF 10K 2 1 R1871 MF-LF 1/16W 402 10K 5% 2 1 R1873 10K 402 5% MF-LF 1/16W 2 1 R1872 MF-LF 1/16W 5% 402 10K 21 R1841 402 MF-LF 1/16W 0 5% NOSTUFF 21 R1840 NOSTUFF 0 5% MF-LF 1/16W 402 46 9721 R1880 PLACE R1880 CLOSE TO R1813 MF-LF NOSTUFF 0 5% 1/16W 402 21 R1895 0 MF-LF 402 1/16W 5% NOSTUFF SYNC_MASTER=K62 PCH SATA/PCIE/CLK/LPC/SPI SYNC_DATE=01/06/2011 PCIE_CLK100M_MINI_P PCIE_CLK100M_MINI_N PCIE_CLK100M_ENET_N PCIE_T29_R2D_C_N<2> FW_MINI_CLKREQ_L PCIE_CLK100M_T29_N TP_PCIE_CLK100M_PE4N TP_PCIE_CLK100M_PE5N TP_DMI_MIDBUS_CLK100M_PEGB1N TP_DMI_MIDBUS_CLK100M_PEGB1P TP_PCIE_CLK100M_PE5P SATA_SSD_D2R_P PCH_SATAICOMP TOTAL_ETCH_LENGTH=5 MM PCIE_T29_R2D_C_P<1> PCIE_T29_R2D_C_N<1> PCIE_T29_D2R_N<1> TP_PCH_L_BKLTCTL PCH_SATA3COMP TOTAL_ETCH_LENGTH=5 MM =PP1V05_S0_PCH PCH_CLK96M_DOT_N PCH_CLK96M_DOT_P PCH_CLK33M_PCIIN LPC_R_AD<0> PCIE_ENET_R2D_C_N =PP1V05_S0_PCH_VCCIO_SATA PCH_CLK32K_RTCX2 =PP3V3_S0_PCH LPC_FRAME_R_L T29_PWR_EN TP_LPC_DREQ0_L LPC_AD<1> LPC_SERIRQ PCH_GPIO19_SATA1GP DP_AUXCH_ISOL PCH_SATALED_L LPC_FRAME_L PCH_SRTCRST_L HDA_SDIN0 TP_HDA_SDIN1 TP_HDA_SDIN2 TP_HDA_SDIN3 HDA_SDOUT_R PCH_INTRUDER_L PCH_INTVRMEN_L TP_SATA_D_R2D_CP TP_PCIE_CLK100M_PE4P PCIE_CLK100M_T29_P PEG_CLK100M_N SML_PCH_0_DATA PCIE_FW_R2D_C_N PCH_SPKR HDA_RST_R_L TP_PCH_GPIO65_CLKOUTFLEX1 TP_PCH_GPIO66_CLKOUTFLEX2 DP_GPU_T29_SEL TP_PCH_GPIO67_CLKOUTFLEX3 ITPXDP_CLK100M_N ITPXDP_CLK100M_P PCH_CLK25M_XTALOUT PCH_CLK25M_XTALIN ENET_CLKREQ_L HDA_SYNC_R HDA_BIT_CLK_R SPI_DESCRIPTOR_OVERRIDE_L PP3V3_G3H_RTC SPI_MOSI_R HDA_SYNC_R PCIE_CLK100M_FW_P PCIE_CLK100M_FW_N PCIE_T29_D2R_P<2> PCIE_T29_R2D_C_P<2> PCIE_T29_D2R_N<3> PCIE_T29_R2D_C_P<3> PCIE_CLK100M_ENET_P SATA_ODD_R2D_C_N SATA_SSD_D2R_N XDP_PCH_TDO SPI_MOSI_1_R PCH_CLKIN_GNDP0 PCH_CLKIN_GNDN1 PCH_CLKIN_GNDP1 TP_PCH_CL_DATA1 PCH_SRTCRST_L LPC_R_AD<1> TP_PCH_CL_CLK1 LPC_R_AD<3> PCH_CLK100M_SATA_N PCH_CLK100M_DMI_N HDA_RST_LHDA_RST_R_L HDA_SDOUT LPC_AD<0> SPI_CLK_R SPI_CLK_1_R PCH_INTVRMEN_L RTC_RESET_L PCH_INTRUDER_L PCIE_MINI_R2D_C_P PCIE_T29_D2R_N<2> HDA_SYNC HDA_SDOUT_R ITPXDP_CLK100M_P TP_PCH_CL_RST1 PCH_CLK14P3M_REFCLK PCH_CLK100M_SATA_P PCH_CLK100M_DMI_P SPI_CS0_R_L =PP1V05_S0_PCH_VCCIO_PCIE SPI_MISO XDP_PCH_TMS TP_SPI_CS1_L =PP3V3_S0_SATALED PCIE_MINI_D2R_N LPC_AD<3> ITPCPU_CLK100M_N PCH_CLKIN_GNDN0 SATA_SSD_R2D_C_P LPC_AD<2> ITPXDP_CLK100M_N HDA_BIT_CLK HDA_SDOUT_R TP_PCH_CLKOUT_DPP SML_PCH_1_DATA SML_PCH_1_CLK SML_PCH_1_ALERT_L LPC_R_AD<2> PCIE_T29_R2D_C_N<3> PCIE_T29_D2R_P<3> PCIE_FW_D2R_P PCIE_T29_D2R_P<0> PCIE_T29_R2D_C_P<0> TP_PCIE_R2D_PETP4 TP_PCIE_R2D_PETN4 PCIE_FW_R2D_C_P TP_PCH_L_VDD_EN TP_PCH_L_BKLTEN TP_SATA_E_R2D_CP TP_SATA_E_R2D_CN TP_SATA_E_D2RP TP_SATA_E_D2RN PCIE_T29_D2R_P<1> PCIE_T29_R2D_C_N<0> PCIE_T29_D2R_N<0> SATA_ODD_D2R_P SATA_ODD_R2D_C_P TP_SATA_D_D2RN TP_SATA_D_R2D_CN TP_SATA_F_R2D_CN TP_SATA_F_D2RN TP_SATA_D_D2RP PCH_SATA3RBIAS XDP_PCH_TCK ENET_MEDIA_SENSE JTAG_T29_TMS PCH_SATALED_L XDP_PCH_TDI PCIE_MINI_R2D_C_N PCIE_FW_D2R_N PCIE_MINI_D2R_P SML_PCH_0_CLK TOTAL_ETCH_LENGTH=5 MM PCH_XCLK_RCOMP PCH_GPIO11_SMBALERT_L ITPCPU_CLK100M_P SML_PCH_0_ALERT_L PCH_GPIO11_SMBALERT_L =PP3V3_S5_PCH PCIE_ENET_D2R_N TP_PCH_CLKOUT_DPN DMI_CLK100M_CPU_P DMI_CLK100M_CPU_N PEG_CLK100M_P SML_PCH_0_ALERT_L SMBUS_PCH_DATA SMBUS_PCH_CLK SATA_HDD_D2R_N SATA_HDD_D2R_P SATA_HDD_R2D_C_N SATA_HDD_R2D_C_P SATA_ODD_D2R_N TP_SATA_F_D2RP TP_SATA_F_R2D_CP RTC_RESET_L PCH_CLK32K_RTCX1 HDA_BIT_CLK_R PCIE_ENET_R2D_C_P PCIE_ENET_D2R_P SATA_SSD_R2D_C_N TP_PCIE_D2R_PERP4 TP_PCIE_D2R_PERN4 SML_PCH_1_ALERT_L SMC_WAKE_SCI_L 18 OF 110 11.1.0 051-8115 18 OF 98 91 8 91 6 24 79 91 62224 62124 91 80 97 8 15 25 15 25 84 91 18 42 1897 8 8 8 1891 18 1897 8 15 1891 61 83 91 18 25 90 18 25 90 1891 1891 19222795 1891 2591 8 18 97 91 8 91 1891 91 18 97 18 27 97 18 1891 182590 8 6192224 2591 642 11 90182590 1891 18 8 8 8 8 8 8 8 8 8 8 8 91 2591 153792 158696 18 42 2591 91 18 11 90 18 6192124 18 8 8 182797 1891 18 15214697 www.vinafix.vn