1. EE 290C
CMOS Analog Design Using
All-region MOSFET Modeling
Carlos Galup-Montoro
Univ. of Santa Catarina, Brazil; UC Berkeley
373 Cory Hall
carlosgalup@gmail.com
http://eel.ufsc.br/~lci/faculty.html

2. 290C Basics
Course Format: Two hours of lecture and one hour
of project discussion per week
Prerequisites: EE140 Linear Integrated Circuits or
equivalent
Grading Policy: Homework 50% + Project 50%
Textbook: CMOS Analog Design Using All-region
MOSFET Modeling, M. C. Schneider and C. Galup-
Montoro, Cambridge University Press, 2009
CMOS Analog Design Using All Region MOSFET Modeling 2

3. Analog Bipolar and MOS Circuits
•Bipolar and MOS
A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design, 1983.
K. R. Laker and W. M. C. Sansen, Design of Analog Integrated Circuits and
Systems, 1994.
D. A. Johns and K. Martin, Analog Integrated Circuit Design, 1997.
P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of
Analog Integrated Circuits, Fourth Edition, 2001.
W. M. C. Sansen, Analog Design Essentials, Springer, Dordrecht, 2006
•MOS
B. Razavi, Design of Analog CMOS Integrated Circuits, 2001.
F. Maloberti, Analog Design for CMOS VLSI Systems, 2001.
P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2002.
CMOS Analog Design Using All Region MOSFET Modeling 3

4. Important Differences between Bipolar
Transistors (BJTs) and MOSFETs
A) BJTs are three-terminal devices and MOSFETs are four-
terminal devices
B) Differences in the internal symmetries of the most
commonly used BJTs and MOSFETs
C) BJT exponential current law vs. MOS current law
D) The geometric degrees of freedom for MOSFETs in
analog design
E) Quality of BJT and MOSFET models
CMOS Analog Design Using All Region MOSFET Modeling 4

5. Ebers-Moll Equivalent Circuit of an npn
Transistor
Forward and reverse currents
IE
IC
α R IR αFIF
DE C
DC
E
IR
IF
IC = α F I F − I R IB
IE = αR IR − IF B
I B = −( I C + I E ) = (1 − α F ) I F + (1 − α R ) I R
5
CMOS Analog Design Using All Region MOSFET Modeling

6. The Capacitive Model of the MOS
Structure
VGB VGB
depletion
′
Cox
region
φs ′
dφs Cox 1
= =
φs
′ ′
dVGB Cox + Cb n
′
Cb
p- type neutral
region
CMOS Analog Design Using All Region MOSFET Modeling 6

7. MOSFET: Symmetric Strong and Weak
Inversion Models
Strong inversion VGB
VDB
VSB
ID
ID = IF − IR
n+ n+
β 2
(V − nVSB ( DB ) − VT 0 )
IF (R) = p-type substrate
GB
2n
(b)
W
′
β= µ Cox
weak inversion L
W (VGB −VT 0 − nVSB ) / nφt
( )
− e( GB T 0 DB ) t
/ nφ
V −V − nV
I D = I F − I R = I0 e
L 7
CMOS Analog Design Using All Region MOSFET Modeling

8. Intrinsic Gain Stages: (a) Common-
Source and (b) Common-Emitter
Amplifiers
CMOS Analog Design Using All Region MOSFET Modeling 8

9. Small-Signal Circuit and Frequency
Response of the Amplifiers
gm
vo ≅ − vi
jωCL
ω >> ωb
9
CMOS Analog Design Using All Region MOSFET Modeling

10. Design of Common-Emitter and
Common-Source Amplifiers
Av (ωu ) = 1 g m = ω u C L = 2 π .G B W .C L
BJT VBE /φt
IC = I S e I C = g mφt = 2π .GBW .CL .φt
MOSFET
2
1 W ng m
2
 µ Cox  (VGB − VT 0 − nVSB )
′
= =
I Dsi I Dsi
2 µ Cox (W / L )
2n  L ′
CMOS Analog Design Using All Region MOSFET Modeling 10

11. Example: GBW = 10 MHz, CL = 10 pF
µ Cox = 80·10-6 A/V2, n = 1.35
′
g m = 2π .GBW .CL = 628µ A / V
IDsi (µA)1 ID (µA)2
W/L µ µ
0 22
∞
500 6.6 28.6
100 33.2 55.2
50 66.4 88.4
10 332 354
1Strong inversion model. 2 Accurate all-
region MOSFET model
CMOS Analog Design Using All Region MOSFET Modeling 11

12. All Region “Empirical” Model of the
MOSFET
I D = 22 µA + I Dsi
IWI = ng mφt = 1.35 ⋅ 628 ⋅10−6.26 ⋅10−3 = 22 µA
 
gm
= ng mφt 1 + 
I D = IWI + I Dsi
 2 µ Coxφt (W / L ) 
′
 
 (W / L )th 
1 + 
I D = IWI g m = (W / L )th µ ( 2Coxφt )
′
(W / L ) 

 
12
CMOS Analog Design Using All Region MOSFET Modeling

13. Aspect Ratio vs. Current Excess in a
MOSFET Design
 (W / L )th 
1 + 
I D = IWI
(W / L ) 

 
CMOS Analog Design Using All Region MOSFET Modeling 13

14. Consistent Modeling of FETs: Use of
Series Associations of FETs
D
ID
MD
WD
LD
W
I =( ) [g( V , V ) - g( V , V )]
G X
D eq G S G D
L
WS
LS
W W
MS
(
) D ( )S
W L L
( ) eq =
S B
W W
L
( ) D + ( )S
L L
CMOS Analog Design Using All Region MOSFET Modeling 14

15. Series-Parallel Associations of FETs
CMOS Analog Design Using All Region MOSFET Modeling 15

16. Series Associations of FET’s vs. Long
Channel MOSFETs
Series association Long-channel
nominal VT L-dependent VT
Characterize one L-dependent characterization
transistor ( performance (halo/pocket implants effects)
of the shortest transistor
is “optimized”)
L-dependent accuracy
“accurate” for current
mirrors
Gate current more
predictable CMOS Analog Design Using All Region MOSFET Modeling 16

17. M:1
Iin
Application of Series IOut
∆βaj, ∆VTaj
M ∆βB ∆VTB
A
Parallel Associations of FETs- Ma MB
VG
Three M:1 Current Mirrors (a)
MA = M parallel Ma transistors
a) M :1 IOut
N2 : 1 MB
Iin
N
MA Mb2
VG
Ma1
B) N=√M, N:1/N N
(b)
IOut
MB
Iin M:1
N
Mb
C) M: N/N MA
Ma
M N
(c)
CMOS Analog Design Using All Region MOSFET Modeling 17

18. Current Mismatch in Two M:1 Current
Mirrors
Arnaud, JSSC Sep. 06
18
CMOS Analog Design Using All Region MOSFET Modeling

19. M-2M Digital-to-Analog Converter 1:
Mbb can be substituted by set of four transistors
ID2
ID1
Mc Md
ID
Mbc Mbd
Ma Mba Mbb
VG
ID1 ID2a ID2b
CMOS Analog Design Using All Region MOSFET Modeling 19

20. M-2M Digital-to-Analog Converter 2:
8 bit DAC with M-2M Ladder
IB VB VR IR
MB1 M71 M61 M64 M01 M04 M00
MB2 M72 M73 M62 M63 M02 M03
Q7 -Q7 Q6 -Q6 Q0 -Q0
Q7 Q6 Q0
-Q7 -Q6 -Q0
I0
V0
IG
GB VG
Q7 Q6 Q1 Q0
Di Do
D Q D Q D Q D Q
ck ck ck ck
Ck
CMOS Analog Design Using All Region MOSFET Modeling 20

21. M-2M Digital-to-Analog Converter 3:
Normalized current mismatch for a 10 µm x 10 µm
transistor
21
CMOS Analog Design Using All Region MOSFET Modeling

22. M-2M Digital-to-Analog Converter 4
Standard deviation of the measured error from 20
samples of DAC0 CMOS Analog Design Using All Region MOSFET Modeling 22

23. M-2M Digital-to-Analog Converter 5
Klimach. ISCAS 08
Top area is the M-2M ladder and the bottom area is the
serial register. CMOS Analog Design Using All Region MOSFET Modeling 23

24. 290C Course Outline
- MOSFET modeling (3 weeks)
- Mismatch and noise (2 weeks)
- Basic CMOS building blocks (5 weeks)
- Op amps ( 4 weeks)
24
CMOS Analog Design Using All Region MOSFET Modeling

25. 290C Learning Goals
Understand and use an all-region ( accumulation,
WI, MI and SI) compact MOSFET model for analog
design
Acquire a deep understanding ( nonlinearities,
noise, mismatch) of the basic CMOS build blocks
and op amps
Apply the above concepts in a design project
25
CMOS Analog Design Using All Region MOSFET Modeling

26. Similar Approaches to CMOS Design
Paul G. A. Jespers; The gm/ID Design Methodology for CMOS
Analog Low Power Integrated Circuits
2009, ISBN: 978-0-387-47100-6
D. M. Binkley; Tradeoffs and Optimization in Analog CMOS
Design ISBN: 978-0-470-03136-0, Wiley 2008.
Danica Stefanovic and Maher Kayal; Structured Analog CMOS
Design Series: Analog Circuits and Signal Processing
2009, ISBN: 978-1-4020-8572-7
CMOS Analog Design Using All Region MOSFET Modeling 26