This document discusses integrated power management platforms for LED lighting and other applications. It summarizes that TowerJazz has a total fabrication capacity equivalent to 1.7 million wafer starts per year. It also discusses drivers for integrated power management including portability, efficient energy use, and the need for power management at all system scales. The document outlines TowerJazz's modular power management platform approach which provides scalable solutions from 3.3V to 60V with low cost and high performance.

1. May 1, 2013 1
High Performance Integrated
Power Management
Platforms for LED lighting
Control & Other Applications
Dr.Shye Shapira
Director of RD
Power Management Platforms
TowerJazzChipex May 2013

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Total 8˝ Equivalent Capacity of ≈1.7M WPY

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Delivered Strong Annual Growth 2005-2012
102
187
231
252
299
509
611
639
0
100
200
300
400
500
600
700
2005 2006 2007 2008 2009 2010 2011 2012
$M
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Drive For Better Power Management Solutions
• Power Management Solutions are required at every
Scale from National Grids to portable devices and
then within chips.
• Why : Every system of every dimension needs to
supply energy to each of its components just like the
flow . When they become sufficiently complex the
bottelneck becomes energy management and
Delivery .
• Looking into Biology : The Human Brain consumes
20% of the body energy.
4

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•Digital Chip – (Managing Power at V~1V,I~1-100 mA)
•Small, Medium Portable System PDA, Cell phone,
Laptop. LED TV screen Motor Drives, Motherboard
Power Management, Audio Amplifiers (Vdd~5-100V,
I~ mA-20A)
•Off Grid Devices : Power Adapter, LED Lamp
(V~700V I~ 10mA- 1A)
•Large Portable System (Ships, Drilling Towers,
Airplanes, Spaceships )( V~1000-10000v, I -100 -
1000 A)
•Large Static system -> US national power Grid (Smart
Grid Programs) (V- 100kV?)
The (Electrical) Power Management Map
5
Integrated
Power
Management
:Drivers for Integration
Portability
Efficient Use of Energy (Grid Voltage, Lighting)

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Integrated Power Management Application space
and Technology Solution
POE, FPD DC/DC, LED Backlight
TS35PM (5V CMOS)
PMIC, Digital Controlled Power
TS18PM (1.8/5V CMOS)
High Power/Motor Drive, POE
Isolated TS35/18PM
AC to DC up to 700V
TS100PM
•Scalable 7 to 60V Vds with low Rsp
•Embedded no mask-adder NVM
•Thick Power Metal (Cu /Al)
•60V Vgs, 80V Vds options
•Fully isolated devices with buried layers
•Up to 60V operation with low Rsp
•Noise isolation for >2 Amp applications
•Allows positive/negative bias
•1.8V CMOS for 125 Kgates/mm2
•Same HV modules as TS35PM
•Multi-Fab sourcing
•AC to DC conversion
•Industrial LED lighting
•High side driver available
Modular power management platform with best-in class performance and
design enablement (models, PDK, IP and Design Services)

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Application Requirements: Expanding the Parameter Set
•Large voltage Range (0-60V, 700V)
•Large current Range/ Good Noise /Current Isolation
•High Density Logic
•High Density NVM Solutions
•High Performance ESD /LU
•Low Rdsonsp / Qg
•Accurate and detailed modeling
Contracting the Parameter Set
Optimize for
•Low process complexity / Cost
•Few Design Kits/ Process Families
TowerJazz Platform: Optimizing Conflicting Constraints
•Low cost high performance starting base platform (20 m 3lm)
Modules (0 mask NVM)
•Modularity :Tuning the complexity to the application
•Scalable solutions (Models Voltage)
Foundry Power Solution Mindset

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Modularity: Flexibility balances Complexity
“Isolated Platform”
N+ Buried Layer, EPI growth and Sinkers
(3-4 additional layers + EPI)
“Base Platform” > 80v BVdss
Single gate oxide (5V) Scalable Voltage process with
0.18um design rules
20 layers for 3LM / Yflash NVM Module
“High Digital Density” add on to
the “Base Platform”
Power
Metal Options
Thick Al, 3.3um Cu

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Step-Down (“Buck”) DC-DC Converter
Switching input to the
low-pass filter.
Ideal Efficiency 100%
9
Vo=Vin* Ton/(Ton+Toff)

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Device Requirements : A Good (Integrated)
Switch
• High Breakdown Voltage
• High Conductivity at Small Size: (Low R per unit area in real space)
• Fast switching time (Low loss: Small gate charge Qg)
• Good Isolation : Does not interfere with other circuitry or destroy
itself.
Vs
Vd≤5-1000V
Vg≤5V
Rdrift
“Low Voltage”
Device /Switch
“Drift Layer”
How is the device made ?

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Enhancement of BV by Drift Layer
• Drift layer enhances Vdd: When “low voltage” MOS on source side is
“off”, the drift layer depletes: Becomes insulating and sustains most of
the voltage .
• In “on” conditions the drift layer becomes a series Resistor. One plans
devices with the lowest resistance for a given breakdown voltage.
11
Slides for use in Integrated Power Management circuits by Shye Shapira Spring 2013
LDMOS
BV
Limits
MOS
BV
Limits
MOS
Operation
Region
Vgs
Vds
LDMOS Safe Operation Area (SOA)
Enhancement of MOS BV by Drift Layer

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12
Rdson Reduction
STI Length is scaled to
achieve Rdson Bvdss
scalable tradeoff.
STI Replaced by LOCOS
To Achieve a better Tradeoff
Rdson Bvdss
N+
P-
Poly
STI
Slides for use in Integrated Power Management circuits by Shye Shapira Spring 2013
Self aligned Body implant
reduces footprint
Ehnanced Ndrift
doping Reduces
Rdson
Ehnanced
Pdoping

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Figures of Merit: Qg
How much charge is needed
to drive into the gate to turn the switch on?
-> What is the switching time?
-> How much energy is dissipated per switch?
-> How efficient is the convertor
(one expects 95%)
Slides for use in Integrated Power Management circuits by Shye Shapira Spring 2013 13

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Additional Process Modules
•Thick (3.3um) Top Copper layer for low resistivity
–Pad over device for area reduction
–Low Sheet Rho (5.5mW/sq)
–Standard Top Metal 2,(3-option) um Al
•“LOX” layer for 20% RdsOn reduction
•Unique “Y-Flash” Non-Volatile Memory for trimming
& code storage (zero to one additional layer)
–64b module for trimming
–4Kb and 16Kb modules for code storage
–One design can be programmed to become a family
of devices.
•5.7v Buried Zener Diode – one additional layer
TowerJazz Confidential
Poly
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Continuous Voltage Scaling
TowerJazz Confidential
Why: Different applications require
slightly higher voltage margins. Moving
to the next discrete voltage bears a high
Rdson and Qg penalty .
BV [V]RdSp[mOhmmm^2]
Two Device
Offering 1 ,2Continuous Voltage
Device Offering
1
2
Rdson reduction by continuous
offering vs Two Device offering
Solution : Continuous Voltage Scaled Platform
•Rdson penalty for small increase in voltage is minimized.
•Scalable Voltage devices are accompanied by scalable voltage ESD protection
devices.
•Automated pcells allow simple control and predictability of Rdson in continuous
manner.
•Requires high end modeling solutions

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0
20
40
60
80
100
0 20 40 60 80 100
Rdson(mohm-mm2)
BVdss [V]
Rdson vs. BVdss of nLDMOS transistor
TowerJazz Gen1
TowerJazz Gen1
TowerJazz Gen2
TowerJazz Gen3
TowerJazz Gen4 (in Dev)
2012 Enhancements
Engineering
Solution

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Isolation against High Side and Low Side
Injection
17
Deep Nwell (WTN)
P-Body
M1
Drain
M1
Gate
M1
Source
& Body
N+P+
Poly
STI N+
Shallow Buried Layer
Isolation
Deep Buried Layer
Isolation
High Side Injection:
•Holes from Body to Drain Well
Diffuse to Substrate.
•Effect:
•High substrate currents
•Large Dissipation (Voltage Drop
Vdd), Device Destruction
•Mitigation : Shallow Buried layer
Low side Side Injection:
Electrons Injected From Drain To
Substrate
Effect: Large Substrate Current
Mitigation: P+ substrate
Isolated Drain

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700V Technology
TowerJazz Confidential

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700VHigh Side /Low Side Platforms
Low side platforms
include these

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RdsOn of 700V Devices
5
7
9
11
13
15
17
19
21
400 500 600 700 800 900
RdsOn[Ω*mm²]
BVdss [V]
RdsOn Vs Breakdown Voltage

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drain
source/body
(psub) gate
NBL (high
voltage region)
psub
dnblpsub_hs
21 /
Vdc
High Side
Low Side
Vh
Vo
Vs
External
Devices
load
LDMOS
Interconnection
Vdd
Bootstrap diode
High Side Circuits
R
700V High
Side Block
Diagram
Level Shifter
Floating
NMOS
TowerJazz Confidential

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Further Reading
TowerJazz Confidential
Technology : www.towerjazz.com
Technical papers examples
(ieeexplore look up author et al and Jazz/ Tower / TowerJazz):
Z. Lee , 2007,Klein , 2008, Mayzeles 2008, Berkovitch 2010, Levin 2011,Kanawati 2011.
Svitliza 2011. Ophir-Arad 2012 Vardy 2012 Shapira 2012.
Review
• Course 046235 Integrated Power Management Platforms-Technion
• Fundamentals of Power Semiconductor Devices By Baliga, B. Jayant 2008
• Technology:
• acrc.ee.technion.ac.il/.../Shapira%20Power%20Technology%20ACRC_JULY_2010.pdf
Industry :
Integrated Power Management Platforms: The Entry of Fabless Design Houses to Power
Management System Design)GSA Forum June 2010)
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