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Platform Circuit Technology Underlying
Heterogeneous Nano & Tera Systems
Prof. Dr. Q. Huang
12 May 2011
Outline

 Background
 Motivation
 Sensor Interface and Data Acquisition
 Body Area Network and Short Range Communication
 Wide Area Network and Cellular Link
 Summary


12 May 2011    Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   2
Great Expectations
Impressive Advances in
 • Microsystems Technology
 • Wireless Communications
 • Internet Connectivity
Have Set the Scene for
the Next Big Thing

The Internet of Things
 or M2M Communication




 12 May 2011         Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   3
Great Expectations
Global Interest
 • Chinese companies already
   moving fast
   • Chinese universities not far
   behind
   • National Priority and Support
 Giving us a run for our
money




12 May 2011            Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   4
Modern Healthcare Envisions
Sophisticated, Heterogeneous Systems




12 May 2011   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Sophisticated Electronics Needed to Bind
        Sensors & Actuators Into Useful Systems




12 May 2011      Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Few Can Rely on Off-the-Shelf Components
  Most Require Full Custom Integrated Circuits
     Cochlear Implant




                                                                                           Retina Implant
                                                             Defibrillator & Electronics
       Cochlear Impl. Electronics




12 May 2011                         Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
The Underlying Technologies
Sensors & Systems
                                                                                 Sensors Based on Micro & Nano Technologies




                                                                                                             CSEM WL Sensor Node

                                                                    ETH Implantable              CSEM ISM RF SoC
                                                                    Passive Telemetry IC




              Nano devices above passivation?



12 May 2011                   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems                         8
The Underlying Platform - ICs for Medical
Data Acquisition and Communication
 Data Acquisition
             Sensor Interface
             Instrumentation amplifier (sub-µV offset, low noise)
             Signal conditioning, data conversion, calibration
 DSP and Control Loop Algorithm or Circuitry
 Energy Harvesting and Supply Regulation
 Short Range Wireless
             Incorporating wake-up radio for low duty cycle operations
 Broad Range Wireless

12 May 2011                Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   9
Project Partners

    ETH Q. Huang, T. Burger
    EPFL C. Deholain
    CSEM C. Enz

   3 Main Swiss
   Institutions in
   IC Research


                               battery powered nodes
                               remote powered nodes



12 May 2011          Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   10
Introduction


       WBAN Require ULP Miniaturized Sensor Nodes
        Wireless body area networks
         (WBAN) for health monitoring,
         connecting wearable devices and as
         smart user interface
        The nodes feature sensing,
         processing, storing and wireless
         communication
        They are usually battery powered or
         use remote powering
        They require ultralow-power (ULP)
         and miniaturized wireless sensor
         nodes
        Combination of CMOS system-on-chip
         (SoC), RF and LF MEMS in a system-
         in-package (SiP) to achieve a 2.4 GHz,                                       battery powered nodes
         <mW-level, <20 mm3 node                                                      remote powered nodes

 M. Contaldo, et al., TBioCAS, Dec. 2010.
              © C. Enz | 2011         Ultralow-power MEMS-based Radio for Wireless Body Area Networks         Slide 11
BAN Scenario and System View
               WBAN                                           WWAN




      battery powered nodes
      remote powered nodes
  Contaldo, Banerjee, Enz     for Placitus November Meeting          Slide 12
Data Acquisition and Remote Powering
  INTERFACE ELECTRONICS


12 May 2011      Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   13
Passive Telemetry By ETH
                         Implant                                    Low-power, single-chip, fully-implantable micro
                                                                     transponder
                                                                    Wireless powering and communication
                                         Base-Unit
                                                                    Accurate long-term monitoring
Transmitter                                                         Independent of time and location for diagnosis and
                                                                     therapy
                                                                    Low risk of infection (no external catheter)


                Monitoring setup
                                                                               Systole                    Sensor                            Data
                                                                                                                      Oscillator
                                                                                                          Supply                         Acquisition
                                                                                                                                           Circuit

                                                                                                                                                           PPM-Output
                  Magnetoresistive                                                                                                   A
                          Sensor                                                                                           LPN
                                                                                Diastole                                                 D

                             Transponder                                                       Sensor



                                                                     PPM-AM reflected RF
 Magnet
                                                                                                                                                Voltage
                                                                                                          Rectifier   Startup      Modulator   Regulator

                   Artery
                                                                                           t             RF/DC-Converter
                                                                                               Antenna

          Sensor-transponder-system                                           Block diagram of microtransponder ASIC

  12 May 2011                        Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Implantable Passive Telemetry By ETH

                                                Chip area: 4.359 mm x 5.245 mm
                                                2 μm 40 V BiCMOS technology

                                              Measured characteristics of the micro transponder

                                               RF Carrier                                 27/40 MHz (ISM)

                                               Baud Rate                                  1 kBaud

                                               Modulation                                 PPM-AM

                                               S/N Ratio                                  39.7 dB

                                               Equiv. I/P-Offset                          170 μV

                                               THD (@ f=3.737 Hz, Vpp=5.8                 0.16%
                                               mV)
                                               Power Consumption                          0.5 mW

                                               Power Consumption of Data                  250 μW @ 3V
                                               Acquisition Unit




  12 May 2011   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Multiple Purpose Sensor Interface (EPFL)
                 Bio-electric                                                       Heart
                  Sensors                                                             &
                                                                                Brain Activity               PH; Glucose;
                                                                                                            K+, Ca2+, Mg2+;
                  Bio-medical
                                                                                                                 CRP;
                 ISET Sensors
                                                                                                              Motion
                                                                                                              Detect
               Thermal Couples                                                       Temperature
                                                      Accelerometer                                         ECG-electrode
                           pH ISFET sensor

           Sensor Type                                                                                           ensor
                                                                                         Sensor Type

         Supply Voltage          1.5V                    1.7-3.6V
            Current
                                 1nA                70μA            11μA               Contact Resistance        100KΩ
          Consumption
           Sensitivity        -56mV / pH                56 count/ g                     Signal Bandwidth         300Hz
         Sampling Rate            -               100/400Hz     40/10Hz                     Accuracy             10 Bits
       Power Consumption     13nW @ pH7            ≤175μW        ≤27μW


 12 May 2011                    Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Wireless Powering of Implants in Human Body




              The control unit which is placed on the body can remotely
                  powered the sensors and communicate with them
12 May 2011              Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Remote Powering By EPFL
 Magnetic Coupling
                                   d       
               Base Station                    2                        Implant
      Input                   C1                             Rectifier                             Output
       AC          PA                   M12                               Reg.                       DC
     voltage                                                                                       voltage
                               L1               L2      C2                                CL      RL




 Electromagnetic Coupling



                               d       
                                           2



 12 May 2011                       Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Personal and Body Area Network
  SHORT RANGE WIRELESS


12 May 2011      Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   19
Introduction


       MEMS-based Short Range Transceiver Architecture
        Front-end filters before the LNA
                Interferers and image rejection, relax linearity requirements, avoid impedance matching network
        Front-end filters after the power amplifier (PA)
                Spurious filtering, avoid impedance matching network
        Synthesizer
                Fixed low phase noise RF LO thanks to high Q
                Merged Time & Frequency reference with LF silicon resonator (SiRes)




                                                                                                                              Digital Baseband
 D. Ruffieux, et al., ESSCIRC 2010.
              © C. Enz | 2011           Ultralow-power MEMS-based Radio for Wireless Body Area Networks            Slide 20
BAW-based Class-E Power Amplifier


Transmitter Chip
 0.18µm CMOS technology
 1.25 x 1.5 mm2
 Integrated in a complete BAW-
  based transceiver
 No external components in the
  TX other than the BAW filter and
  the BALUN for test purposes




      © C. Enz | 2011               Ultralow-power MEMS-based Radio for Wireless Body Area Networks   Slide 21
BAW-based Class-E Power Amplifier


Modulated Spectrum
 1 Mb/s GFSK                                0
                                                                                                      BT mi=0.34
                                            -10                                                       BT LE
BT modulation
                                            -20                BT mask
     -21.7 dBc, -21.4
      dBc @ ±500 kHz                        -30
                                      dBc
     ACP 2: -42 dBm                        -40
     ACP 3: -49 dBm
                                            -50

                                            -60
BT LE modulation
                                            -70
     ACP 2: -41 dBm
     ACP 3: -44 dBm                        -80
                                              -4            -3          -2      -1    0       1     2              3   4
                                                                             Frequency offset [MHz]

      © C. Enz | 2011               Ultralow-power MEMS-based Radio for Wireless Body Area Networks     Slide 22
BAW-based Class-E Power Amplifier


Power Consumption Breakdown
 Block                         Cons. [mW]                                           At Pout = 5.4 dBm
 Synthesis                     11.11
 BAW DCO                       2.37                                          23%
 Dividers, ΣΔ                  3.28
 LC VCO                        3.38
 PLL div., PFD, CP             2.08
                                                                       6%                                         55%
 Selective TX                  36.19
 IF buffer                     0.56                                       8%
 RC/CR                         2.34
 SSB mixer                     3.68                                                8%

 PPA                           3.82                                             PA                    PPA
 PA                            25.79                                            SSB mix               RC/CR, Buf IF
 Chip in TX mode               47.3                                             Synthesis



      © C. Enz | 2011               Ultralow-power MEMS-based Radio for Wireless Body Area Networks               Slide 23
BAW-based Class-E Power Amplifier


Prototype




      © C. Enz | 2011               Ultralow-power MEMS-based Radio for Wireless Body Area Networks   Slide 24
Wide Area Network – Cellular Radio
  BROAD RANGE WIRELESS


12 May 2011       Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   25
Integrated Systems Laboratory   26
Multi Standard RF Transceiver for WAN




12 May 2011   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   27
GSM, EDGE, WCDMA & TD-SCDMA
                     64QAM TD-HSPA Rx                                                                                                               WCDMA Band I Tx
                      BS,TDS:CODE POWER                            DR 52.8 kbps                                                                                                         * RBW 30 kHz
                                                                   Chan    1.16                                                                                                         * VBW 300 kHz
                      dB TOT                  CF 0 Hz              Slot       4                                                 Ref        20 dBm                  Att    25 dB         * SWT 2 s

                       -7                                                                                                         10
              Ref      -14                                                                                        A
                                                                                                                                  0                                                                                                 A
               0.00
                       -21
                dBm                                                                                                               -10
                       -28                                                                                              1 RM
              Att
                                                                                                                        CLRWR     -20
              0 dB     -35
                       -42                                                                                                        -30

                       -49                                                                                                        -40
              1                                                                                                   PA
              CLRWR    -56                                                                                                        -50
                       -63                                                                                        3DB
                                                                                                                                  -60
                                                                                                                                  -70                                                                                               3DB
                      Start Code 1                                        1 Code/                Stop Code 16
                                                                                                                  B1M
                      RESULT SUMMARY TABLE                         DR 52.8 kbps
                                                                   Chan    1.16                                                 Center 1.95 GHz                                    2.55 MHz/                      Span 25.5 MHz
                                              CF 0 Hz              Slot       4
                                                                                                                                  Tx Channel                                                            W-CDMA 3GPP REV
                          GLOBAL RESULTS FOR SET           0:
                                                                                                                                  Bandwidth                       3.84 MHz
                           Chip Rate Error                 -0.14   ppm       Trg to Frame         --.--                                                                                 Power              23.65 dBm
              Ref                                                                                                 B
                          SLOT RESULTS                                       Carr Freq Err       -72.46   Hz
               0.00                                                                                                               Adjacent Channel
                dBm
                           P Data                          -8.12   dBm       IQ Imbal/Offs    0.12/0.51   %
                                                                                                                                  Bandwidth                       3.84 MHz              Lower            -45.20 dB
                             P D1                          -8.20   dBm       RHO                 0.9986
              Att
              0 dB
                             P D2                          -8.05   dBm       Composite EVM         3.77   %                       Spacing                            5 MHz              Upper            -44.54 dB
                           P Midamble                      -7.64   dBm       Pk CDE(SF 16)       -36.11   dB
                           Active Channels                     1             Average RCDE        -40.04   dB                      Alternate Channel
                          CHANNEL RESULTS                                                                                         Bandwidth                       3.84 MHz              Lower            -55.36 dB
              1
              AVG
                           Channel.SF                       1.16             Data Rate            52.8 kbps                       Spacing                           10 MHz              Upper            -55.93 dB
                           ChannelPwr Rel                  -0.01   dB        ChannelPwr Abs      -8.13 dBm        3DB
                           Symbol EVM                       1.00   %rms      Symbol EVM           2.31 %Pk




                     GSM Tx
                      Modulation Spectrum                                    * RBW 30 kHz
                                                                                                                                EDGE Tx                                                * RBW 30 kHz
                                                                                                                                      Modulation Spectrum
                                                                             * VBW 30 kHz                                                                                              * VBW 30 kHz
                      Ref    10 dBm                     * Att   10 dB        * SWT 1 s                                                Ref    5 dBm                * Att   10 dB        * SWT 1 s

                      10
                                                                LIMIT CHECK         PASS                                               0                                  LIMIT CHECK        PASS
                      0

              1 AV                                                                                                GAT                  -10                                                                                    GAT
                                                                                                                           1 AV
              AVG                                                                                                 TRG                                                                                                         TRG
                      -10                                                                                                  AVG

                                                                                                                                       -20
                      -20

                                                                                                                                       -30
                      -30

                                                                                                                                       -40
                      -40

                             SWP       4 of      200
                                                                                                                  3DB                  -50 SWP       4 of   200
                                                                                                                                                                                                                              3DB
                      -50


                                                                                                                                       -60
                      -60
                                                                                                                                       MODU_E
                                                                                                                                       -70
                      MODU_G
                      -70


                                                                                                                                       -80
                      -80


                      -90                                                                                                              -90

                      Center       915 MHz                              100 kHz/                  Span    1 MHz
                                                                                                                                      Center     915 MHz                          100 kHz/                     Span   1 MHz




12 May 2011                                                                  Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems                                                                                      28
Digital Baseband Evolved EDGE 
                 (E‐EDGE)




• International Solid‐State Circuit Conference 2010
• GSM/GPRS/EDGE 
Prototype    2 modulation types
  IC #1      15 coding schemes (CS)
  1mm2
            • Low cost channel equalizer
            • Flexible Viterbi decoder
                                                    Prototype
                                                      IC #2
                                                      2mm2



   • Supports also Level‐A E‐EDGE  4 modulation types, 23 CS
   • Efficient solution for 16QAM/32QAM channel equalization
   • Flexible Viterbi and Turbo decoder with shared memories

                    Integrated Systems Laboratory               30
IC #1       IC #2
Core size                 1.0mm2 2.0mm2                   Achieve throughput 
Max clock frequency fmax 172MHz 151MHz                    requirements with
Leakage current           0.49mA 0.6mA                       ftarget=40MHz


Continuous burst reception (8 time slots)
Avg power at ftarget=40MHz and VDD=1.2V
                                                          Scale supply voltage
GPRS CS1 (GMSK)           2.4mW       6.8mW
EDGE MCS9 (8‐PSK)         5.2mW       11.2mW
                                                            Less than 5mW 
E‐EDGE DAS12 (32QAM)         ‐‐‐      19.9mW
                                                            in fastest mode
                          Integrated Systems Laboratory                          31
Turbo Decoder ASICs for
                 WCDMA‐HSDPA and LTE




• International Solid‐State Circuit Conference 2008   • International Solid‐State Circuit Conference 2010
• Journal of Solid‐State Circuits 2009                • Journal of Solid‐State Circuits 2011
Our      ISSCC    ISSCC   ISSCC
                                               Units
                                                                           Early termination 
             chip     2003     2002    2002
                                                                            Less than 10mW 
                                       UMTS
             UMTS,    UMTS,                                                in high SNR regimes 
Standard                       UMTS    (cdma
             HSDPA    HSDPA
                                       2000)            60
                                                                                                    10.8Mb/s
CMOS         0.13     0.18     0.18    0.25    μm




                                                        Power [mW]
Die size      1.2     14.5      9.0     8.9    mm²
                                                                                             fixed VDD and fclk
Max. Θ
             18.6      24       4.1     5.5    Mb/s
@ 6 iters
Power         57.8     956     292             mW
                                       n.a.
@ (iters)    (10.8)   (10.8)   (2.0)           Mb/s     10
                                                                           scaled VDD and fclk
Energy                                         nJ/b
              0.7     11.1     14.6     6.9
Efficiency                                     /iter                 0.5               Eb/N0[dB]              4.5


                Smallest die size, lowest power consumption 
                 and best energy efficiency published so far
                                 Integrated Systems Laboratory                                                 33
• First-generation LTE terminals will target ~100Mb/s
• Maximum LTE throughput is 326.4Mb/s in downlink
                   Integrated Systems Laboratory        34
• Low-power turbo decoding for HSPA+ requires 57.8mW
• 8 -28 x higher power consumption is not tolerable
                  Integrated Systems Laboratory   35
• 8 x radix-4 MAP
                    decoder cores

                  • Master/slave Batcher
                    network for efficient
                    address mapping

                  • Implementation loss
                    within 0.14dB SNR



Integrated Systems Laboratory               36
power measurements conducted at T=300K for block‐size 3200
                 Integrated Systems Laboratory               37
power measurements conducted at T=300K for block‐size 3200


  • LTE maximum throughput requires 503mW
  • 100Mb/s milestone requires only 68.6mW

  Our ASIC achieves 10x higher throughput at the same 
power required by a state‐of‐the‐art HSDPA turbo decoder

                       Integrated Systems Laboratory               38
Summary
 Internet of Things Builds on Synergy of Three Major Fields
 Circuit Technology Platform Is a Pillar for Medical Electronics
 The Placitus Consortium Aims To Create Low Power and
     Highly Integrated Solutions
 Data Acquisition, Remote Powering, Short Range Radio and
     WAN module Are Among the Focuses
 Early Results Are Promising
 Much Is Still To Be Done


12 May 2011        Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   39
Soft‐In Soft‐Out MMSE Parallel 
        Interference Cancellation




• European Solid‐State Circuit Conference 2010
• Journal of Solid‐State Circuits 2011
• Swisscom Award 2010
63mm

                       7.8mm




                                                                           63mm
2x2 exhaustive     3x3 exhaustive                        4x4 exhaustive
                   search detector                       search detector




                                      7.8mm
search detector       64-QAM                                64-QAM
    64QAM 

         1.0mm
    1.0mm



  • Complexity grows exponentially in the number of Tx antennas
  • Example: IEEE 802.11n WLAN would require evaluation of up to 
  0.5 quadrillion (0.5∙1015) candidate vectors per second
  • Smarter way: Sphere Decoder (STS‐SD)  still very complex

                         Integrated Systems Laboratory                            41
soft‐info
      SISO
                                             best
                                                                Iteratively exchange 
                                channel
     MIMO       iterations                                        soft‐information
                                decoder
y
    detector
               a‐priori info                                     tremendous gain
                                             100
                                                                                          SISO STS‐SD
• Parallel Interference Cancellation                                                    SISO MMSE‐PIC
(PIC) cancels spatial interference                                                         soft‐output
                                                         iterative
                                             10‐1          MIMO                            MIMO
                                                        decoding                           decoding
• MMSE‐PIC close to (optimum) 
Sphere Decoder performance                                                        7dB
                                             10‐2

• MMSE‐PIC significantly less 
complex                                      10‐3
                                                                           2dB
                                                    6      8     10   12    14   16   18   20    22      24

                               Integrated Systems Laboratory                                             42
• Supports four Tx antennas
                       MMSE filter &               • Compliant to 802.11n WLAN
                      soft information
            PIC
1.225mm




                                                   Clock frequency     560MHz
                                matrix
            pre-              inversion            Core area           1.5mm2
          process
                                                   Data rate           750Mb/s
                I/O                                Power consumption   190mW


                       1.225mm

                                 Integrated Systems Laboratory                   43
Phase-ADC


       Phase Analog-to-Digital Converters – Basics
        Phase demodulation can be performed directly in the phase domain without the
         need for a multi-bit - ADC

                                                                                                 I in (t )  cos (t ) 
                                   111



                                               111                                               Qin (t )  sin  (t ) 
                             0001'1


                                         0000'1
                       11




                                                           11
                    '11




                                                        '01
                                                                           N=4
                  11




                                                       00
                00




                                                     00


                                                                                                 I in,k (t )  I in (t )  cos k 
                                                                                                 Qin,k (t )  Qin (t )  sin  k 
                                                                                                    k 
                                                                                                k                     with k  0 2 N  1
                                                            10
                                                                                                    N 2
                                                              00
                                                                '00
                                                                      00
                      1




                                                     11
                 11




                                                       00
                            1111'0
                   1'1




                                         1110'0




                                                                                       I k  I in,k (t )  Qin,k (t )  cos (t )   k 
                                                         '00
               00      0




                                                            00
                                  000



                                               000




 S. Samadian, et al., JSSC, Aug. 2003.
             © C. Enz | 2011                           Ultralow-power MEMS-based Radio for Wireless Body Area Networks                 Slide 44
Phase-ADC


Phase ADC – Coding

                      111



                               111
               0001'1


                            0000'1
          11




                                                11
      '1 1




                                             '01
    11




                                           00
 00




                                         00




                                                   10
                                                     00
                                                       '00
                                                          00
 11




                                         11
   11




                                           00
               1111'0


                            1110'0
      '10




                                             '00
         00




                                              00
               000



                                   000




         © C. Enz | 2011                                       Ultralow-power MEMS-based Radio for Wireless Body Area Networks   Slide 45
Phase-ADC


       Final 4-bit Phase ADC Architecture
                                                                      I(0+)                                      Pre-
                                                                                                               amplifiers comparators
                                                                          V(0+)
                                                                                                                                    Latch 1
                                                                                                          V(0+)




                                                                           R
                                          I(1
          VI+          I(0+)                                                                                       C1




                                                                                                  )
                                                                                                5+
                                                    V(157-)                    V(22+)                     V(0-)




                                                                      R
                gm




                                             35
          VI-          I(0-)




                                                                                            I(4
                                               -)
                                                                                                                                       L




                                                                                  R
                                                                                                                                    Latch 2
          VI+                                                                              V(45+)         V(22+)




                                                             R
                                           V(135-)                        2R                                       C2
                gm/2
                               I(45+)                                                                     V(22-)
          VQ-




                                                                                           R
                               I(45+) V(112-)




                                                                 2R
                                                                                                V(67+)




                                                    R
          VI-




                                                                               2R
                gm/2




                                                                                                  R
          VQ+                 I(90-)
                                             R
          VQ+          I(90+)                                                                             I(90+)



                                                        2R




                                                                                      2R
                                                                                                      V(90+)
                                            R
                gm                V(90-)
          VQ-          I(90-)




                                                                               2R




                                                                                                  R
                                       V(67-)                                                   V(112+)



                                                                 2R
                                                    R
          VQ+   gm/2
                                I(135+)




                                                                                            R
          VI+                                 V(45-)                      2R               V(135+)
                                I(135-)
                                                             R
          VQ-




                                                                                    R

                                                                                            I(1
                gm/2
                                                )

                                                                               V(157+)                   V(157+)                    Latch 8
                                              5-


          VI-                                        V(22-)




                                                                                               35
                                                                      R
                                                                                                                   C8
                                           I(4




                                                                                                         V(157-)




                                                                                                 +
                                                                           R




                                                                                                  )
                                                                          V(0-)

                                                                      I(0-)




 B. Banerjee, C. Enz, E. Le Roux, ISCAS, 2010.
             © C. Enz | 2011              Ultralow-power MEMS-based Radio for Wireless Body Area Networks                          Slide 46
Switzerland Is a Leader
in ICs for Microsystems and Wireless
 Three teams each a leader internationally
 Skill sets complementary to each other
             EPFL & ETH in data acquisition and energy harvesting
             CSEM in modeling, short range wireless and protocol
             ETH in wide range wireless and sensor interface
 Combined to cover complete technology platform for
     miniaturized medical and other systems
 Concentration of know-how unrivalled by other countries


12 May 2011               Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   47
Excellent Track Record




12 May 2011   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   48
In the Grand Scheme of Things
 The Technology Haves and Have-Nots
             Access to semiconductor manufacturing deprived in Europe
             Asian universities better funded in microelectronics
             Stakes are too high to be complacent

 Knowledge-Based Economy More Critical than Ever
             Labor abundance favors Asia in manufacturing
             CH/EU must retain/create high value-add industries

 No Wealth Generation without Products
             No products without a system (Lab sensors alone don’t suffice)
             Circuit/system technology platform underlying it all


12 May 2011                Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   49
More Than Just Wearable
Integrated Circuits Serve Many Prolific Sectors

 Medical Electronics
        Global annual revenue ~ 125bn USD
        Growing at 7.2% per annum in next 5 years

 Cellular Communications Hardware
             Global annual revenue ~ 210bn USD
 Swiss GDP
             490bn USD in 2008


12 May 2011            Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   50
Holding Our Own
In Research and Entrepreneurship
 Amongst Top Ten at Chip Olympics
                Accepted Papers at ISSCC 2010
                                                                              75% by the proposers
    100
     10
      1


 At forefront in tech transfer
    100             Spin-Off Companies Per Year
     10
      1



12 May 2011     Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems        51
What Circuit Technology Can Do
  - Making A Difference at Top Tier
    ETH Startup Supplies RF Transceiver To Tier-
    One Mobile Phone Vendors
    ETH Startup Sold GPS Platform to Qualcomm
    ETH Startup Supplies Home Networking Kits




                                             Nokia                     Samsung
                                                                       BlueEarth                          Samsung
                                             6788                                                        SGH-F480i
                               TCL: T36                  Konka: E3
Samsung: NC10 Dell: Inspiron Mini 10                                                     Hasee: Q130T
   12 May 2011                 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems               52
Demonstrators
 Universal Data Acquisition System for (Remotely
     Powered) Sensor Networks
             Applicable to a wide range of sensors
             With continued collaborations with sensor groups
 Short Range Wireless System on a Chip for Body Area
     Networks
             Relay acquired sensor info to a more powerful WL link
 Wide Area Wireless System on a Chip
             Relay information to monitoring centers




12 May 2011               Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems   53
Sensor Interface and Data Acquisition




12 May 2011   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Some of the Challenges

                                                                           • Large CM Voltage
                                                                           • Differential Offset
                                                                           • Low noise instrumentation
                                                                           • Multi channel capability
                                                                           • Low power drain


            Z      Z Z                   Z  Zs2                           Z i1  Z i 2
   Vd  Vc  s    s  i              Z s  s1                          Zi 
                   Z   Zi                                                         2
            Zi     s                           2

12 May 2011              Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
Multi Channel EEG Interface by ETH




12 May 2011   Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems

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Placitus

  • 1. Platform Circuit Technology Underlying Heterogeneous Nano & Tera Systems Prof. Dr. Q. Huang 12 May 2011
  • 2. Outline  Background  Motivation  Sensor Interface and Data Acquisition  Body Area Network and Short Range Communication  Wide Area Network and Cellular Link  Summary 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 2
  • 3. Great Expectations Impressive Advances in • Microsystems Technology • Wireless Communications • Internet Connectivity Have Set the Scene for the Next Big Thing The Internet of Things or M2M Communication 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 3
  • 4. Great Expectations Global Interest • Chinese companies already moving fast • Chinese universities not far behind • National Priority and Support  Giving us a run for our money 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 4
  • 5. Modern Healthcare Envisions Sophisticated, Heterogeneous Systems 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 6. Sophisticated Electronics Needed to Bind Sensors & Actuators Into Useful Systems 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 7. Few Can Rely on Off-the-Shelf Components Most Require Full Custom Integrated Circuits Cochlear Implant Retina Implant Defibrillator & Electronics Cochlear Impl. Electronics 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 8. The Underlying Technologies Sensors & Systems Sensors Based on Micro & Nano Technologies CSEM WL Sensor Node ETH Implantable CSEM ISM RF SoC Passive Telemetry IC Nano devices above passivation? 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 8
  • 9. The Underlying Platform - ICs for Medical Data Acquisition and Communication  Data Acquisition  Sensor Interface  Instrumentation amplifier (sub-µV offset, low noise)  Signal conditioning, data conversion, calibration  DSP and Control Loop Algorithm or Circuitry  Energy Harvesting and Supply Regulation  Short Range Wireless  Incorporating wake-up radio for low duty cycle operations  Broad Range Wireless 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 9
  • 10. Project Partners ETH Q. Huang, T. Burger EPFL C. Deholain CSEM C. Enz 3 Main Swiss Institutions in IC Research battery powered nodes remote powered nodes 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 10
  • 11. Introduction WBAN Require ULP Miniaturized Sensor Nodes  Wireless body area networks (WBAN) for health monitoring, connecting wearable devices and as smart user interface  The nodes feature sensing, processing, storing and wireless communication  They are usually battery powered or use remote powering  They require ultralow-power (ULP) and miniaturized wireless sensor nodes  Combination of CMOS system-on-chip (SoC), RF and LF MEMS in a system- in-package (SiP) to achieve a 2.4 GHz, battery powered nodes <mW-level, <20 mm3 node remote powered nodes  M. Contaldo, et al., TBioCAS, Dec. 2010. © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 11
  • 12. BAN Scenario and System View WBAN WWAN battery powered nodes remote powered nodes Contaldo, Banerjee, Enz for Placitus November Meeting Slide 12
  • 13. Data Acquisition and Remote Powering INTERFACE ELECTRONICS 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 13
  • 14. Passive Telemetry By ETH Implant  Low-power, single-chip, fully-implantable micro transponder  Wireless powering and communication Base-Unit  Accurate long-term monitoring Transmitter  Independent of time and location for diagnosis and therapy  Low risk of infection (no external catheter) Monitoring setup Systole Sensor Data Oscillator Supply Acquisition Circuit PPM-Output Magnetoresistive A Sensor LPN Diastole D Transponder Sensor PPM-AM reflected RF Magnet Voltage Rectifier Startup Modulator Regulator Artery t RF/DC-Converter Antenna Sensor-transponder-system Block diagram of microtransponder ASIC 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 15. Implantable Passive Telemetry By ETH Chip area: 4.359 mm x 5.245 mm 2 μm 40 V BiCMOS technology Measured characteristics of the micro transponder RF Carrier 27/40 MHz (ISM) Baud Rate 1 kBaud Modulation PPM-AM S/N Ratio 39.7 dB Equiv. I/P-Offset 170 μV THD (@ f=3.737 Hz, Vpp=5.8 0.16% mV) Power Consumption 0.5 mW Power Consumption of Data 250 μW @ 3V Acquisition Unit 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 16. Multiple Purpose Sensor Interface (EPFL) Bio-electric Heart Sensors & Brain Activity PH; Glucose; K+, Ca2+, Mg2+; Bio-medical CRP; ISET Sensors Motion Detect Thermal Couples Temperature Accelerometer ECG-electrode pH ISFET sensor Sensor Type ensor Sensor Type Supply Voltage 1.5V 1.7-3.6V Current 1nA 70μA 11μA Contact Resistance 100KΩ Consumption Sensitivity -56mV / pH 56 count/ g Signal Bandwidth 300Hz Sampling Rate - 100/400Hz 40/10Hz Accuracy 10 Bits Power Consumption 13nW @ pH7 ≤175μW ≤27μW 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 17. Wireless Powering of Implants in Human Body The control unit which is placed on the body can remotely powered the sensors and communicate with them 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 18. Remote Powering By EPFL  Magnetic Coupling d  Base Station 2 Implant Input C1 Rectifier Output AC PA M12 Reg. DC voltage voltage L1 L2 C2 CL RL  Electromagnetic Coupling d  2 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 19. Personal and Body Area Network SHORT RANGE WIRELESS 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 19
  • 20. Introduction MEMS-based Short Range Transceiver Architecture  Front-end filters before the LNA  Interferers and image rejection, relax linearity requirements, avoid impedance matching network  Front-end filters after the power amplifier (PA)  Spurious filtering, avoid impedance matching network  Synthesizer  Fixed low phase noise RF LO thanks to high Q  Merged Time & Frequency reference with LF silicon resonator (SiRes) Digital Baseband  D. Ruffieux, et al., ESSCIRC 2010. © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 20
  • 21. BAW-based Class-E Power Amplifier Transmitter Chip  0.18µm CMOS technology  1.25 x 1.5 mm2  Integrated in a complete BAW- based transceiver  No external components in the TX other than the BAW filter and the BALUN for test purposes © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 21
  • 22. BAW-based Class-E Power Amplifier Modulated Spectrum  1 Mb/s GFSK 0 BT mi=0.34 -10 BT LE BT modulation -20 BT mask  -21.7 dBc, -21.4 dBc @ ±500 kHz -30 dBc  ACP 2: -42 dBm -40  ACP 3: -49 dBm -50 -60 BT LE modulation -70  ACP 2: -41 dBm  ACP 3: -44 dBm -80 -4 -3 -2 -1 0 1 2 3 4 Frequency offset [MHz] © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 22
  • 23. BAW-based Class-E Power Amplifier Power Consumption Breakdown Block Cons. [mW] At Pout = 5.4 dBm Synthesis 11.11 BAW DCO 2.37 23% Dividers, ΣΔ 3.28 LC VCO 3.38 PLL div., PFD, CP 2.08 6% 55% Selective TX 36.19 IF buffer 0.56 8% RC/CR 2.34 SSB mixer 3.68 8% PPA 3.82 PA PPA PA 25.79 SSB mix RC/CR, Buf IF Chip in TX mode 47.3 Synthesis © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 23
  • 24. BAW-based Class-E Power Amplifier Prototype © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 24
  • 25. Wide Area Network – Cellular Radio BROAD RANGE WIRELESS 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 25
  • 27. Multi Standard RF Transceiver for WAN 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 27
  • 28. GSM, EDGE, WCDMA & TD-SCDMA 64QAM TD-HSPA Rx WCDMA Band I Tx BS,TDS:CODE POWER DR 52.8 kbps * RBW 30 kHz Chan 1.16 * VBW 300 kHz dB TOT CF 0 Hz Slot 4 Ref 20 dBm Att 25 dB * SWT 2 s -7 10 Ref -14 A 0 A 0.00 -21 dBm -10 -28 1 RM Att CLRWR -20 0 dB -35 -42 -30 -49 -40 1 PA CLRWR -56 -50 -63 3DB -60 -70 3DB Start Code 1 1 Code/ Stop Code 16 B1M RESULT SUMMARY TABLE DR 52.8 kbps Chan 1.16 Center 1.95 GHz 2.55 MHz/ Span 25.5 MHz CF 0 Hz Slot 4 Tx Channel W-CDMA 3GPP REV GLOBAL RESULTS FOR SET 0: Bandwidth 3.84 MHz Chip Rate Error -0.14 ppm Trg to Frame --.-- Power 23.65 dBm Ref B SLOT RESULTS Carr Freq Err -72.46 Hz 0.00 Adjacent Channel dBm P Data -8.12 dBm IQ Imbal/Offs 0.12/0.51 % Bandwidth 3.84 MHz Lower -45.20 dB P D1 -8.20 dBm RHO 0.9986 Att 0 dB P D2 -8.05 dBm Composite EVM 3.77 % Spacing 5 MHz Upper -44.54 dB P Midamble -7.64 dBm Pk CDE(SF 16) -36.11 dB Active Channels 1 Average RCDE -40.04 dB Alternate Channel CHANNEL RESULTS Bandwidth 3.84 MHz Lower -55.36 dB 1 AVG Channel.SF 1.16 Data Rate 52.8 kbps Spacing 10 MHz Upper -55.93 dB ChannelPwr Rel -0.01 dB ChannelPwr Abs -8.13 dBm 3DB Symbol EVM 1.00 %rms Symbol EVM 2.31 %Pk GSM Tx Modulation Spectrum * RBW 30 kHz EDGE Tx * RBW 30 kHz Modulation Spectrum * VBW 30 kHz * VBW 30 kHz Ref 10 dBm * Att 10 dB * SWT 1 s Ref 5 dBm * Att 10 dB * SWT 1 s 10 LIMIT CHECK PASS 0 LIMIT CHECK PASS 0 1 AV GAT -10 GAT 1 AV AVG TRG TRG -10 AVG -20 -20 -30 -30 -40 -40 SWP 4 of 200 3DB -50 SWP 4 of 200 3DB -50 -60 -60 MODU_E -70 MODU_G -70 -80 -80 -90 -90 Center 915 MHz 100 kHz/ Span 1 MHz Center 915 MHz 100 kHz/ Span 1 MHz 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 28
  • 29. Digital Baseband Evolved EDGE  (E‐EDGE) • International Solid‐State Circuit Conference 2010
  • 30. • GSM/GPRS/EDGE  Prototype  2 modulation types IC #1  15 coding schemes (CS) 1mm2 • Low cost channel equalizer • Flexible Viterbi decoder Prototype IC #2 2mm2 • Supports also Level‐A E‐EDGE  4 modulation types, 23 CS • Efficient solution for 16QAM/32QAM channel equalization • Flexible Viterbi and Turbo decoder with shared memories Integrated Systems Laboratory 30
  • 31. IC #1 IC #2 Core size 1.0mm2 2.0mm2 Achieve throughput  Max clock frequency fmax 172MHz 151MHz requirements with Leakage current 0.49mA 0.6mA ftarget=40MHz Continuous burst reception (8 time slots) Avg power at ftarget=40MHz and VDD=1.2V Scale supply voltage GPRS CS1 (GMSK) 2.4mW 6.8mW EDGE MCS9 (8‐PSK) 5.2mW 11.2mW Less than 5mW  E‐EDGE DAS12 (32QAM) ‐‐‐ 19.9mW in fastest mode Integrated Systems Laboratory 31
  • 32. Turbo Decoder ASICs for WCDMA‐HSDPA and LTE • International Solid‐State Circuit Conference 2008 • International Solid‐State Circuit Conference 2010 • Journal of Solid‐State Circuits 2009 • Journal of Solid‐State Circuits 2011
  • 33. Our ISSCC ISSCC ISSCC Units Early termination  chip 2003 2002 2002  Less than 10mW  UMTS UMTS, UMTS, in high SNR regimes  Standard UMTS (cdma HSDPA HSDPA 2000) 60 10.8Mb/s CMOS 0.13 0.18 0.18 0.25 μm Power [mW] Die size 1.2 14.5 9.0 8.9 mm² fixed VDD and fclk Max. Θ 18.6 24 4.1 5.5 Mb/s @ 6 iters Power 57.8 956 292 mW n.a. @ (iters) (10.8) (10.8) (2.0) Mb/s 10 scaled VDD and fclk Energy nJ/b 0.7 11.1 14.6 6.9 Efficiency /iter 0.5 Eb/N0[dB] 4.5 Smallest die size, lowest power consumption  and best energy efficiency published so far Integrated Systems Laboratory 33
  • 34. • First-generation LTE terminals will target ~100Mb/s • Maximum LTE throughput is 326.4Mb/s in downlink Integrated Systems Laboratory 34
  • 35. • Low-power turbo decoding for HSPA+ requires 57.8mW • 8 -28 x higher power consumption is not tolerable Integrated Systems Laboratory 35
  • 36. • 8 x radix-4 MAP decoder cores • Master/slave Batcher network for efficient address mapping • Implementation loss within 0.14dB SNR Integrated Systems Laboratory 36
  • 38. power measurements conducted at T=300K for block‐size 3200 • LTE maximum throughput requires 503mW • 100Mb/s milestone requires only 68.6mW Our ASIC achieves 10x higher throughput at the same  power required by a state‐of‐the‐art HSDPA turbo decoder Integrated Systems Laboratory 38
  • 39. Summary  Internet of Things Builds on Synergy of Three Major Fields  Circuit Technology Platform Is a Pillar for Medical Electronics  The Placitus Consortium Aims To Create Low Power and Highly Integrated Solutions  Data Acquisition, Remote Powering, Short Range Radio and WAN module Are Among the Focuses  Early Results Are Promising  Much Is Still To Be Done 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 39
  • 40. Soft‐In Soft‐Out MMSE Parallel  Interference Cancellation • European Solid‐State Circuit Conference 2010 • Journal of Solid‐State Circuits 2011 • Swisscom Award 2010
  • 41. 63mm 7.8mm 63mm 2x2 exhaustive  3x3 exhaustive 4x4 exhaustive search detector search detector 7.8mm search detector  64-QAM 64-QAM 64QAM  1.0mm 1.0mm • Complexity grows exponentially in the number of Tx antennas • Example: IEEE 802.11n WLAN would require evaluation of up to  0.5 quadrillion (0.5∙1015) candidate vectors per second • Smarter way: Sphere Decoder (STS‐SD)  still very complex Integrated Systems Laboratory 41
  • 42. soft‐info SISO best Iteratively exchange  channel MIMO iterations soft‐information decoder y detector a‐priori info  tremendous gain 100 SISO STS‐SD • Parallel Interference Cancellation  SISO MMSE‐PIC (PIC) cancels spatial interference soft‐output iterative 10‐1 MIMO MIMO decoding decoding • MMSE‐PIC close to (optimum)  Sphere Decoder performance 7dB 10‐2 • MMSE‐PIC significantly less  complex 10‐3 2dB 6 8 10 12 14 16 18 20 22 24 Integrated Systems Laboratory 42
  • 43. • Supports four Tx antennas MMSE filter & • Compliant to 802.11n WLAN soft information PIC 1.225mm Clock frequency 560MHz matrix pre- inversion Core area 1.5mm2 process Data rate 750Mb/s I/O Power consumption 190mW 1.225mm Integrated Systems Laboratory 43
  • 44. Phase-ADC Phase Analog-to-Digital Converters – Basics  Phase demodulation can be performed directly in the phase domain without the need for a multi-bit - ADC I in (t )  cos (t )  111 111 Qin (t )  sin  (t )  0001'1 0000'1 11 11 '11 '01 N=4 11 00 00 00 I in,k (t )  I in (t )  cos k  Qin,k (t )  Qin (t )  sin  k  k  k   with k  0 2 N  1 10 N 2 00 '00 00 1 11 11 00 1111'0 1'1 1110'0 I k  I in,k (t )  Qin,k (t )  cos (t )   k  '00 00 0 00 000 000  S. Samadian, et al., JSSC, Aug. 2003. © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 44
  • 45. Phase-ADC Phase ADC – Coding 111 111 0001'1 0000'1 11 11 '1 1 '01 11 00 00 00 10 00 '00 00 11 11 11 00 1111'0 1110'0 '10 '00 00 00 000 000 © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 45
  • 46. Phase-ADC Final 4-bit Phase ADC Architecture I(0+) Pre- amplifiers comparators V(0+) Latch 1 V(0+) R I(1 VI+ I(0+) C1 ) 5+ V(157-) V(22+) V(0-) R gm 35 VI- I(0-) I(4 -) L R Latch 2 VI+ V(45+) V(22+) R V(135-) 2R C2 gm/2 I(45+) V(22-) VQ- R I(45+) V(112-) 2R V(67+) R VI- 2R gm/2 R VQ+ I(90-) R VQ+ I(90+) I(90+) 2R 2R V(90+) R gm V(90-) VQ- I(90-) 2R R V(67-) V(112+) 2R R VQ+ gm/2 I(135+) R VI+ V(45-) 2R V(135+) I(135-) R VQ- R I(1 gm/2 ) V(157+) V(157+) Latch 8 5- VI- V(22-) 35 R C8 I(4 V(157-) + R ) V(0-) I(0-)  B. Banerjee, C. Enz, E. Le Roux, ISCAS, 2010. © C. Enz | 2011 Ultralow-power MEMS-based Radio for Wireless Body Area Networks Slide 46
  • 47. Switzerland Is a Leader in ICs for Microsystems and Wireless  Three teams each a leader internationally  Skill sets complementary to each other  EPFL & ETH in data acquisition and energy harvesting  CSEM in modeling, short range wireless and protocol  ETH in wide range wireless and sensor interface  Combined to cover complete technology platform for miniaturized medical and other systems  Concentration of know-how unrivalled by other countries 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 47
  • 48. Excellent Track Record 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 48
  • 49. In the Grand Scheme of Things  The Technology Haves and Have-Nots  Access to semiconductor manufacturing deprived in Europe  Asian universities better funded in microelectronics  Stakes are too high to be complacent  Knowledge-Based Economy More Critical than Ever  Labor abundance favors Asia in manufacturing  CH/EU must retain/create high value-add industries  No Wealth Generation without Products  No products without a system (Lab sensors alone don’t suffice)  Circuit/system technology platform underlying it all 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 49
  • 50. More Than Just Wearable Integrated Circuits Serve Many Prolific Sectors  Medical Electronics  Global annual revenue ~ 125bn USD  Growing at 7.2% per annum in next 5 years  Cellular Communications Hardware  Global annual revenue ~ 210bn USD  Swiss GDP  490bn USD in 2008 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 50
  • 51. Holding Our Own In Research and Entrepreneurship  Amongst Top Ten at Chip Olympics Accepted Papers at ISSCC 2010 75% by the proposers 100 10 1  At forefront in tech transfer 100 Spin-Off Companies Per Year 10 1 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 51
  • 52. What Circuit Technology Can Do - Making A Difference at Top Tier ETH Startup Supplies RF Transceiver To Tier- One Mobile Phone Vendors ETH Startup Sold GPS Platform to Qualcomm ETH Startup Supplies Home Networking Kits Nokia Samsung BlueEarth Samsung 6788 SGH-F480i TCL: T36 Konka: E3 Samsung: NC10 Dell: Inspiron Mini 10 Hasee: Q130T 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 52
  • 53. Demonstrators  Universal Data Acquisition System for (Remotely Powered) Sensor Networks  Applicable to a wide range of sensors  With continued collaborations with sensor groups  Short Range Wireless System on a Chip for Body Area Networks  Relay acquired sensor info to a more powerful WL link  Wide Area Wireless System on a Chip  Relay information to monitoring centers 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems 53
  • 54. Sensor Interface and Data Acquisition 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 55. Some of the Challenges • Large CM Voltage • Differential Offset • Low noise instrumentation • Multi channel capability • Low power drain Z  Z Z  Z  Zs2 Z i1  Z i 2 Vd  Vc  s  s  i  Z s  s1 Zi   Z Zi  2 Zi  s  2 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems
  • 56. Multi Channel EEG Interface by ETH 12 May 2011 Platform Circuit Technology Underlying Heterogenous Nano & Tera Systems