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An Overview of LPC2101/02/03 ,[object Object]
Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
General Description ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Comparison Table  Product Flash RAM ADC Serial Interfaces Packages LPC2101 8KB 2KB 8ch / 10-bits (2) I 2 C, (2) UARTs, (1) SPI, (1) SPI/SSP PLCC44, LPFP48 LPC2102 16KB 4KB 8ch / 10-bits (2) I 2 C, (2) UARTs (1) SPI, (1) SPI/SSP PLCC44, LPFP48 LPC2103 32KB 8KB 8ch / 10-bits (2) I 2 C, (2) UARTs (1) SPI, (1) SPI/SSP PLCC44, LPFP48
Applications ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Block Diagram
ARM7 Core ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Memory Acceleration Module (MAM) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Memory Organisation On-chip Flash program memory On-chip Static RAM
Watchdog Timer (WDT) •  Internally resets chip if not periodically reloaded. •  Supports Debug mode. •  Watchdog timer is enabled by software but requires a hardware reset or a watchdog reset/interrupt to be disabled. •  Incorrect/Incomplete feed sequence causes reset/interrupt if enabled. •  Flag indicates watchdog reset. •  Includes programmable 32-bit timer with internal pre-scaler. •  Time period can be selected from (TPCLK x 256 x 4) to (TPCLK x 232 x 4) in multiples of TPCLK x 4.
Real-Time Clock ,[object Object],[object Object],[object Object],[object Object]
I 2 C interfaces ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Analog-to-Digital Converter (ADC) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Universal Asynchronous Receiver/Transmitter ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
SPI Interface ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
16-bit Timers / External Event Counters ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Flash Memory System and Programming ,[object Object],[object Object],[object Object],[object Object],[object Object]
Embedded ICE Logic ,[object Object],[object Object],[object Object],[object Object],[object Object]
Keil MCB2103 Evaluation Board ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Additional Resource ,[object Object],[object Object],[object Object],[object Object],[object Object],Newark Farnell

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An Overview of LPC2101/02/03

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  • 4. Comparison Table Product Flash RAM ADC Serial Interfaces Packages LPC2101 8KB 2KB 8ch / 10-bits (2) I 2 C, (2) UARTs, (1) SPI, (1) SPI/SSP PLCC44, LPFP48 LPC2102 16KB 4KB 8ch / 10-bits (2) I 2 C, (2) UARTs (1) SPI, (1) SPI/SSP PLCC44, LPFP48 LPC2103 32KB 8KB 8ch / 10-bits (2) I 2 C, (2) UARTs (1) SPI, (1) SPI/SSP PLCC44, LPFP48
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  • 9. Memory Organisation On-chip Flash program memory On-chip Static RAM
  • 10. Watchdog Timer (WDT) • Internally resets chip if not periodically reloaded. • Supports Debug mode. • Watchdog timer is enabled by software but requires a hardware reset or a watchdog reset/interrupt to be disabled. • Incorrect/Incomplete feed sequence causes reset/interrupt if enabled. • Flag indicates watchdog reset. • Includes programmable 32-bit timer with internal pre-scaler. • Time period can be selected from (TPCLK x 256 x 4) to (TPCLK x 232 x 4) in multiples of TPCLK x 4.
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