12. Application Circuit Feedforward resistor for reflecting the PFC output voltage Feedback resistor for reflect the rectified line voltage Input Filter Capacitor Output Capacitor Boost Inductor PFC MOSFET
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Notes de l'éditeur
Welcome to the training module on Digital PFC Controllers.
This training module will introduce basic knowledge of PFC, and Cirrus Logic digital PFC solution.
Traditionally, power factor is defined as the phase difference or displacement angle between sinusoidal voltage and current waveforms created by linear AC loads. But it is only valid when there is a IDEAL sinusoidal signals for both current and voltage waveform. But in practice, most off-line power supplies draw a non-sinusoidal current. Switching mode power supplies (SMPS) are a good example. It conducts current in short pulses that are in phase with the line voltage but is not a pure sine wave creating line harmonics. These harmonic currents do not contribute to the load power. ENERGY STAR® for External Power Supply defines true power factor as the ratio of the active, or real, power (P) consumed in watts to the apparent power (S), drawn in volt-amperes (VA). Power factor effects the efficiency of a power system.
Power factor correction (PFC) is a feature designed into the pulse width modulation (PWM) controller to help regulate, stabilize, and provide the requirements for higher load current and instantaneous current. The ideal objective for PFC is to, make the load circuitry power factor correct and the apparent power equal to the real power. There are two types of PFC, active PFC and passive PFC. An active PFC uses an effective power electronic circuit that controls the amount of power drawn by a load in order to sustain a power factor as close as possible to unity. While a passive PFC uses a capacitive filter at the AC input to correct poor power factor.
Cirrus Logic is introducing power factor correction techniques for a switch mode power converter using digital PWM control algorithms. The digital power factor correction circuit eases the difficulty in obtaining the required efficiencies at light loads and the absence of a load, allowing the power supply designer to sustain the active PFC stage across all load conditions – thereby simplifying the design of the second stage. To align the two input waveform’s shape and phase, switching is carried out using digital techniques. The switch is controlled by the calculated duty cycles to achieve unity power factor. The system has an analog-to-digital converter to sample the output voltage, a computational unit to determine the value of the switch duty ratio, and a digital pulse-width modulator that outputs a pulsating waveform that controls the switch in the converter at the computed duty ratio.
As shown in the comparison graph, a digital PFC device is able to maintain a consistently high efficiency (well above 90 percent efficiency) even at low current power levels, whereas the efficiency of a traditional analog approach drops off dramatically at lower load ranges. This not only allows the Digital PFC device to meet increasingly tighter regulatory demands it also enables designers to deploy a common solution across a wider range of products and product families.
The CS1500 and CS1600 are able to intelligently solve increasingly complex power management challenges. Through its digital noise shaping technology, both the CS1500 and CS1600 enable reduced-sized EMI filters, which cut the need for additional high-priced components and circuitry. The CS1500 and CS1600 are digitally controlled, discontinuous conduction mode (DCM), active power factor correction ICs intended for use in power supplies rated up to 300 watts. The CS1500 is designed to address power supplies such as laptop adapters, digital TVs and PC power, while the CS1600 targets electronic lighting ballasts.
The CS1500/CS1600 PFC is based on EXL core. It operates in variable on-time, variable frequency, discontinuous conduction mode (DMC). The analog-to-digital converter (ADC) shown in the block diagram is used to sense the PFC output voltage ( V link ) and the rectified AC line voltage ( V rect ) by measuring currents through their respective resistors. The magnitudes of these currents are measured as a proportion of a reference current (I REF ) that functions as the reference for the ADCs. The digital signal is then processed in a control algorithm which determines the behavior of the CS1500/CS1600 during start-up, normal operation, and under fault conditions e.g. brownout, over-voltage, over-current, over-power, and over-temperature conditions.
The CS1500/CS1600 uses a proprietary digital control algorithm to shape conducted EMI emissions, resulting in significantly reduced EMI filter requirements.
CS1500/Cs1600 has two discrete operation modes: Start-up and Normal. Start-up mode will be activated when V link is less than 90% of nominal value and remains active until V link reaches 100% of nominal value. During this start-up phase of operation, the switching frequency could be significantly lower than the normal operating frequency, and the input current waveform is forced into following a trapezoidal envelope in phase with the line voltage, to maximize energy transfer. Once V link reaches its nominal value, the chip operates in the normal mode. Burst mode is utilized to improve system efficiency when the system output power (Po) is < 5% of nominal.
The CS1500/CS1600 has a few protection features, including overvoltage, overpower, open and short circuit protection, overtemperature, and brownout, to help protect the device during abnormal transient conditions.
Here is an example for a front-end PFC stage design for an electronic ballast application. The CS1600 continuously monitors the rectified AC line and the PFC output voltage through sense resistors tied to the IAC and the FB pins to monitor the voltages, scaled as currents. The rectified AC line sense resistor R AC needs to be the same size of the resistor RFB used for current feedback from the PFC output voltage. To achieve unity power factor, a DCM PFC circuit needs an input filtering circuit to bypass the high-frequency current so that the input current consists of the low-frequency portion only. The gate driver output is able to drive the power MOSFET with a peak current of 0.5 A source and 1.0 A sink.
Thank you for taking the time to view this presentation on “ Digital PFC Controllers ” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the CIRRUS LOGIC site, or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility. You may visit Element 14 e-community to post your questions.