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J ONAH  P ROBELL the one and the only
Multiply Talented Engineer Business man
Expertise Entrepreneurship Group leadership Project management Intellectual property Technology marketing Technical sales Processor architecture Digital signal processing Chip design and verification Design with FPGAs Technical writing and speaking Digital video, image, graphics, and multimedia processing
Chip Design The  best way to keep on top of cutting edge chip design problems, solutions, and methodologies Automatic Test Pattern Generation ATPG Switching Activity Interchange Format SAIF Assertion Based Verification ABV Dynamic Voltage and Frequency Scaling DVFS On Chip Variation OCV Design for Manufacturing DFM Design for Test DFT Static Timing Analysis STA Verification Methodology Manual VMM Open Verification Methodology OVM Three Letter Acronym TLA
The CE Food Chain consumer electronics are made with chips chips are made with IP cores
IP Cores ,[object Object],[object Object]
YAP  IP Your Advanced Processor a cache coherent  symmetric  multicore superscalar  32-bit  RISC-DSP with  128-bit   SIMD  extensions as a  GNU toolchain  target and  Linux  host
The world’s first multicore programmable video processor capable of HD 1080p decoding H.264 and other codecs
Wikipedia Articles IP cores IP core vendors
Programmable DSP Hardwired blocks Programmable video DSPs 20 mm 2 1990 Video processor cost (die size) 2000 2010 10 mm 2 5 mm 2 2 mm 2 1 mm 2 hardwired programmable Negligible cost difference 100% 0% Percentage of video chips that are programmable 0.18um 0.13um 90nm 65nm 0.25um 0.35um 45nm process technology 32nm
Image Processing progressive scan interlaced letter box frame scaling frame rate
System Data Flow A partial example of a system data flow diagram
Interpolation 1D interpolation (audio) 2D interpolation (image) 3D interpolation (video)

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Jonah

  • 1. J ONAH P ROBELL the one and the only
  • 3. Expertise Entrepreneurship Group leadership Project management Intellectual property Technology marketing Technical sales Processor architecture Digital signal processing Chip design and verification Design with FPGAs Technical writing and speaking Digital video, image, graphics, and multimedia processing
  • 4. Chip Design The best way to keep on top of cutting edge chip design problems, solutions, and methodologies Automatic Test Pattern Generation ATPG Switching Activity Interchange Format SAIF Assertion Based Verification ABV Dynamic Voltage and Frequency Scaling DVFS On Chip Variation OCV Design for Manufacturing DFM Design for Test DFT Static Timing Analysis STA Verification Methodology Manual VMM Open Verification Methodology OVM Three Letter Acronym TLA
  • 5. The CE Food Chain consumer electronics are made with chips chips are made with IP cores
  • 6.
  • 7. YAP IP Your Advanced Processor a cache coherent symmetric multicore superscalar 32-bit RISC-DSP with 128-bit SIMD extensions as a GNU toolchain target and Linux host
  • 8. The world’s first multicore programmable video processor capable of HD 1080p decoding H.264 and other codecs
  • 9. Wikipedia Articles IP cores IP core vendors
  • 10. Programmable DSP Hardwired blocks Programmable video DSPs 20 mm 2 1990 Video processor cost (die size) 2000 2010 10 mm 2 5 mm 2 2 mm 2 1 mm 2 hardwired programmable Negligible cost difference 100% 0% Percentage of video chips that are programmable 0.18um 0.13um 90nm 65nm 0.25um 0.35um 45nm process technology 32nm
  • 11. Image Processing progressive scan interlaced letter box frame scaling frame rate
  • 12. System Data Flow A partial example of a system data flow diagram
  • 13. Interpolation 1D interpolation (audio) 2D interpolation (image) 3D interpolation (video)