3. Overview
today’s lecture
interference graphs
• construction during liveness analysis
graph colouring
• assign registers to local variables and compiler temporaries
• store local variables and temporaries in memory
Register Allocation 2
4. Overview
today’s lecture
interference graphs
• construction during liveness analysis
graph colouring
• assign registers to local variables and compiler temporaries
• store local variables and temporaries in memory
coalescing
• handle move instructions
Register Allocation 2
5. Overview
today’s lecture
interference graphs
• construction during liveness analysis
graph colouring
• assign registers to local variables and compiler temporaries
• store local variables and temporaries in memory
coalescing
• handle move instructions
pre-coloured nodes
Register Allocation 2
16. Recap: Liveness analysis
terminology
definition a ← 0 live-out
live-in
usage b ← a + 1
c ← c + b
definition a ← 2 * b
live-out
live-in
usage if a < N
live-out
return c
Register Allocation 4
33. Graph colouring
example
a ← 0
b ← a + 1
a b
c ← c + b
a ← 2 * b
c
if a < N
return c
Register Allocation 8
34. Graph colouring
example
a ← 0
b ← a + 1
a b
c ← c + b
a ← 2 * b
c
if a < N
return c
Register Allocation 8
35. Graph colouring
example
a ← 0
b ← a + 1
a b
c ← c + b
a ← 2 * b
c
if a < N
return c
Register Allocation 8
36. Graph colouring
example
a ← 0
b ← a + 1
a b
c ← c + b
a ← 2 * b
c
if a < N
return c
Register Allocation 8
37. Graph colouring
example
r1 ← 0
r1 ← r1 + 1
a b
r2 ← r2 + r1
r1 ← 2 * r1
c
if r1 < N
return r2
Register Allocation 9
38. Graph colouring
steps
simplify
remove node of insignificant degree (fewer than k edges)
spill
remove node with k or more edges
select
add node, select colour
Register Allocation 10
75. Spilling
steps
simplify
remove node of insignificant degree (less than k edges)
spill
remove node of significant degree (k or more edges)
select
add node, select colour
actual spill
start over
Register Allocation 34
82. Spilling
example
a ← 1
b ← a + 1
c ← b + 1
a ← c + a
return b
Register Allocation 36
83. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1
c ← b + 1
a ← c + a
return b
Register Allocation 36
84. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a ← c + a
return b
Register Allocation 36
85. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a3 ← M[42]
a4 ← c + a3 a ← c + a
M[42] ← a4
return b
Register Allocation 36
86. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a3 ← M[42]
a4 ← c + a3 a ← c + a
M[42] ← a4
return b
Register Allocation 37
87. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a3 ← M[42]
a4 ← c + a3 a ← c + a
M[42] ← a4
return b
Register Allocation 37
88. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a3 ← M[42]
a4 ← c + a3 a ← c + a
M[42] ← a4
return b
Register Allocation 37
89. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a3 ← M[42]
a4 ← c + a3 a ← c + a
M[42] ← a4
return b
Register Allocation 37
90. Spilling
example
a1 ← 1 a ← 1
M[42] ← a1
b ← a + 1 a2 ← M[42]
b ← a2 + 1
c ← b + 1
a3 ← M[42]
a4 ← c + a3 a ← c + a
M[42] ← a4
return b
Register Allocation 37
91. Spilling
example
a ← 1
b ← a + 1
c ← b + 1
a ← c + a
return b
Register Allocation 38
92. Spilling
example
a ← 1
b ← a + 1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b
Register Allocation 38
93. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b
Register Allocation 38
94. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b b3 ← M[42]
return b3
Register Allocation 38
95. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b b3 ← M[42]
return b3
Register Allocation 39
96. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b b3 ← M[42]
return b3
Register Allocation 39
97. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b b3 ← M[42]
return b3
Register Allocation 39
98. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b b3 ← M[42]
return b3
Register Allocation 39
99. Spilling
example
a ← 1
b ← a + 1 b1 ← a + 1
M[42] ← b1
b2 ← M[42] c ← b + 1
c ← b2 + 1
a ← c + a
return b b3 ← M[42]
return b3
Register Allocation 39
109. Coalescing
conservative strategies
Briggs
• a/b has fewer than k neighbours of significant degree
• nodes of insignificant degree and a/b can be simplified
• remaining graph is colourable
George
• all neighbours of a of significant degree interfere also with b
• neighbours of a of insignificant degree can be simplified
• subgraph of original graph is colourable
Register Allocation 45
110. Graph colouring
steps
simplify
remove non-move-related node of insignificant degree
coalesce
freeze
turn move-related node of insignificant degree into non-move-related
spill
select
start over
Register Allocation 46
130. Recap: Calling Conventions
CDECL
caller push 21
push 42
• push parameters right-to-left on the stack call
add
_f
ESP 8
• clean-up stack after call
callee
• save old BP push EBP
• initialise new BP mov
mov
EBP
EAX
ESP
[EBP + 8]
• save registers mov EDX [EBP + 12]
• return result in AX
add
pop
EAX
EBP
EDX
• restore registers ret
• restore BP
Register Allocation 66
131. Recap: Calling Conventions
STDCALL
caller push 21
push 42
• push parameters right-to-left on the stack call _f@8
callee
• save old BP
• initialise new BP push EBP
• save registers mov
mov
EBP
EAX
ESP
[EBP + 8]
• return result in AX mov EDX [EBP + 12]
• restore registers
add
pop
EAX
EBP
EDX
• restore BP ret 8
Register Allocation 67
132. Recap: Calling Conventions
FASTCALL
caller mov ECX 21
mov EDX 42
• passes parameters in registers call @f@8
• pushes additional parameters right-to-left on the stack
• cleans up the stack
callee
push EBP
• save old BP, initialise new BP mov
mov
EBP ESP
EAX ECX
• save registers add EAX EDX
• return result in AX
pop
ret
EBP
• restore registers
• restore BP
Register Allocation 68
133. Pre-coloured nodes
representing registers
nodes
• register = pre-coloured node
• no simplify, no spill
• coalesce possible
edges
• all registers interfere with each other
• explicit usage of registers
• call and return instructions influence liveness
Register Allocation 69
135. Summary
lessons learned
How can we assign registers to local variables and temporaries?
• perform liveness analysis
• build interference graph
• colour interference graph
What to do if the graph is not colourable?
• keep local variables in memory
How to handle move instructions efficiently?
• coalesce nodes safely
Register Allocation 71
136. Literature
learn more
Andrew W. Appel, Jens Palsberg: Modern Compiler
Implementation in Java, 2nd edition. 2002
Lal George, Andrew W. Appel: Iterative Register Coalescing.
POPL 1996
Lal George, Andrew W. Appel: Iterative Register Coalescing.
TOPLAS 18(3), 1996
Register Allocation 72
137. Outlook
coming next
imperative and object-oriented languages
• Lecture 11: Register Allocation today
• Lecture 12: Garbage Collection Nov 13
compiler components & their generators
• Lecture 13: Scanning Nov 20
• Lecture 14: LL Parsing Dec 04
• Lecture 15: LR Parsing Dec 11
exam preparation
• Question & Answer Jan 08
Register Allocation 73
140. Pictures
attribution & copyrights
Slide 1:
Colors #2 by Carmelo Speltino, some rights reserved
Slide 40:
Tchibo by Dominica Williamson, some rights reserved
Slide 76:
Romantic Pigeon Date by Harald Hoyer, some rights reserved
Register Allocation 76
Notes de l'éditeur
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round-up on every lecture\n\nwhat to take with you\n\ncheck yourself, pre- and post-paration\n