1. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 –
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 4, April (2014), pp. 65-71 © IAEME
65
A NEW CIRCUIT MODEL OF LOW VOLTAGE HIGH CURRENT GAIN
CMOS COMPOUND PAIR AMPLIFIER
Raj Kumar Tiwari, Gaya Prasad
Department of Physics & Electronics
Dr. R.M.L. Avadh University, Faizabad (U.P.), India
ABSTRACT
In the Present paper we have studied about a new circuit CMOS Compound pair Amplifier.
Proposed new circuit model has been analysed and it is found that proposed circuit has very high
current gain and good temperature stability for low voltage applications. CMOS Compound pair can
be use as an audio as well as radio frequency tuned amplifier. It is investigated that voltage gain
increases from 206.379 to 1740.50 with suitable load values. Gain variations with load resistance
from 1K to 100K have been studied in present paper. Variation of input and output impedances have
been also studied and it found that CMOS compound pair (Proposed Model) has high input
impedance and low output impedance as compare to transistor Sziklai Pair.
Key Words: Transistor Sziklai Pair, CMOS Compound Pair, Current Gain, Input and Output,
Impedance, Temperature Stability.
INTRODUCTION
In modern time high bandwidth and gain is a challenging problem of small signal
amplification in electronics. Literature surve shows existence of various types of amplifier in which
Darlington pair is randomly used for various purposes due its few unique properties. Darlington pair
was invented by Bell Laboratories Engineer Sidney Darlington in 1953[1]. It is seen that Darlington
pair having large value of β is suitable for small signal and low frequency but not suitable for higher
frequency applications [2, 3]. For ready reference value of β is given by equation (1)
β= 2121 * QQQQ ββββ ++ (1)
Where, symbols have their usual meaning.
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2. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 –
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 4, April (2014), pp. 65-71 © IAEME
66
Sziklai pair was named after Hungarian born inventor, George Sziklai. If a compound pair is
made with an NPN deriver and PNP output device, then the overall devices behave as NPN bipolar
transistor. If a compound pair is made with a PNP deriver and NPN output device, then the overall
devices behave as PNP bipolar transistor. Darlington Pair, Sziklai pair having super β value given by
equation (2) and CMOS compound pair (proposed new model) is shown in fig.1(a), fig.1(b) and
fig.1(c) respectively.
121 * QQQ ββββ += (2)
(a) (b) (C)
Fig. 1: Basic Configuration of Devices; (a) and (b) reference devices and (c) proposed device
Complementary metal–oxide–semiconductor (CMOS) uses complementary and symmetrical
pairs of p-type and n-type metal oxide semiconductor field effect transistors (MOSFETs) for logic
functions. Literature surve[4-18] shows that CMOS devices have high noise immunity and low
static power consumption because CMOS devices do not produce as much waste heat as other forms
of logic families, like transistor–transistor logic (TTL) or NMOS logic. So in present investigation
we proposed a new CMOS compound pair model that works for low voltage and high speed
application having high current gain with good temperature stability as compare to reference devices.
EXPERIMENTAL CIRCUITS
The reference transistor sziklai pair circuit shown in Fig.2 have been simulated having an
a.c. input signal 1nVac, Ri=500 ohm, Ci=1µf, R1=47k, R2=5k, Re=2k, Ce=10µf, Co=10uf, Rl=10k,
Rc=10k, Vd=5Vdc, and npn transistor Q1=2N2222 and Q2= 2N2904 is used as an active component
to design the circuit.
Proposed new CMOS circuit shown in the Fig.3 in which the active component transister
Sziklai pair is replaced by CMOS compound pair and other passive components are same as taken in
fig.2 for ready comperision.
Base
Collector
PNP
Base
Emitter
Collector
Darlington Pair
NPN
NPN
NPN
Emitter
PNP
PNP
PNP
Base
Collector
PNP
NPN
Base
Sziklai Pair
Emitter
Collector
Emitter
NPN
PNPNPN
NMOS
CMOS
Gate
CMOS Compound Pair
M1
NMOS
M3
Source
M4
Drain
M2
PMOS PMOS

3. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 –
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 4, April (2014), pp. 65-71 © IAEME
67
Fig. 2: Transistor Sziklai pair Circuit (Reference Circuit)
Fig. 3: Proposed CMOS Compound pair Circuit
RESULTS AND DISCUSSIONS
Proposed amplifier circuit provides high current gain and wide bandwidth in comparison to
reference circuit as shown in fig.4. Proposed new circuit model can be also used as a tuned
amplifier for radio frequency application as shown in fig.5. Input Impedance for CMOS compound
pair amplifier (proposed model) is found to be higher than transistor sziklai pair as shown in fig.6
fig.7 shows low output impedenceas compare to transistor Sziklai pair amplifier. Fig.8 shows good
temperature stability. Present investigation for proposed model shows variation of the gain with load
resistance and it is found that gain for proposed model varies from 206.374 to 1740.50 for typical
load 1K to 100K respectively which is shown in table 1 for ready reference. Table2 shows variation
of gain with respect to the capactancefor fixed load resistance Rl=10k. Analysis shows that for
particular value of Co=10pf gain is found to be very high equal to 9606.0.
Vd
5Vdc
M1
MbreakP
M2
MbreakP
M4
MbreakN
Rl
10k
2
1
R1
47k
2
1
M3
MbreakN
V1
1nVac
0Vdc
Rs
2k
2
1
Ri
500
21
Cs
10uf1
2
Co
10m
R2
5k
2
1
Ci
1uf
1 2
Rd
10k
2
1

4. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 –
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 4, April (2014), pp. 65-71 © IAEME
68
Fig. 4: Current gain of transistor Sziklai pair(+ symbol) and CMOS compound pair(x symbol)
Fig.5: Voltage gain of transistor Sziklai pair(+ symbol) and CMOS compound pair(x symbol)
Fig.6: Input Impedance of transistor Sziklai pair(+ symbol) and CMOS compound pair(x symbol)

5. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 –
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 4, April (2014), pp. 65-71 © IAEME
69
Fig.7: Output Impedance of transistor Sziklai pair(+ symbol) and CMOS compound pair(x symbol)
Fig.8: Temperature stable for - 5 to 10 range of CMOS Compound pair
TABLES
Table 1: Variation of gain with load resistance for capacitance 10uf for CMOS Compound Pair
Value of Load Resistance Rl in kiloohm Voltage gain Av in mili
1 206.379
5 279.329
10 369.004
47 984.434
100 1740.50
Table 2: Variation of frequency response with output capacitor for fixed load resistance 10k for
CMOS Compound Pair
Value of
Co
10 Hz 100
Hz
1Khz 10Khz 1 Mhz 1Ghz 1Thz 100Thz
10p 314.0 2934.7 9606.0 9543.0 471.3 369.04 369.04 369.04
10n 316.6 4113.5 474.8 369.04 369.04 369.04 369.04 369.04
10u 85.5 340.11 368.6 369.04 369.04 369.04 369.04 369.04
10m 84.9 339.86 368.6 369.04 369.04 369.04 369.04 369.04

6. International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 –
6464(Print), ISSN 0976 – 6472(Online), Volume 5, Issue 4, April (2014), pp. 65-71 © IAEME
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CONCLUSION
The proposed model can be used for various application due to its high current gain high
input impedance and low output impedance and due to its good temperature stability in various
analog and digital circuit for low voltage and high speed applications.
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