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hardware model is mentioned. In section VI the Simulink model using fuzzy logic controller is discussed. A comparison
of both model are presented in section VII. Conclusion follows in section VIII.
Fig.1. Relation between efficacy and junction temperature in LEDs
II. IDBB CONVERTER
The schematic diagram of the IDBB converter is shown in figure 2. The circuit is essentially a cascaded
connection of two buck-boost converters with a single controlled switch shared by the two stages. The input stage (the
input buck-boost converter) is connected between the supply line and the second stage. The output of the first or input
stage acts as the input to the second stage (the output buck-boost converter). The output of second stage is used to supply
the load, the power LED.
Fig.2. Schematic diagram of the IDBB converter
The input stage consists of an input inductor Li, diode D1, bus capacitor CB, and the switch M. The output
buck-boost converter consists of output inductor Lo, diodes D2 and D3, output capacitor Co and the switch M. The
negative voltage produced by the first converter, at the bus capacitor is reversed by the second stage and thus always
providing a positive output voltage across Co.
The input inductor Li is made to operate in discontinuous conduction mode (DCM) in order to achieve high
input power factor. With DCM the average inductor cur-rent which is the same as line current will be proportional to the
line voltage, therefore providing near unity power factor. The output inductor Lo can be operated in DCM or continuous
conduction mode (CCM). If Lo is operated in DCM, the output capacitor requirement for achieving low ripple will be
large. So CCM is used in Lo. Thus large sized electrolytic capacitors can be replaced by film capacitors with high life
rating and efficiency. With careful design, bus capacitor CB can also be made low making it possible to implement the
whole converter using film capacitors alone.
The operation of IDBB converter can be explained in three modes. The equivalent diagrams of the circuit for
various modes are shown in figures that follow.
A. Mode 1: 0 < t < DTS
The mode 1 operation is the time between 0 and DTS where D is the duty cycle of the switch M and TS is the
switching period. During this period the switch M is ON. Initially with CB voltage polarity as shown, diodes D 1 and D2
are reverse biased whereas D 2 is forward biased. This allows the charging of inductor Li and Lo with the current
directions as marked.
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Fig.3. Mode 1 operation of IDBB converter
B. Mode 2: DTS < t < DTS + t1
Mode 2 is the time duration of t1 from DT S when the switch M is turned OFF. During t1, the diode D1 be
comes forward biased and the inductor is allowed to dis
inductor Lo discharges to the capacitor, charging it and also supplying the load.
C. Mode 3: DTS + t1 < t < TS
In this mode, the switch M remains OFF and the current
Lo is in CCM, the current in Lo which supplies Co and load, gradually drops but not to zero.
Fig.5. Mode 3 operation of IDBB converter
The waveforms for one switching period around the
III. DESIGN EQUATIONS
This section involves the analysis of IDBB converter in detail and the calculation of values for reactive
components of the converter. The line voltage is assumed to be pure sinusoid
vg (t) = Vg sin ωLt (1)
where Vg is the peak value of line voltage.
Fig.6. Main waveforms of IDBB converter
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Fig.3. Mode 1 operation of IDBB converter Fig.4. Mode 2 operation of IDBB converter
Mode 2 is the time duration of t1 from DT S when the switch M is turned OFF. During t1, the diode D1 be
the inductor is allowed to discharge to zero through D1 and CB. In the output stage, the
inductor Lo discharges to the capacitor, charging it and also supplying the load.
In this mode, the switch M remains OFF and the current through D1 is now zero. Because the output inductor
Lo is in CCM, the current in Lo which supplies Co and load, gradually drops but not to zero.
Fig.5. Mode 3 operation of IDBB converter
The waveforms for one switching period around the peak line voltage are shown in figure 6.
This section involves the analysis of IDBB converter in detail and the calculation of values for reactive
components of the converter. The line voltage is assumed to be pure sinusoid
where Vg is the peak value of line voltage.
Fig.6. Main waveforms of IDBB converter
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Fig.4. Mode 2 operation of IDBB converter
Mode 2 is the time duration of t1 from DT S when the switch M is turned OFF. During t1, the diode D1 be-
charge to zero through D1 and CB. In the output stage, the
through D1 is now zero. Because the output inductor
This section involves the analysis of IDBB converter in detail and the calculation of values for reactive
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Fig. 7. Input current waveform.
Now, the line current ig is the current through inductor L
operated in DCM, Li is allowed to charge to the line volt
DTS to DTS + t1. Thus the line current is modulated by the rectified line voltage as shown in figure 7. The average line
current ‹ig› can be calculated as follows:
‹݅݃› ൌ
ଵ
்ೞ
ଵ
ଶ
݅_ܶܦ௦ ൌ
మ
ଶೞ
sin ݓݐ
Where ig_peak is the instantaneous peak current in each switching period, is the switching frequency,
voltage and ωL is the angular line frequency.
From (2) it can be seen that the averaged line cur
interference near unity power factor can be obtained thusly.
Mean input power Pg can be calculated consider
ܲ ൌ
ଵ
ଶ
. ܸ. ‹݅݃›
ൌ
మ
మ
ସೞ
where ‹݅݃›
is the peak value of averaged input current.
By equating input and output powers neglecting losses, the output voltage
output power is obtained as follows:
ܲ ൌ
మ
ோ
where R being the static equivalent resistance of the LED load, which is
(VLED) and current (ILED) at each operating point.
ܴ ൌ
ಽಶವ
ூಽಶವ
ൌ
ംା ோംூಽಶವ
ூಽಶವ
ൌ
ം
ூಽಶವ
ܴఊ
Where Vγ and Rγ are the voltage and resistance parameters of the LED lamp respectively [6]
Now, by equating (3) and (4) and assuming an efficiency of 100%, the output voltage can be found as,
ܸ ൌ ܦ
ଶ√
Where K is given by,
ܭ ൌ
ೞ
ோ
Knowing Vo and duty cycle D, we can calculate the bus voltage, V
converter, using the voltage conversion ratio for the buck
ܸ ൌ
ሺଵିሻ
ܸ ൌ
ሺଵିሻ
ଶ√
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Fig. 7. Input current waveform. Fig.8. Current waveform through diode D
is the current through inductor Li during the period from 0 to DT
is allowed to charge to the line volt-age value at any instant and is allowed to discharge to zero from
. Thus the line current is modulated by the rectified line voltage as shown in figure 7. The average line
(2)
is the instantaneous peak current in each switching period, is the switching frequency,
is the angular line frequency.
From (2) it can be seen that the averaged line cur-rent is a sine function. Once filtered for input electromagnetic
interference near unity power factor can be obtained thusly.
can be calculated considering both average line current and line voltage to be sinusoidal.
(3)
is the peak value of averaged input current.
By equating input and output powers neglecting losses, the output voltage VO for the converter can be calculated. The
(4)
where R being the static equivalent resistance of the LED load, which is the ratio between the dc values of LED voltage
) at each operating point.
(5)
are the voltage and resistance parameters of the LED lamp respectively [6]
Now, by equating (3) and (4) and assuming an efficiency of 100%, the output voltage can be found as,
(6)
(7)
and duty cycle D, we can calculate the bus voltage, VB which acts as the input to the second buck
converter, using the voltage conversion ratio for the buck-boost converters [7]-[8].
(8)
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Fig.8. Current waveform through diode D1
during the period from 0 to DT S. Because Li is
age value at any instant and is allowed to discharge to zero from
. Thus the line current is modulated by the rectified line voltage as shown in figure 7. The average line
is the instantaneous peak current in each switching period, is the switching frequency, Vg is the peak line
rent is a sine function. Once filtered for input electromagnetic
ing both average line current and line voltage to be sinusoidal.
for the converter can be calculated. The
the ratio between the dc values of LED voltage
Now, by equating (3) and (4) and assuming an efficiency of 100%, the output voltage can be found as,
which acts as the input to the second buck-boost
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The output voltage Vo and the bus voltage VB are reversely dependent on duty cycle. That is, as duty cycle D increases
Vo increase while VB decreases. This is evident from (6) and (8).
The input inductor should always be operated in discontinuous conduction mode in order to achieve high input power
factor. The limit of duty cycle for which the Li remains in DCM can be calculated using the boundary conditions of buck
boost converter.
ܦ௧ ൌ
ଵ
ଵା
ೇ
ೇಳ
(9)
Below the limit duty cycle as given by (9) Li will always be in DCM.
The calculation of reactive components is the next step. The input inductance value is calculated from (3) for a given
value of output power and with the assumption of 100% efficiency.
ܮ ൌ
మ
మ
ସబೞ
(10)
The low frequency ripple of the bus voltage VB is applied to the second stage. It is limited by the bus capacitance CB the
voltage across which is applied to the second stage.
The low frequency component of the current in D1 which is modulated by the rectified line frequency is to be calculated
in order to calculate the bus ripple. From figure 8 the average current through diode D1 is given by,
‹݅ଵ› ൌ
ଵ
்ೞ
ವభ_ೌೖ௧భ
ଶ
(11)
Where, the peak current through D1 in each switching period is given by iD1_peak and t1 is the time needed by this
current to drop to zero. These values are given by,
݅ଵ_ =
ܶܦ௦ (12)
ݐଵ =
்ೞ
ಳ
(13)
Substituting these values in 11, the average current through D1 can be calculated as,
‹݅ଵ› =
మ
మ
ଶಳೞ
=
మ
మ
ଶಳೞ
݊݅ݏଶ
ݓ ݐ (14)
(14) can also be written as,
‹݅ଵ› =
మ
మ
ଶಳೞ
(
ଵ
ଶ
−
ଵ
ଶ
cos 2ݓ )ݐ (15)
From (15), the ac component is the cosine term. It is given by,
‹݅ଵ›
=
మ
మ
ସಳೞ
cos 2ݓݐ (16)
The low frequency peak-to-peak ripple voltage across CB , ∆VB_ LF can be obtained as,
∆V_ = 2 ‹݅ଵ›ೌೖ
ܺಳ
= 2.
మ
మ
ସಳೞ
ଵ
ଶగ(ଶಽ)ಳ
(17)
∆V_ =
మ
మ
଼గಳಳೞಽ
(18)
‹݅ଵ›ೌೖ
is the peak value of the ac component of current through D1. And fL is the line frequency.
The required capacitance value can be obtained for a given value of peak-to-peak ripple in bus voltage and is given by,
ܥ =
మ
మ
଼గಳ∆ಳ_ಽಷೞಽ
(19)
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The low frequency ripple in output voltage can be calculated using voltage conversion ratio of buck boost converter as,
∆ܸை_ி =
ଵି
. ∆ܸ_ி (20)
The low frequency ripple current produced by the ripple voltage flowing through the LED load is deter-mined by,
∆ܫா_ி =
∆ೀ_ಽಷ
ோം
=
ଵି
.
∆ಳ_ಽಷ
ோം
(21)
It can be noted that the output capacitance Co have no effect on this ripple value.
The output inductance Lo and output capacitance Co can be calculated from the voltage converter ratio of buck-boost
converter operating in CCM.
ܮை =
ಳ
.ହ∆ூಽೀ_ಹಷೞ
(22)
ܥை =
ூೀ
∆ಽೀ_ಹಷೞ
(23)
where ∆ܫை_ுி is the high frequency peak-to-peak current ripple, ∆ܸை_ுி is the high frequency peak-to-peak output
voltage ripple, and IO is the dc current through the LED load.
IV SIMULATION OF IDBB CONVERTER WITH PI CONTROLLER
From the design equations as derived in previous chapters, the reactive components can be designed. For the
design of circuit component values, certain parameters are assumed approximately.
For simulation study, a lamp formed by 60 LW W5SG power LEDs by Osram in a series array were considered
whose rated load current is 350 mA, with an out-put power of 70 W and a total luminous flux of 1500 lm. The model
parameters Vγ and Rγ for the lamp is 170 V and 87 respectively. The equivalent resistance at nominal power is
calculated as R = 577 using the equation (5).
A switching frequency of 50 kHz is chosen. The line voltage is 230 Vrms with a 50-Hz line frequency. A line
voltage variation of at least ±10% must be admitted by the converter thus assuring constant current through the load.
Using (10) and with a duty cycle of 40% for the nominal operating point, a value Li = 1.2 mH is calculated. Now, the
operation of the Li in DCM for the whole line voltage range must be checked. The necessary duty cycle for a given line
and output voltages can be calculated from (6), and the limit duty cycle for the DCM–CCM boundary is obtained from
(9).
The bus capacitance has been calculated using (19). The maximum bus ripple voltage appears at the lower value
of the line voltage. The maximum bus peak-to-peak ripple voltage has been selected to be 5%; this is 12Vpp
approximately. Using (19), a value CB = 80 µF is obtained.
The low-frequency ripple voltage transferred to the LED load is obtained from (20). In this case, giving
maximum ripple voltage of 4.2%, this is around 10 Vpp. The output inductance LO is calculated for a 50% current ripple.
Using (22), a value LO = 7 mH is obtained.
Finally, the output capacitance Co is designed to achieve a 2% high frequency current ripple through the LED
load. It must be noted that the voltage and current ripples in the LED load ∆VLED and ∆ILED, respectively, are related by
the dynamic resistance as follows:
∆VLED = ∆ILED.Rγ. (24)
Then, by using (24) in (23), CO = 40 µF is obtained for a 2% current ripple at high frequency. However, the low-
frequency current ripple is much higher. It can be calculated from (21), giving a value of 30%. This means a peak-to-
peak current ripple of 110 mApp approximately for nominal operation, which is a current crest factor of only 1.16. In
addition, both capacitances CB and CO can be implemented using long-life film capacitors without excessive volume
penalty.
The MATLAB SIMULINK model is shown in figure 9. The input power factor of the converter can be viewed
on the power factor display block. The control block as shown in figure generates the gate signal for controlling the
switch. The rated current of the LED lamp which is 350 mA is given as current reference. The output current is
subtracted from the reference current value to produce the error signal. This error signal is the input to the PI controller.
The controller output is so as to maintain the output current value close to reference value. The output of PI controller is
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fed to the saturation block. The saturation block is used to limit the contro
decided by the upper and lower limits of ramp signal. In the simulation, the output values for ra
and 1. Therefore, the saturation upper and lower limits are take
controller output signal are compared in the relational operat
ramp signal, a pulse is generated.
Simulation results of IDBB converter using PI controller gives waveforms very close to the waveforms in figure
6. The input voltage and current waveforms are sown in figures 10 and 11 respectively.
Fig.9. SIMULINK model of IDBB converter
Fig. 10.Output voltage waveform
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to the saturation block. The saturation block is used to limit the controller output to a limited range; t
decided by the upper and lower limits of ramp signal. In the simulation, the output values for ra
refore, the saturation upper and lower limits are taken as 0.9 and 0.1 respectively.
mpared in the relational operator block. Whenever the controller output is greater than the
Simulation results of IDBB converter using PI controller gives waveforms very close to the waveforms in figure
6. The input voltage and current waveforms are sown in figures 10 and 11 respectively.
Fig.9. SIMULINK model of IDBB converter
Fig. 10.Output voltage waveform Fig.11.Output current waveform
Management (ICETEM14)
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ller output to a limited range; this range being
decided by the upper and lower limits of ramp signal. In the simulation, the output values for ramp signal are chosen as 0
as 0.9 and 0.1 respectively. The ramp signal and the
or block. Whenever the controller output is greater than the
Simulation results of IDBB converter using PI controller gives waveforms very close to the waveforms in figure
Fig.11.Output current waveform
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Fig.12 output voltage waveform Fig.13. Hardware model.
The output voltage as obtained in simulation is shown in figure 12.
V. HARDWARE MODEL
A hardware model for the IDBB converter with PI control was implemented as shown in figure 13. The control
for the converter was implemented using PIC controller. The hardware output was in agreement with the simulation
results.
VI. SIMULATION OF IDBB CONVERTER USING FUZZY LOGIC CONTROLLER
FL provides a simple way to arrive at a definite conclusion based upon vague, ambiguous, imprecise, noisy, or
missing input information. FL's approach to control problems mimics how a person would make decisions, only much
faster. A FUZZY logic model of the IDBB converter was modelled in MATLAB. The model differs from the previous
model in the control block only. The input current and voltage waveforms are shown in figure 14 and 15 respectively.
Fig.14.input current Fig.15. Input voltage
The output voltage waveform is shown in figure 16.
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Fig.16.Output voltage.
VII COMPARISON
The input power factor is maintained in both models – using PI controller and fuzzy logic controller. In the case
of model with PI controller, the output voltage varied up and below 200 V by 5 volts. But in the one using fuzzy logic,
this variation is limited to 2 volts. Thus oscillations are limited with fuzzy logic control. This is shown in figure 17.
Fig.17. Comparison of results from PI controller and Fuzzy logic controller
VIII CONCLUSION
An IDBB converter for power LED lamps was proposed which ensures high input power factor and low output ripple.
The converter with PI control method was modelled in SIMULINK and waveforms were studied. The same is hardware
modelled and observed the waveforms. Also a modified converter with fuzzy logic controller was modelled in Simulink.
The SIMULINK model with fuzzy logic control ensures the high power factor together with flexibility and ease of
control.
Galvanic isolation can be provided in the circuit using an inductor in the output circuit. Automatic dimming controls can
be implemented for better efficiency when used for street lighting applications.
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[4] Marcos Alonso, Senior Member, IEEE, Juan Viña, David Gacio Vaquero, Student Member, IEEE, Gilberto
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