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Anderson Huang
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Double Data Rate (DDR)SDRAM Specification
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Double data rate (ddr)
1.
Double Data Rate
(DDR) SDRAM Specification 64Mb through 1Gb DDR SDRAMs with X4/X8/X16 data interfaces.
2.
3.
4.
5.
6.
7.
BGA Device Address
Assignment and Package Table
8.
FUNCTIONAL BLOCK DIAGRAM
OF DDR SDRAM
9.
PIN DESCRIPTIONS
10.
11.
12.
13.
INITIALIZE AND MODE
REGISTER SETS
14.
15.
16.
17.
18.
19.
20.
21.
22.
COMMANDS
23.
24.
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35.
36.
37.
38.
39.
40.
41.
42.
43.
44.
45.
OPERATIONS BANK/ROW ACTIVATION
46.
tRCD and tRRD
Definition
47.
Read COMMAND
48.
READ BURST-REQUIRED
CAS LATENCIES
49.
CONSECUTIVE READ BURSTS
50.
NONCONSECUTIVE READ BURSTS
51.
RANDOM READ ACCESSES
52.
TERMINATING A READ
BURST
53.
READ TO WRITE
54.
READ TO PRECHARGE
55.
WRITE COMMAND
56.
MAX&MIN DQSS
57.
Nom., Min., and
Max tDQSS
58.
WRITE TO WRITE
-- Max tDQSS
59.
WRITE TO WRITE
-- Max tDQSS, NON CONSECUTIVE
60.
RANDOM WRITE
CYCLES -- Max tDQSS
61.
WRITE TO READ
-- Max tDQSS, NON--INTERRUPTING
62.
WRITE TO READ
-- Max tDQSS, INTERRUPTING
63.
WRITE TO READ
-- Max tDQSS, ODD NUMBER OF DATA,INTERRUPTING
64.
WRITE TO PRECHARGE
-- Max tDQSS, NON--INTERRUPTING
65.
WRITE TO PRECHARGE
-- Max tDQSS, INTERRUPTING
66.
WRITE TO PRECHARGE
-- Max tDQSS,ODD NUMBER OF DATA, INTERRUPTING
67.
PRECHARGE COMMAND
68.
POWER--DOWN
69.
BANK READ ACCESS
70.
WRITE -- DM
OPERATION
Notes de l'éditeur
TSOP2 封裝
BGA 封裝
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