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Bus
Industry Standard Architecture
(ISA)
Connector Bus
Industry Standard Architecture
Five 16-bit and one 8-bit ISA slots on a motherboard
Year created 1981
Created by IBM
Superseded by PCI (1993)
Width in bits 8 or 16
Number of devices Up to 6 devices
Style Parallel
Hotplugging interface no
External interface no
ISA
A computer bus standard for IBM PC compatible
computers introduced with the IBM Personal
Computer to support its Intel 8088 microprocessor’s
8-bit external data bus and extended to 16 bits
ISA - Definition
1981 - Developed by Mark Dean and his team as part of the
IBM PC project. Originated as an 8-bit system.
1984 - IBM AT bus - newer 16-bit standard
1988 - 32-bit EISA standard; renamed the AT bus to “ISA”;
Gang of Nine
IBM designed the 8-bit version as a buffered interface to
the external bus of the Intel 8088 (16/8 bit) CPU used in
the original IBM PC and PC/XT, and the 16-bit version as an
upgrade for the external bus of the Intel 80286 CPU used
in the IBM AT.
ISA – Brief History
Still used today for industrial purposes
was the basis for development of the ATA interface, used
for ATA(aka IDE) and more recently Serial ATA(SATA) hard
disks
Before the 16-bit ATA/IDE interface, there was an 8-but XT-
IDE(XTA) interface for hard drives
A derivation of ATA was the PCMCIA(Personal Computer
Memory Card International Association) specification,
mainly used by LAN cards for laptop computers
ISA – Goals of this BUS
Peripheral Component
Interconnect (PCI)
Connector Bus
PCI Local Bus
Three 5-volt 32-bit PCI expansion slots on a motherboard (PC bracket on left side)
(Picture on the last slide)
Year created July 1993
Created by Intel
Supersedes ISA, EISA, MCA, VLB
Superseded by PCI Express (2004)
Width in bits 32 or 64
Capacity 133 MB/s (32-bit at 33 MHz)
266 MB/s (32-bit at 66 MHz or 64-bit at
33 MHz)
533 MB/s (64-bit at 66 MHz)
Style Parallel
Hotplugging interface Optional
Peripheral Component Interconnect
A computer BUS for attaching hardware devices in a computer.
Can either take the form of an IC fitted onto the motherboard
itself, called a planar device in the PCI specification or an
expansion card that fits into a slot.
first implemented in IBM PC compatible, where it displaced the
combination of ISA plus one VESA Local Bus as the bus
configuration.
It has subsequently been adopted for other computer types.
PCI is being replaced by PCI-X and PCI Express, but as of 2011,
most motherboards are still made with one or more PCI slots,
which are sufficient for many uses.
PCI - Definition
Work began at Intel’s Architecture Development Lab
circa 1990.
The original PCI architecture team included, among
others:
PCI – Brief History
Dave Corson
Norm Rasmussen
Brad Hosler
Ed Solari
Bruce Young
Gary Solomon
Ali Oztaskin
Tom Sakoda
Rich Haslam
Jeff Rabe
Steve Fischer
PCI – Brief History
Spec Year Change Summary
PCI 1.0 1992 Original issue
PCI 2.0 1993
Incorporated connector and add-in card
specification
PCI 2.1 1995
Incorporated clarifications and added 66 MHz
chapter
PCI 2.2 1998 Incorporated ECNs, and improved readability
PCI 2.3 2002
Incorporated ECNs, errata, and deleted 5 volt only
keyed add-in cards
PCI 3.0 2002
Removed support for the 5.0 volt keyed system
board connector
separate memory and I/O port address spaces for 64
and 32-bit processors, respectively and are assigned
by software.
A third address space, called the PCI Configuration
Space, which uses a fixed addressing system, allows
software to determine the amount of memory and
I/O address space needed by each device.
PCI – System Design
Typical PCI cards used in PCs include:
PCI – Versions/Examples
Network cards
Sound cards
Modems
Extra ports such as USB
or serial
TV tuner cards
Disk controllers
Video cards
Universal Serial Bus
(USB)
Connector Bus
Universal Serial Bus
industry standard developed in the mid-1990s that
defines the cables, connectors and communications
protocols used in a bus for connection,
communication and power supply
between computers and electronic devices.
Developed by COMPAQ, DEC, IBM, Intel, Microsoft,
NEC and Nortel
Goal of the USB
Easy use of PC peripheral expansion
Full support for real-time data for voice and audio and
video
Protocol flexibility for isochronous data transfer and
asynchronous messaging
For quick diffusion into product
USB Implementers Forum, Inc.
formed to provide a support group and forum for the
advancement and adoption of USB technology
Headed by Hewlett-Packard Company, Intel Corporation, LSI
Corporation, Microsoft Corporation, NEC Corporation and
ST-Ericsson
USB 1.0 and 1.1
defined data transfer rates of 1.5 Mbit/s "Low Speed"
and 12 Mbit/s "Full Speed“
It was designed to replace the myriad of connectors
at the back of PCs and simplify software configuration
of communication devices.
The 1.1 specification was released in 1998 and was the
earliest revision to be widely adopted.
USB 2.0
April 2000 and was ratified by the USB Implementers
Forum (USB-IF) at the end of 2001
higher data transfer rate of 480 Mbit/s specification
expanded the range of external devices that could be
used on a computer.
offered backward compatibility with previous
generations.
USB 3.0
November 2008
increased the data transfer rate (up to 5 Gbit/s), to
decrease power consumption, to increase power
output, and to be backwards-compatible with USB
2.0.
includes a new, higher speed bus called SuperSpeed
in parallel with the USB 2.0 bus.
System design
Operates under a master/slave scheme.
Each peripheral talks to the host either directly or through a hub.
A physical USB device may consist of several logical
sub-devices that are referred to as device functions.
A single device may provide several functions. Such a
device is called a compound device in which each
logical device is assigned a distinctive address by the
host and all logical devices are connected to a built-in
hub to which the physical USB wire is connected.
A host assigns one and only one device address to a
function.
USB device communication is based on pipes (logical
channels).
A pipe is a connection from the host controller to a logical
entity, found on a device, and named an endpoint.
A USB device can have up to 32 endpoints: 16 into the host
controller and 16 out of the host controller.
The USB standard reserves one endpoint of each type,
leaving a theoretical maximum of 30 for normal use.
Types of Pipes
stream pipe is a uni-directional pipe connected to a
uni-directional endpoint that transfers data using
an isochronous, interrupt, or bulk transfer
message pipe is a bi-directional pipe connected to a
bi-directional endpoint that is exclusively used
for control data flow
Types of Data Transfer
isochronous transfers: transfers data at some guaranteed
data rate but with possible data loss (realtime audio or
video).
interrupt transfers: devices that need guaranteed quick
responses (bounded latency) (pointing devices and
keyboards).
bulk transfers: large sporadic transfers using all remaining
available bandwidth, but with no guarantees on bandwidth
or latency (file transfers).
control transfers: typically used for short, simple
commands to the device, and a status response, used.

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Bus

  • 1. Bus
  • 3. Industry Standard Architecture Five 16-bit and one 8-bit ISA slots on a motherboard Year created 1981 Created by IBM Superseded by PCI (1993) Width in bits 8 or 16 Number of devices Up to 6 devices Style Parallel Hotplugging interface no External interface no ISA
  • 4. A computer bus standard for IBM PC compatible computers introduced with the IBM Personal Computer to support its Intel 8088 microprocessor’s 8-bit external data bus and extended to 16 bits ISA - Definition
  • 5. 1981 - Developed by Mark Dean and his team as part of the IBM PC project. Originated as an 8-bit system. 1984 - IBM AT bus - newer 16-bit standard 1988 - 32-bit EISA standard; renamed the AT bus to “ISA”; Gang of Nine IBM designed the 8-bit version as a buffered interface to the external bus of the Intel 8088 (16/8 bit) CPU used in the original IBM PC and PC/XT, and the 16-bit version as an upgrade for the external bus of the Intel 80286 CPU used in the IBM AT. ISA – Brief History
  • 6. Still used today for industrial purposes was the basis for development of the ATA interface, used for ATA(aka IDE) and more recently Serial ATA(SATA) hard disks Before the 16-bit ATA/IDE interface, there was an 8-but XT- IDE(XTA) interface for hard drives A derivation of ATA was the PCMCIA(Personal Computer Memory Card International Association) specification, mainly used by LAN cards for laptop computers ISA – Goals of this BUS
  • 8. PCI Local Bus Three 5-volt 32-bit PCI expansion slots on a motherboard (PC bracket on left side) (Picture on the last slide) Year created July 1993 Created by Intel Supersedes ISA, EISA, MCA, VLB Superseded by PCI Express (2004) Width in bits 32 or 64 Capacity 133 MB/s (32-bit at 33 MHz) 266 MB/s (32-bit at 66 MHz or 64-bit at 33 MHz) 533 MB/s (64-bit at 66 MHz) Style Parallel Hotplugging interface Optional Peripheral Component Interconnect
  • 9. A computer BUS for attaching hardware devices in a computer. Can either take the form of an IC fitted onto the motherboard itself, called a planar device in the PCI specification or an expansion card that fits into a slot. first implemented in IBM PC compatible, where it displaced the combination of ISA plus one VESA Local Bus as the bus configuration. It has subsequently been adopted for other computer types. PCI is being replaced by PCI-X and PCI Express, but as of 2011, most motherboards are still made with one or more PCI slots, which are sufficient for many uses. PCI - Definition
  • 10. Work began at Intel’s Architecture Development Lab circa 1990. The original PCI architecture team included, among others: PCI – Brief History Dave Corson Norm Rasmussen Brad Hosler Ed Solari Bruce Young Gary Solomon Ali Oztaskin Tom Sakoda Rich Haslam Jeff Rabe Steve Fischer
  • 11. PCI – Brief History Spec Year Change Summary PCI 1.0 1992 Original issue PCI 2.0 1993 Incorporated connector and add-in card specification PCI 2.1 1995 Incorporated clarifications and added 66 MHz chapter PCI 2.2 1998 Incorporated ECNs, and improved readability PCI 2.3 2002 Incorporated ECNs, errata, and deleted 5 volt only keyed add-in cards PCI 3.0 2002 Removed support for the 5.0 volt keyed system board connector
  • 12. separate memory and I/O port address spaces for 64 and 32-bit processors, respectively and are assigned by software. A third address space, called the PCI Configuration Space, which uses a fixed addressing system, allows software to determine the amount of memory and I/O address space needed by each device. PCI – System Design
  • 13. Typical PCI cards used in PCs include: PCI – Versions/Examples Network cards Sound cards Modems Extra ports such as USB or serial TV tuner cards Disk controllers Video cards
  • 15. Universal Serial Bus industry standard developed in the mid-1990s that defines the cables, connectors and communications protocols used in a bus for connection, communication and power supply between computers and electronic devices. Developed by COMPAQ, DEC, IBM, Intel, Microsoft, NEC and Nortel
  • 16. Goal of the USB Easy use of PC peripheral expansion Full support for real-time data for voice and audio and video Protocol flexibility for isochronous data transfer and asynchronous messaging For quick diffusion into product
  • 17. USB Implementers Forum, Inc. formed to provide a support group and forum for the advancement and adoption of USB technology Headed by Hewlett-Packard Company, Intel Corporation, LSI Corporation, Microsoft Corporation, NEC Corporation and ST-Ericsson
  • 18. USB 1.0 and 1.1 defined data transfer rates of 1.5 Mbit/s "Low Speed" and 12 Mbit/s "Full Speed“ It was designed to replace the myriad of connectors at the back of PCs and simplify software configuration of communication devices. The 1.1 specification was released in 1998 and was the earliest revision to be widely adopted.
  • 19. USB 2.0 April 2000 and was ratified by the USB Implementers Forum (USB-IF) at the end of 2001 higher data transfer rate of 480 Mbit/s specification expanded the range of external devices that could be used on a computer. offered backward compatibility with previous generations.
  • 20. USB 3.0 November 2008 increased the data transfer rate (up to 5 Gbit/s), to decrease power consumption, to increase power output, and to be backwards-compatible with USB 2.0. includes a new, higher speed bus called SuperSpeed in parallel with the USB 2.0 bus.
  • 21. System design Operates under a master/slave scheme. Each peripheral talks to the host either directly or through a hub.
  • 22. A physical USB device may consist of several logical sub-devices that are referred to as device functions. A single device may provide several functions. Such a device is called a compound device in which each logical device is assigned a distinctive address by the host and all logical devices are connected to a built-in hub to which the physical USB wire is connected. A host assigns one and only one device address to a function.
  • 23. USB device communication is based on pipes (logical channels). A pipe is a connection from the host controller to a logical entity, found on a device, and named an endpoint. A USB device can have up to 32 endpoints: 16 into the host controller and 16 out of the host controller. The USB standard reserves one endpoint of each type, leaving a theoretical maximum of 30 for normal use.
  • 24. Types of Pipes stream pipe is a uni-directional pipe connected to a uni-directional endpoint that transfers data using an isochronous, interrupt, or bulk transfer message pipe is a bi-directional pipe connected to a bi-directional endpoint that is exclusively used for control data flow
  • 25. Types of Data Transfer isochronous transfers: transfers data at some guaranteed data rate but with possible data loss (realtime audio or video). interrupt transfers: devices that need guaranteed quick responses (bounded latency) (pointing devices and keyboards). bulk transfers: large sporadic transfers using all remaining available bandwidth, but with no guarantees on bandwidth or latency (file transfers). control transfers: typically used for short, simple commands to the device, and a status response, used.

Notes de l'éditeur

  1. The design architecture of USB is asymmetrical in its topology, consisting of a host, a multitude of downstream USB ports, and multiple peripheral devices connected in a tiered-star topology.  Additional USB hubs may be included in the tiers, allowing branching into a tree structure with up to five tier levels. A USB host may implement multiple host controllers and each host controller may provide one or more USB ports. Up to 127 devices, including hub devices if present, may be connected to a single host controller.USB devices are linked in series through hubs. One hub is known as the root hub which is built into the host controller.
  2.  for example, a webcam with a built-in microphone (audio device function)