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HUAWEI TECHNOLOGIES CO., LTD.
www.huawei.com
Coherent SDN Forwarding Plane Programming
Haoyu Song, Jun Gong, Hongfei Chen
Huawei Technologies, USA
HUAWEI TECHNOLOGIES CO., LTD. Page 1
Applications
Programming
Environments
Standard/OF2.0
Protocol Oblivious Forwarding
• Evolve SDN toward fully-programmable networks and support network application innovation
• Simplified & future-proof Forwarding Elements with open & fully-programmable interface
• Data path programming with generic instructions to support any protocol and stateful service
Heterogeneous
Systems
POF Optimized
Silicon
POFEcosystem
HUAWEI TECHNOLOGIES CO., LTD. Page 2
Programming Framework Architecture
OpenFlow 2.0
High Level
Language
Platform
Independent
Compiler
GUI/CLI Lib/TTP
APP
Conventional
ASIC
SDN ASIC CPU NPU
Platform
Specific
Compiler
Platform
Specific
Compiler
Platform
Specific
Compiler
Platform
Specific
Compiler
APP
APP
Platform
Optimized Lib
customized
interactive
standard
interpret
interpret
Nativeexec
HUAWEI TECHNOLOGIES CO., LTD. Page 3
OpenFlow 2.0 Interface as Thin Waist
• Support protocol-oblivious forwarding plane
• Agnostic to forwarding element architectures
• Support coarse-grained and fine-grained programming
• An intermediate platform-independent instruction set
• Packet/Metadata Editing: set field, add field, delete field, math/logic operations on field
• Flow Metadata Manipulation: read, write
• Algorithm/Function Procedure: checksum, fragmentation, etc.
• Table Access: go to table (non return), search table (return to calling instruction)
• Output: physical/virtual/logic port, sampling/data path generated packets
• Jump/Branching: conditional and unconditional, absolute and relative
• Active Data Path: insert/delete/modify flow entry, insert/delete flow table
HUAWEI TECHNOLOGIES CO., LTD. Page 4
Instruction
BlockInstruction
Block
Abstract OF2.0 Flow Entry
Match Key Parameter
Instruction
Block ID
Instruction
Block
Flow
Metadata
Pool
Counter Pool Meter Pool
•Decouple key and instruction
•Parameterize flow entry
•Shared resource pool
•FE mapping done by HAL
•Flexibility and Efficiency
HUAWEI TECHNOLOGIES CO., LTD. Page 5
Three Programming Approaches
customized
High level
language
Platform
Independent
Compiler
OF2.0
interactive
GUI/CLI
OF2.0
standard
OF2.0
Library/TTP
HUAWEI TECHNOLOGIES CO., LTD. Page 6
Four Different Target Platforms
CPU
NPU
ASIC
SDN-specific
IC
Performance
Flexibility
HUAWEI TECHNOLOGIES CO., LTD. Page 7
Design Path We Have Explored
OpenFlow 2.0
High Level
Language
Platform
Independent
Compiler
GUI/CLI Lib/TTP
APP
Conventional
ASIC
SDN ASIC CPU NPU
Platform
Specific
Compiler
Platform
Specific
Compiler
Platform
Specific
Compiler
Platform
Specific
Compiler
APP
APP
Platform
Optimized Lib
customized
interactive
standard
interpret
interpret
Nativeexec
HUAWEI TECHNOLOGIES CO., LTD. Page 8
FE Compiling vs. Interpreting
 Intermediate OF instruction = API
 Each OF instruction = a piece of
microcode
 Simple but not efficient
 Field parsing & key construction
 Large microcode instruction count
 Large number of thread switches
 Large flow table entry size
Interpreter Mode
 Instructions blocks are directly
compiled into microcode
 Complex but efficient
 Direct register reference
 Take advantage of entry parameters
 Small microcode instruction count
 Small number of thread switches
 Small flow table entry size
Compiler Mode
HUAWEI TECHNOLOGIES CO., LTD. Page 9
NPU Case Study
 Platform
 Huawei NE40E/5000E Router Platform
 40G NPU in Run-To-Completion (RTC) mode
 High level language
 C language
Basic IPv4 ForwardingGo-to-Table Instruction comparison
•The Compiler Mode has 2x performance advantage over the Interpreter Mode
and has the similar performance as the non-SDN implementation
HUAWEI TECHNOLOGIES CO., LTD. Page 10
 Problem
 Diversified FEs will coexist for SDN
 Unified SDN programming is needed
 Our contributions
 Propose a unified programming framework centered on OpenFlow 2.0
 Explored the design path for NPU-based FEs
 Compare the compiler-mode and interpreter-mode implementations
 Other findings
 Compiler mode is superior to interpreter mode
 Prefer SDN-chips which can execute OF instruction natively
 Future work
 Complete other design paths
Conclusions
Thank you
www.huawei.com
Copyright©2014 Huawei Technologies Co., Ltd. All Rights Reserved.
The information in this document may contain predictive statements including, without limitation, statements regarding the future financial and
operating results, future product portfolio, new technology, etc. There are a number of factors that could cause actual results and developments
to differ materially from those expressed or implied in the predictive statements. Therefore, such information is provided for reference purpose
only and constitutes neither an offer nor an acceptance. Huawei may change the information at any time without notice.

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Huawei's Coherent SDN Forwarding Plane Programming

  • 1.
  • 2.
  • 3. HUAWEI TECHNOLOGIES CO., LTD. www.huawei.com Coherent SDN Forwarding Plane Programming Haoyu Song, Jun Gong, Hongfei Chen Huawei Technologies, USA
  • 4. HUAWEI TECHNOLOGIES CO., LTD. Page 1 Applications Programming Environments Standard/OF2.0 Protocol Oblivious Forwarding • Evolve SDN toward fully-programmable networks and support network application innovation • Simplified & future-proof Forwarding Elements with open & fully-programmable interface • Data path programming with generic instructions to support any protocol and stateful service Heterogeneous Systems POF Optimized Silicon POFEcosystem
  • 5. HUAWEI TECHNOLOGIES CO., LTD. Page 2 Programming Framework Architecture OpenFlow 2.0 High Level Language Platform Independent Compiler GUI/CLI Lib/TTP APP Conventional ASIC SDN ASIC CPU NPU Platform Specific Compiler Platform Specific Compiler Platform Specific Compiler Platform Specific Compiler APP APP Platform Optimized Lib customized interactive standard interpret interpret Nativeexec
  • 6. HUAWEI TECHNOLOGIES CO., LTD. Page 3 OpenFlow 2.0 Interface as Thin Waist • Support protocol-oblivious forwarding plane • Agnostic to forwarding element architectures • Support coarse-grained and fine-grained programming • An intermediate platform-independent instruction set • Packet/Metadata Editing: set field, add field, delete field, math/logic operations on field • Flow Metadata Manipulation: read, write • Algorithm/Function Procedure: checksum, fragmentation, etc. • Table Access: go to table (non return), search table (return to calling instruction) • Output: physical/virtual/logic port, sampling/data path generated packets • Jump/Branching: conditional and unconditional, absolute and relative • Active Data Path: insert/delete/modify flow entry, insert/delete flow table
  • 7. HUAWEI TECHNOLOGIES CO., LTD. Page 4 Instruction BlockInstruction Block Abstract OF2.0 Flow Entry Match Key Parameter Instruction Block ID Instruction Block Flow Metadata Pool Counter Pool Meter Pool •Decouple key and instruction •Parameterize flow entry •Shared resource pool •FE mapping done by HAL •Flexibility and Efficiency
  • 8. HUAWEI TECHNOLOGIES CO., LTD. Page 5 Three Programming Approaches customized High level language Platform Independent Compiler OF2.0 interactive GUI/CLI OF2.0 standard OF2.0 Library/TTP
  • 9. HUAWEI TECHNOLOGIES CO., LTD. Page 6 Four Different Target Platforms CPU NPU ASIC SDN-specific IC Performance Flexibility
  • 10. HUAWEI TECHNOLOGIES CO., LTD. Page 7 Design Path We Have Explored OpenFlow 2.0 High Level Language Platform Independent Compiler GUI/CLI Lib/TTP APP Conventional ASIC SDN ASIC CPU NPU Platform Specific Compiler Platform Specific Compiler Platform Specific Compiler Platform Specific Compiler APP APP Platform Optimized Lib customized interactive standard interpret interpret Nativeexec
  • 11. HUAWEI TECHNOLOGIES CO., LTD. Page 8 FE Compiling vs. Interpreting  Intermediate OF instruction = API  Each OF instruction = a piece of microcode  Simple but not efficient  Field parsing & key construction  Large microcode instruction count  Large number of thread switches  Large flow table entry size Interpreter Mode  Instructions blocks are directly compiled into microcode  Complex but efficient  Direct register reference  Take advantage of entry parameters  Small microcode instruction count  Small number of thread switches  Small flow table entry size Compiler Mode
  • 12. HUAWEI TECHNOLOGIES CO., LTD. Page 9 NPU Case Study  Platform  Huawei NE40E/5000E Router Platform  40G NPU in Run-To-Completion (RTC) mode  High level language  C language Basic IPv4 ForwardingGo-to-Table Instruction comparison •The Compiler Mode has 2x performance advantage over the Interpreter Mode and has the similar performance as the non-SDN implementation
  • 13. HUAWEI TECHNOLOGIES CO., LTD. Page 10  Problem  Diversified FEs will coexist for SDN  Unified SDN programming is needed  Our contributions  Propose a unified programming framework centered on OpenFlow 2.0  Explored the design path for NPU-based FEs  Compare the compiler-mode and interpreter-mode implementations  Other findings  Compiler mode is superior to interpreter mode  Prefer SDN-chips which can execute OF instruction natively  Future work  Complete other design paths Conclusions
  • 14. Thank you www.huawei.com Copyright©2014 Huawei Technologies Co., Ltd. All Rights Reserved. The information in this document may contain predictive statements including, without limitation, statements regarding the future financial and operating results, future product portfolio, new technology, etc. There are a number of factors that could cause actual results and developments to differ materially from those expressed or implied in the predictive statements. Therefore, such information is provided for reference purpose only and constitutes neither an offer nor an acceptance. Huawei may change the information at any time without notice.