3. oEach entry also has a Diagramwhich memory cache
tag, of a CPU
specifies the identity of the datum in
the backing store of which the entry is
a copy.
oWhen the cache client needs to
access a datum presumed to exist in
the backing store, it first checks the
cache.
oIf an entry can be found with a tag
matching that of the desired datum,
the datum in the entry is used
instead.
cache
oThe percentage of accesses that Diagram of a CPU memory
result in cache hits is known as cache memory cache
the hit rate or hit ratio of the cache.
percentage of accesses that result in cache hits is known as the hit rate or hit ratio of the cache.

4. When a system writes a datum to cache, it must at some
point write that datum to backing store as well. The
timing of this write is controlled by what is known as
the write policy.
There are two basic writing approaches:
 Write-through - Write is done synchronously both to
the cache and to the backing store.
 Write-back- Writing is done only to the cache. A
modified cache block is written back to the store, just
before it is replaced.

9. More expensive
Consumes more power
Low density