DC GRID presentation

1. CIGRE DC Grid Test System
Description, justifications and simulation results
J A Jardini - S Dennetière - J C Garcia Alonso
jose.jardini@gmail.com
sebastien.dennetiere@rte-france.com
jcgzipa@mhi.ca
Workshop on DC Grid Modeling
Paris, August 27th , 2014
B4-57 Guide for the Development of Models for HVDC
Converters in a HVDC Grid

2. 1 – Description and justifications

3. CIGRE DC Grid Test System
Developed by Members of the B4-57 and B4-58 Working Groups
• B4-58 K Linden (convener)
T K Vrana
Y Yang
D Jovcic
• B4-57 R Wachal ( convener)
S Dennetière
J Jardini
H Saad

4. Objective
To define a system to be used in all DC
Grid groups discussions.
Like the CIGRE LCC system benchmark
IEEE n busses system for specific themes

5. DC Grid Test System Basic Configuration

6. Cd-E1
Cb-C2
Ba-A0
Ba-B0
Cb-D1
DC Sym. Monopole
DC Bipole
AC Onshore
AC Offshore
Cable
Overhead line
AC-DC Converter
Station
DC-DC Converter
Station
DCS1
200
200
200
50
300
200
200
400
500
200
300
200200
200
200
200
100
200
100
200
DCS2
DCS3
Ba-A1
Bm-A1
Bb-A1
Cm-A1
Cb-A1
Bb-C2
Bo-C2
Bo-C1
Bm-C1
Cm-C1
Bb-D1
Bb-E1
Bb-B4
Bb-B2
Bb-B1
Bb-B1x
Bm-B2
Bm-B3 Bm-B5 Bm-F1
Bm-E1
Cm-B2
Cm-B3
Cm-E1
Cm-F1
Bo-D1
Bo-E1
Bo-F1
Cd-B1
Cb-B2
Cb-B1
Ba-B1
Ba-B2
Ba-B3
CIGRE B4 DC Grid Test System

7. The complete system is composed of:
• 2 onshore AC systems
System A (A0 and A1)
System B (B0, B1, B2 and B3)
• 4 offshore AC systems
System C (C1 and C2)
System D (D1)
System E (E1) offshore load
System F (F1)
• 2 DC nodes, with no connection to AC
B4
B5
• 3 VSC-DC systems
DCS1 (A1 and C1)
DCS2 (B2, B3, B5, F1 and E1)
DCS3 (A1, C2, D1, E1, B1, B4 and B2)

9. • AC onshore system 380kV
• AC offshore system 145kV
• DC symmetrical monopole ± 200kV
• DC bipole ± 400kV
• Converter MMC (half-bridge)
• Chosen from the beginning (existing EU AC voltage and possible DC voltages)
Are these choices reasonable?

10. Economics (Brochure 388)
Lines
Cline = a + b V + S (c N + d) U$/km
a; b; c; d parameters obtained from a set of configurations
V →pole to ground voltage (kV)
S = N S1 → total conductor aluminium cross section (MCM);
S1 being one conductor aluminium (only)cross section,
S(MCM)= (1/0.5067)* S(mm2 Aluminium)
N→ number of conductor per pole.
Losses
P → rated bipole power MW
r→ bundle resistance ohms/km r = ro L / S
ro → conductor resistivity 58 ohms MCM/ km
L →the line length in km
cost of Joule losses (CLj) in one year will be:
Line cost in one year
Clyr= F*Cline*km= A+B S
Line plus losses
A+B S+ C/S minimun cost
kmMW
V
P
rLj /
2
1
2







 
S
C
LjlfCeCpCLj  8760
B
C
Sec 

11. a b c d
DC overhead (US$ and MCM) 86,360 130.28 1.5863 25.92
AC overhead (US$ and MCM) 78,252 251.64 1.3904 34.32
DC cable (€ and mm2) 1,304, 500 754.4 260 NA
Line cost parameters
Converter cost
)(*)(* CB
PVACcv 
With participation of manufacturers (TB 388)

12. Overhead DC
Cable DC
3192
2847
2903
2827
1583
1353
1251
1078
2328
0
200
400
600
800
1000
1200
1000 1500 2000 2500 3000 3500 4000
Custo(106R$/ano)
Potência (MW)
teste
500 kV 765 kV 1000 kV
2000 km
500 km
1000 km
1500 km
2500 km
1000 kV
765 kV
500 kV
Overhead AC

13. Configuration MW
Overhead DC ±400kV 2X2515MCM 1000
Overhead DC ±200kV 2X2156MCM 600
Overhead AC 380kV 2X1510,5 MCM 650
Cable DC ±400kV1800 mm2 2000
Cable DC ±200kV1800 mm2 1200
Results
from the base case load-flow :
AC lines loading 100; 200;and 300MW (length are 200km)
±400 kV DC overhead loading varies 800; and 1000MW (200; 300; 400 and 500km)
±200kV loading 700MW (length is 100 km).
±400 kV submarine cables loading 600 to 900MW (200; 300km);
±200 kV submarine cables varies from 400; 700MW (100; 200km)

14. Overhead
Cable DC
Current carrying capability
Verified under N-1 contingency
Conductor Current Carrying Capability
0
500
1,000
1,500
2,000
2,500
0 500 1,000 1,500 2,000 2,500 3,000
Conductor Cross Section (MCM)
Current(A)
90º
70º
60º
50º
Submarine kA moderate climate includes
0
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
3200
3400
0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 3200 3400
mm2
kA
kA moderate climate

15. Scable
Core (Copper)
Dcore, ρcore
Insulation 1
r1, tan1
Insulation 2
r2, tan2
Sheath
(Lead)
Rin, Rext, sh
Armor (Steel)
R'in, R'ext, 'arm
Insulation 3
r3, tan3
1800 mm²
400 kV DC
1800 mm²
200 kV DC
Cross section of
conductor (mm²)
1800 1800
Dcore (mm) 50.25 50.25
ρcore (Ωm) 2.2 x10-08 2.2 x10-08
r1 2.3 2.3
tan1 / G (Ω-1/km) 0.0004 / 4.8 x10-08 0.0004 / 5.5 x10-08
Rin (mm) 49.125 45.125
Rext (mm) 52.125 47.125
sh(Ωm) 27.4x10-8 27.4x10-8
r2 2.3 2.3
tan2 / G (Ω-1/km) 0.001 / 1.1 x10-06 0.001 / 1.3 x10-06
R'in (mm) 56.125 50.225
R'ext (mm) 61.725 55.725
'arm(Ωm) 18.15x10-8 18.15x10-8
r3 2.3 2.3
tan3 0.001 0.001
Scable (mm) 133.45 121.45
Depth from ground
surface(m)
1.5 1.5
DC cables

16. 30 m
sag : 20 m
Soil resistivity : 500 Ω.m
9 m
10 m
37 m
sag : 14 m
45 cm Conductor DC resistance (Ω/km) Outside diameter (cm)
2515 MCM 0.0224 4.775
3/8" EHS (shield wire) 3.65 0.954
24 m
sag : 16 m
Soil resistivity : 500 Ω.m
5 m
5.5 m
28.8 m
sag : 11.5 m
40 cm
Conductor DC resistance @ 20°C (Ω/km) Outside diameter (cm)
2156 MCM 0.0266 4.475
3/8" EHS (shield wire) 3.65 0.954
DC overhead lines
+/- 400kV
+/- 200kV

17. 30 m
sag : 20 m
Soil resistivity : 500 Ω.m
14 m
10 m
37 m
sag : 14 m45 cm
Conductor DC resistance one cond (Ω/km) Outside diameter (cm)
1515,5 MCM Parrot 0.038 3.825
3/8" EHS (shield wire) 3.65 0.954
AC overhead lines

18. Converters
+200kV
-200 kV
SM
1
SM
2
SM
n
SM
1
SM
2
SM
n
SM
1
SM
2
SM
n
SM
1
SM
2
SM
n
SM
1
SM
2
SM
n
SM
1
SM
2
SM
n
3
2
6
4
5
6
2
3
4
5
Start-up insertion resistors
Star point reactor (Symetrical monopole configuration only)
Arm reactor
Valve
Converter transformer
1
1 Submodule
S1
S2
C
AC
VSC-MMC
+200 kV DC
-200 kV DC
220 kV AC
380 kV AC or
145 kV AC
AC
VSC-MMC
VSC-MMC
Ground return
cable or line
DC cable
or line
380 kV AC or
145 kV AC
220 kV AC
DC cable
or line
+400 kV DC
-400 kV DC
201 levels MMC converters
Bipole configuration
Monopole configuration

19. Test system controls
Control hierarchy:
• Dispatch controls: (system requirements)  (P, Vdc, Vac, Q, etc., orders)
• Upper level controls: (P, Vdc, etc. orders)  (Vabc order)
• Lower level controls: (Vabc order)  (Firing pulses)
VSC MMC
measurements
Upper level controls
Power
factor
control
or V/f
control
or
Outer
Control
P/Q/Vdc
Inner
Current
Control
Circulating current
suppression
Modulation
Capacitors Voltage
Balancing
Vref abc
Vref low, Vref up
NSM_low_abc,NSM_up_abc
Gate signals
Note: The test systems
do not include Dispatch
control

20. Upper level control: Grid connected
Clark
transformation
Signal Calculations Outer Control
Inner Control
dq transformations
Vαβ prim
Iαβ sec
VDC
Pmeas
Qmeas
Vmeas_prim
Id_ref
Iq_ref
Vd
Vq
Id
Iq
Vabc_ref
PLL
Oscillator
V/f control
q
q
Islanded
control
Non
islanded
control
Non
islanded
control
Islanded
control
PU conversion
Vabc_prim
Iabc_prim
Vabc_sec
Iabc_sec
Vdc
Low pass filter
#1
Limitations and
dq>abc
transformation
Vd ref
Vq ref
VDC
q
Iαβ prim
VAC_ref
Pref Qref Vdc_refVac_ref
Idc
Protections
Vabc_prim
Idc
Block_converter
Open_AC_CB
Iq
Low pass filter #3
• Per-unitization of measured values and orders
• Filtering of measured quantities
• abc  dq transformation
• Outer controls: (P, Vdc, Q, Vac, etc.)  (Id ref, Iq ref)
• Current limitation: (Id ref, Iq ref)  (Id ref & Iq ref limited)
• Inner control - current control : (Id ref, Iq ref)  (Vd ref, Vq ref)
• dq  abc transformation: (Vd ref, Vq ref)  (Va,b,c ref)
Clark
transformation
Low
pass
filter #1
PU
conversion
Low pass filter #3
Outer
Control
Signal
Calculations
abc  dq
transformation
Inner
Control
Limitations and
dq abc
transformation
PLL

21. Upper level control: Outer control
Idq REF
limiter
Id REF
Iq REF
Id REF in
Iq REF in
PIVdc REF
Vdc REF
P  Id
Q  Iq
0
Vdc cont.
No P cont. P cont.
P/V cont.
Q cont.
+
-
Vac
Vdc
PREF
PREF
Vdc
0
PI
P REF
+
-
+
Droop
∆P
VdcREF
Vdc
No PV droop
Cont.
PV droop
Cont.
P cont. Vac/f cont.
P
PI+
-
Q
Q REF
PI+
-
Vac
Vac REF
Vac cont.

22. Upper level control: Inner control
Id_ref
Iq_ref
Vd
+
-
Id
w0(Ltfos+Larm/2)
w0(Ltfos+Larm/2)
Iq
-
+
+
+-
-
-
+
Vcd
Vcq
Vq
PI
u
I_kp
I_kiI_ki
I_kp
PI
u
I_kp
I_kiI_ki
I_kp
Low pass
filter #4
Low pass
filter #4

23. Upper level control: Islanded operation
Clark
transformation
Signal Calculations Outer Control
Inner Control
dq transformations
Vαβ prim
Iαβ sec
VDC
Pmeas
Qmeas
Vmeas_prim
Id_ref
Iq_ref
Vd
Vq
Id
Iq
Vabc_ref
PLL
Oscillator
V/f control
q
q
Islanded
control
Non
islanded
control
Non
islanded
control
Islanded
control
PU conversion
Vabc_prim
Iabc_prim
Vabc_sec
Iabc_sec
Vdc
Low pass filter
#1
Limitations and
dq>abc
transformation
Vd ref
Vq ref
VDC
q
Iαβ prim
VAC_ref
Pref Qref Vdc_refVac_ref
Idc
Protections
Vabc_prim
Idc
Block_converter
Open_AC_CB
Iq
Low pass filter #3
Upper Level control (Islanded operation)
Per-unitization of measured and orders & filtering
Frequency control (oscillator): θ
V/f control: (V ref, θ)  (Va,b,c ref)
Oscillator
V/f control
PU
conversion
Low pass
filter #1 Clark
transformation
abc  dq
transformation
Signal
Calculations

24. Upper level control: Protections
Two protection options were included
Event Detection criteria Action
3ph faults 3ph voltage collapse • Block converter
DC faults DC overcurrent • Block converter
• Open AC brk
Idc ABS
>
Iarm_limit
ac_BRK_delay
Block_MMC_delay1 Block_converter
Open_AC_CB
Vabc_prim - a
ABS
>
Vac_limit
20 ms delay on
falling edge
Block_converter
Vabc_prim - c
Vabc_prim - b MAX
3ph fault protection
DC fault protection
(0.1 pu)
(40ms)
(40µs)
(6 kA)

25. Sample control data
Vdc_min -1.2 Q_ki 33.00
Vdc_max 1.2 Q_kp 0
Vdc_ki 272.00 I_ki 149.00
Vdc_kp 8.00 I_kp 0.48
Vdc_min_db 0.95 Vf_kp 0.2
Vdc_max_db 1.05 Vf_ki 30.00
Vdc_kp_db 10.00 Vf_kd 0.0025
P_min -1.2 Vmax 1.23
P_max 1.2 Vmin -0.1
P_ki 33.00 kdroop 0.2
P_kp 0 Uf_meas_min 0.01
Q_min -0.5 I_lim 1.1
Q_max 0.5 Id_lim 1.1
Idc_limit (kA) 6 Iq_lim 1.1
ac_BRK_dela
y 0.04 Vac_ki 30
Block_MMC_
delay1 40*10-6s Vac_kp 0
Vac_limit 0.1 Vac_min -0.5
Block_MMC_
delay2 0.02s Vac_max 0.5
Controller parameters
Droop parameters
AC-DC
Converter
Station
Control
Mode
VAC droop
[pu ;
MVAr/kV]
VDC droop
[pu ; MW/kV]
Cm-B2 Q(VAC) P(VDC) 10 ; 21.053 10 ; 40
Cm-B3 Q(VAC) P(VDC) 10 ; 31.579 10 ; 60
Cm-E1 AC Slack - -
Cm-F1 AC Slack - -

26. 2 – Implementation in EMT tools

27. Cm-C1Cm-A1
Bm-A1 Bm-C1
Ba-A1
B0-C1
Event 1 : 200ms 3-phase fault on side A1
Event 2 : 200ms 3-phase fault on side C1
Event 3 : Permanent pole-to-pole fault on side A1
Cm-E1
DC Overhead
DC Cable
Cm-F1Cm-B3
Bm-B5
Cm-B2
Bm-B3 Bm-F1
Bm-E1
Ba-B3
Ba-B2
B0-E1
Cm-F1
Event 1: 200ms 3-phase fault on side Ba-B3
Event 2: Permanent trip of Cm-F1
Event 3: Permanent pole-to-pole DC fault at Bm-F1
Event 1 : Permanent trip of Cb-A1 (2 poles).
Event 2 : Pole-to-pole fault at Cb-B1 terminals
Test systems
Test system 1
Test system 3
Test system 3

28. Challenges to simulate the tests systems in EMT tools
Data
16 converters (ex. DC-DC converters)
16 control systems including low level controls
23 frequency dependent line/cable models
total number of electrical nodes with full detailed converter models : ~40,000 nodes
Validation
First step : in EMTP-RV to simulate the test system and get relevant set of data
Second step : in PSCAD and HYPERSIM to validate consistency and completeness of data
proposed in the brochure
 The 3 test systems have been developed in EMTP-RV, PSCAD and
HYPERSIM and give close results

29. 3 – Simulation results

30. Events Time (ms)
AC fault 0
Cm-A1 blocking due to low AC voltage 19.08
Cm-C1 deadband activation 21.38
AC fault elimination 200
Cm-A1 deblocking 233.02
Cm-C1 deadband de-activation 295.04
Test system 1
Pole-to-pole DC voltage at converter Cm-A1 and Cm-C1 DC current at converter terminals
Active & Reactive power transformer Cm-A1 3-phase instantaneous currents
Cm-C1Cm-A1
Bm-A1 Bm-C1
Ba-A1
B0-C1

31. CIGRE DC grid full test system
DC cable
AC cable
DC line
AC line
MMC converter
Symetrical monopole
MMC converter
Bipolar configuration
DCDC converter
A0
A1 C1
C2
D1
E1
F1
B5
B3
B2
B1
B0

32. Models used in the test system
DC cable
AC cable
DC line
AC line
Frequency dependent line/cable models
MMC converter Detailed model with low level controls
DCDC converter Ideal transformer with no impedance
AC equivalent Voltage source + RL impedance
Load RL impedance

33. VSC converters models
Type 2 Type 3/4 Type 5 Type 6
D
S
G
+
Model1 Model2 Model3 Model4
Capacitor voltage balancing &
circulating current suppression
Circulating current suppression No low level controls

34. A0
A1 C1
C2
D1
E1
F1
B5
B3
B2
B1
B0
Transient test case – loss of converter A1
Cb-A1 is tripped at t=1.5s
Vdc P
PVdc
P
V/f
PP/Vdc
Vdc
P/Vdc
This converter initially controls the DC
voltage.
After tripping, the DC voltage in DCS3
area is only controlled through P/Vdc
droop controls.
P/Vdc

35. Transient test case – loss of converter A1
Simulation results
Active power flow
Pole-to-pole DC voltage (+/-400 kV Grid)
Pole-to-pole DC voltage (+/-200 kV Grid)

36. Transient test case – loss of converter A1
Voltage at Bb-B1
Superimposition with models 1-2-3

37. Transient test case – loss of converter A1
Voltage at Bb-C2
Superimposition with models 1-2-3

38. Time domain simulations
Model Number of electrical nodes Computing times (s)
1 39 294 32 586 (~ 9h)
2 990 1450 (~ 24 min)
3 990 404 (~ 7 min)
Simulation for 3s and a time-step of 20us
(standard laptop, simulation running only on 1 CPU)

39. A0
A1 C1
C2
D1
E1
F1
B5
B3
B2
B1
B0
Transient test case – DC fault
Vdc P
PVdc
P
V/f
PP/Vdc
Vdc
P/Vdc
P/Vdc
Pole-to-pole fault
Fault detected in 2ms
Eliminated with DC CB 3ms later
DC-DC converters do not limit fault current

40. Transient test case – DC Fault
Events Time (ms)
DC fault 0
Cb-B1 blocking due to DC
overcurrent
0.44
Cb-A1 blocking due to DC
overcurrent
2.12
Cb-D1 blocking due to DC
overcurrent
3.04
Cm-F1 deadband activation 3.20
Cb-F1 blocking due to DC
overcurrent
3.48
Cb-B2 blocking due to DC
overcurrent
5.12
Cm-E1 blocking due to DC
overcurrent
8.36
Protections activation
A0
A1 C1
C2
D1
E1
F1
B5
B3
B2
B1
B0

41. Transient test case – DC fault
+/-200 kV system voltage
Simulation results
+/-400 kV system voltage
Active Power flow

42. Transient test case – DC fault
Voltage at Bb-A1
Superimposition with models 1-2-3

43. Validation of DC test grid data
Objective:
• Check consistency of data provided in the report
• Check reproducibility of results provided
• Check for completeness of data
Data validity test:
• Construction of the three test systems 2, 4 & terminal based entirely on data
provided in the report
• Comparison of results with previously built system
Results:
• Some data descriptions were enhanced
• Simulation results were very similar between different builds of the test system
• EMTP-RV, PSCAD, HYPERSIM & RSCAD

44. Conclusions
The test results have been reproduced in several commercially available EMT
simulation software (EMTP-RV, PSCAD, RSCAD and HYPERSIM)
Computation times are reasonable for time domain simulations
Type5 models gives accurate results on this test system. This conclusion may be
different with specific Capacitor Voltage Control
All simulation packages give coherent results, even if small differences remain.
The test results presented in the brochure are meant as guidelines only.

45. Thank you very much
for your attention