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Multiprocessor/Multicore Systems Scheduling, Synchronization
Multiprocessors ,[object Object]
Multiprocessor/Multicore Hardware (ex.1) ,[object Object]
Multiprocessor/Multicore  Hardware (ex.2)  UMA (uniform memory access)  ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Multiprocessor/Multicore Hardware (ex.3)  NUMA (non-uniform memory access)  ,[object Object],[object Object],[object Object],[object Object],[object Object]
Cache-coherence
Cache coherence (cont)  ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
On multicores Reason for multicores : physical limitations can cause significant  heat dissipation  and  data synchronization  problems  In addition to operating system (OS) support, adjustments to existing software are required to maximize utilization of the computing resources provided by multi-core processors. Virtual machine approach again in focus . Intel Core 2 dual core processor, with CPU-local Level 1 caches+ shared, on-die Level 2 cache.
On multicores (cont) ,[object Object]
OS Design issues (1): Who executes the OS/scheduler(s)? ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Master-Slave multiprocessor OS Bus
Non-symmetric Peer Multiprocessor OS  ,[object Object],Bus
Symmetric Peer Multiprocessor OS  ,[object Object],[object Object],Bus
Scheduling in Multiprocessors ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Design issues 2:  Assignment of Processes to Processors ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Multiprocessor Scheduling: per partition RQ ,[object Object],[object Object]
Multiprocessor Scheduling: Load sharing / Global ready queue ,[object Object],[object Object]
Multiprocessor Scheduling  Load Sharing: a problem ,[object Object],[object Object],[object Object]
Design issues 3: Multiprogramming on processors? ,[object Object],[object Object],[object Object],[object Object]
Gang Scheduling ,[object Object],[object Object],[object Object],[object Object],[object Object]
Gang Scheduling: another option
Multiprocessor Thread Scheduling  Dynamic Scheduling ,[object Object],[object Object],[object Object],[object Object],[object Object]
Summary: Multiprocessor Thread Scheduling ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Multiprocessor Scheduling and Synchronization ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Readers-Writers non-blocking synchronization (some slides are adapted from J. Anderson’s slides on same topic)
The Mutual Exclusion Problem Locking Synchronization ,[object Object],while  true  do Noncritical Section; Entry Section; Critical Section; Exit Section od ,[object Object],[object Object],[object Object],[object Object]
Non-blocking Synchronization ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],Locking
Non-blocking Synchronization ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Readers/Writers Problem ,[object Object],[object Object],[object Object],[object Object]
Solution 1 Readers have “priority”… Reader:: P( mutex ); rc  :=  rc  + 1; if  rc  = 1 then P( w ) fi; V( mutex ); CS; P( mutex ); rc  :=  rc     1; if  rc  = 0 then V( w ) fi; V( mutex ) Writer:: P( w ); CS; V( w ) “ First” reader executes P(w).  “Last” one executes V(w).
Solution 2 Writers have “priority” … readers should not build long queue on r, so that writers can overtake  =>  mutex3 Reader:: P( mutex3 ); P( r ); P( mutex1 ); rc  :=  rc  + 1; if  rc  = 1 then P( w ) fi; V( mutex1 ); V( r ); V( mutex3 ); CS; P( mutex1 ); rc  :=  rc     1; if  rc  = 0 then V( w ) fi; V( mutex1 ) Writer:: P( mutex2 ); wc  :=  wc  + 1; if  wc  = 1 then P( r ) fi; V( mutex2 ); P( w ); CS; V( w ); P( mutex2 ); wc  :=  wc     1; if  wc  = 0 then V( r ) fi; V( mutex2 )
Properties ,[object Object],[object Object],[object Object]
Concurrent Reading and Writing [Lamport ‘77] ,[object Object],[object Object],[object Object],[object Object],[object Object]
Interesting Factoids ,[object Object],[object Object]
The Problem ,[object Object],[object Object],[object Object],[object Object]
Preliminaries ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
More Preliminaries We say:   r  reads  v [ k,l ] . Value is  consistent  if  k  =  l . write: k write: k + i write: l        read  v 3 read  v 2 read  v m -1 read  v 1 read  v m read  r: 
Theorem 1 If  v  is always written from right to left, then a read from left to right obtains a value v 1 [ k 1 , l 1 ]  v 2 [ k 2 , l 2 ]  …   v m [ k m , l m ] where  k 1      l 1      k 2      l 2     …     k m      l m . Example:   v  =  v 1 v 2 v 3  =  d 1 d 2 d 3 Read reads  v 1 [0,0]  v 2 [1,1]  v 3 [2,2] . read :  read  v 1 read  d 1  read  v 2 read  d 2  read  v 3 read  d 3 write:1    w v 3 w v 2 w v 1 w d 3 w d 2 w d 1 write:0    w v 3 w v 2 w v 1 w d 3 w d 2 w d 1 write:2    w v 3 w v 2 w v 1 w d 3 w d 2 w d 1
Another Example read : write:0    w v 2 w v 1 w d 3 w d 4 w d 1  w d 2 write:1    w v 2 w v 1 w d 3 w d 4 w d 1  w d 2  read  v 1 r d 1  r d 2  read  v 2 r d 4  r d 3 v  =  v 1   v 2 d 1 d 2 d 3 d 4 Read reads  v 1 [0,1]  v 2 [1,2] . write:2    w v 2 w v 1 w d 3 w d 4 w d 1  w d 2
Theorem 2 Assume that  i      j  implies that  v [ i ]     v [ j ] , where  v  =  d 1  …  d m . (a) If  v  is always written from right to left, then a read from left to right obtains a value  v [ k , l ]      v [ l ] . (b) If  v  is always written from left to right, then a read from right to left obtains a value  v [ k , l ]      v [ k ] .
Example of (a) v   =  d 1 d 2 d 3 Read obtains  v [0,2]  = 390 < 400 =  v [2] . read :  read  d 1  read  d 2  read  d 3 write:1(399)    w d 3 w d 2 w d 1 9 9 3 write:0(398)    w d 3 w d 2 w d 1 8 9 3 write:2(400)    w d 3 w d 2 w d 1 0 0 4
Example of (b) v   =  d 1 d 2 d 3 Read obtains  v [0,2]  = 498 > 398 =  v [0] . read :  read  d 3  read  d 2  read  d 1 write:1(399)    w d 1 w d 2 w d 3 3 9 9 write:0(398)    w d 1 w d 2 w d 3 3 9 8 write:2(400)    w d 1 w d 2 w d 3 4 0 0
Readers/Writers Solution :> means assign larger value.  V1 means “left to right”.  V2 means “right to left”. Writer::  V1 :> V1; write D;  V2 := V1 Reader::  repeat temp := V2 read D  until V1 = temp
Proof Obligation ,[object Object],[object Object]
Proof By Theorem 2, V2 [ k 1 , l 1 ]     V2 [ l 1 ]   and  V1 [ k 3 ]     V1 [ k 3 , l 3 ] .  (1) Applying Theorem 1 to V2 D V1, k 1      l 1      k 2      l 2      k 3      l 3  .  (2) By the writer program, l 1      k 3     V2 [ l 1 ]     V1 [ k 3 ] .  (3) (1), (2), and (3) imply V2 [ k 1 , l 1 ]     V2 [ l 1 ]     V1 [ k 3 ]     V1 [ k 3 , l 3 ] . Hence,  V2 [ k 1 , l 1 ]  =   V1 [ k 3 , l 3 ]    V2 [ l 1 ]  =   V1 [ k 3 ]    l 1  =  k 3   , by the writer’s program.    k 2  =  l 2   by (2).
Supplemental Reading ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Useful Synchronization Primitives Usually  Necessary  in Nonblocking Algorithms CAS2 extends this CAS(var, old, new)    if var    old then return false fi;  var := new; return true   LL(var)    establish “link” to var; return var   SC(var, val)    if “link” to var still exists then break all current links of all processes; var := val; return true else return false fi  
Another Lock-free Example Shared Queue type  Qtype = record v: valtype; next:  pointer to Qtype end shared var  Tail:  pointer to Qtype; local var  old, new: pointer to Qtype procedure Enqueue (input: valtype) new := (input,  NIL); repeat  old := Tail until  CAS2(Tail, old->next, old, NIL, new, new)  Tail old Tail old new new retry loop
Using Locks in Real-time Systems The  Priority Inversion  Problem Uncontrolled use of locks in RT systems can result in unbounded blocking due to priority inversions . Time   Low Med High t t t 0 1 2 Shared Object Access Priority  Inversion Computation not involving object accesses Solution:  Limit priority inversions by  modifying task priorities . Time  Low Med High t 0 t 1 t 2
Dealing with Priority Inversions ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

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10 Multicore 07

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  • 8. On multicores Reason for multicores : physical limitations can cause significant heat dissipation and data synchronization problems In addition to operating system (OS) support, adjustments to existing software are required to maximize utilization of the computing resources provided by multi-core processors. Virtual machine approach again in focus . Intel Core 2 dual core processor, with CPU-local Level 1 caches+ shared, on-die Level 2 cache.
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  • 25. Readers-Writers non-blocking synchronization (some slides are adapted from J. Anderson’s slides on same topic)
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  • 30. Solution 1 Readers have “priority”… Reader:: P( mutex ); rc := rc + 1; if rc = 1 then P( w ) fi; V( mutex ); CS; P( mutex ); rc := rc  1; if rc = 0 then V( w ) fi; V( mutex ) Writer:: P( w ); CS; V( w ) “ First” reader executes P(w). “Last” one executes V(w).
  • 31. Solution 2 Writers have “priority” … readers should not build long queue on r, so that writers can overtake => mutex3 Reader:: P( mutex3 ); P( r ); P( mutex1 ); rc := rc + 1; if rc = 1 then P( w ) fi; V( mutex1 ); V( r ); V( mutex3 ); CS; P( mutex1 ); rc := rc  1; if rc = 0 then V( w ) fi; V( mutex1 ) Writer:: P( mutex2 ); wc := wc + 1; if wc = 1 then P( r ) fi; V( mutex2 ); P( w ); CS; V( w ); P( mutex2 ); wc := wc  1; if wc = 0 then V( r ) fi; V( mutex2 )
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  • 37. More Preliminaries We say: r reads v [ k,l ] . Value is consistent if k = l . write: k write: k + i write: l        read v 3 read v 2 read v m -1 read v 1 read v m read r: 
  • 38. Theorem 1 If v is always written from right to left, then a read from left to right obtains a value v 1 [ k 1 , l 1 ] v 2 [ k 2 , l 2 ] … v m [ k m , l m ] where k 1  l 1  k 2  l 2  …  k m  l m . Example: v = v 1 v 2 v 3 = d 1 d 2 d 3 Read reads v 1 [0,0] v 2 [1,1] v 3 [2,2] . read :  read v 1 read d 1  read v 2 read d 2  read v 3 read d 3 write:1    w v 3 w v 2 w v 1 w d 3 w d 2 w d 1 write:0    w v 3 w v 2 w v 1 w d 3 w d 2 w d 1 write:2    w v 3 w v 2 w v 1 w d 3 w d 2 w d 1
  • 39. Another Example read : write:0    w v 2 w v 1 w d 3 w d 4 w d 1  w d 2 write:1    w v 2 w v 1 w d 3 w d 4 w d 1  w d 2  read v 1 r d 1  r d 2  read v 2 r d 4  r d 3 v = v 1 v 2 d 1 d 2 d 3 d 4 Read reads v 1 [0,1] v 2 [1,2] . write:2    w v 2 w v 1 w d 3 w d 4 w d 1  w d 2
  • 40. Theorem 2 Assume that i  j implies that v [ i ]  v [ j ] , where v = d 1 … d m . (a) If v is always written from right to left, then a read from left to right obtains a value v [ k , l ]  v [ l ] . (b) If v is always written from left to right, then a read from right to left obtains a value v [ k , l ]  v [ k ] .
  • 41. Example of (a) v = d 1 d 2 d 3 Read obtains v [0,2] = 390 < 400 = v [2] . read :  read d 1  read d 2  read d 3 write:1(399)    w d 3 w d 2 w d 1 9 9 3 write:0(398)    w d 3 w d 2 w d 1 8 9 3 write:2(400)    w d 3 w d 2 w d 1 0 0 4
  • 42. Example of (b) v = d 1 d 2 d 3 Read obtains v [0,2] = 498 > 398 = v [0] . read :  read d 3  read d 2  read d 1 write:1(399)    w d 1 w d 2 w d 3 3 9 9 write:0(398)    w d 1 w d 2 w d 3 3 9 8 write:2(400)    w d 1 w d 2 w d 3 4 0 0
  • 43. Readers/Writers Solution :> means assign larger value.  V1 means “left to right”.  V2 means “right to left”. Writer::  V1 :> V1; write D;  V2 := V1 Reader::  repeat temp := V2 read D  until V1 = temp
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  • 45. Proof By Theorem 2, V2 [ k 1 , l 1 ]  V2 [ l 1 ] and V1 [ k 3 ]  V1 [ k 3 , l 3 ] . (1) Applying Theorem 1 to V2 D V1, k 1  l 1  k 2  l 2  k 3  l 3 . (2) By the writer program, l 1  k 3  V2 [ l 1 ]  V1 [ k 3 ] . (3) (1), (2), and (3) imply V2 [ k 1 , l 1 ]  V2 [ l 1 ]  V1 [ k 3 ]  V1 [ k 3 , l 3 ] . Hence, V2 [ k 1 , l 1 ] = V1 [ k 3 , l 3 ]  V2 [ l 1 ] = V1 [ k 3 ]  l 1 = k 3 , by the writer’s program.  k 2 = l 2 by (2).
  • 46.
  • 47. Useful Synchronization Primitives Usually Necessary in Nonblocking Algorithms CAS2 extends this CAS(var, old, new)  if var  old then return false fi; var := new; return true  LL(var)  establish “link” to var; return var  SC(var, val)  if “link” to var still exists then break all current links of all processes; var := val; return true else return false fi 
  • 48. Another Lock-free Example Shared Queue type Qtype = record v: valtype; next: pointer to Qtype end shared var Tail: pointer to Qtype; local var old, new: pointer to Qtype procedure Enqueue (input: valtype) new := (input, NIL); repeat old := Tail until CAS2(Tail, old->next, old, NIL, new, new) Tail old Tail old new new retry loop
  • 49. Using Locks in Real-time Systems The Priority Inversion Problem Uncontrolled use of locks in RT systems can result in unbounded blocking due to priority inversions . Time Low Med High t t t 0 1 2 Shared Object Access Priority Inversion Computation not involving object accesses Solution: Limit priority inversions by modifying task priorities . Time Low Med High t 0 t 1 t 2
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