SlideShare a Scribd company logo
1 of 22
Assembler

A short Overview




1
Content

   Language Levels
     High Level  micro code
     Machinecode language

   Assembler languages
     Structure
     Commands




2
Language Levels
    High Level Language




    Assembler Language




    Machine Language      Normally deepest free
                          accessible Level


           Micro             „Firmware“
       -programming


        Hardware
3
High Level  Micro Code
   High Level language
       Formulating program for certain application
        areas
       Hardware independent

   Assembler languages
       Machine oriented language
       Programs orient on special hardware
        properties
       More comfortable than machine code
        (e.g. by using symbolic notations)
4
High Level  Micro Code

   Machine code:

     Set of commands directly executable
      via CPU
     Commands in numeric code
     Lowest semantic level
     Generally 2 executing oportunities:
        • Interpretiv via micro code
        • Directly processing via hardware
5
High Level  Micro Code
   Micro programming:
     Implementing of executing of machine
      commands (Control unit - controller)
     Machine command executed/shown
      as sequence of micro code
      commands
     Micro code commands:
        • Simpliest process controlling
           • Moving of data
           • Opening of grids
6
           • Tests
Machinecode language

   Machinecode command:
       Binary word (fix length, causes
        elementary operations within CPU)

   Machinecode program
       sequence of machinecode commands



7
Machinecode language

   Structure:           OpCode    OpAddress

       Operationcode
         • Defining executable operation
       Operandaddress
         • Spezification of operands
            • Constants/register addresses/storage
              addresses
       Difference between 1/2/3 address
        machines
8
Machinecode language

 Data transport commands
 Arithmetic and logical commands

 Process controlling commands

 In-/output commands

 Special commands

 Disadvantage:
       Difficultly readable
       No symbolic names(Mnemomics)
9
Assembler languages

    Translated into machinecode
     language(Interpreter)
    Each operation code(opcode) owns one
     symbolic command
    Assignments of operand addresses are
     possible
    Labels for command addresses


10
Assembler languages
    Usage of pseudo commands
        Commands for assembler
        Assigment of values/addresses(variables)
        Definition of the programstart addresses
        Allocating of memory for variables




11
Assembler languages-structure
<Label> <Mnemomic> <Operand> Comments
     Label
             symbolic labeling of an assembler address
              (command address at Machine level)
     Mnemomic
             Symbolic description of an operation
     Operands
             Contains of variables or addresse if necessary
     Comments

     12
Assembler Languages
    - Machine Instructions
   Bitpatterns are created, executed as
    commands by CPU
   Classes:
        Arithmetic/logical Operations(ADD,SUB,XOR,
         administrative commands - EQU,
         shifting&rotation commands)
        Data transfer(load/save operations,
         speicher<>register, register<>register)
        Control commands(jump op. [un-]conditional
         /relativ,control op. – STOP)
        In-/output commands
    13
Assembler – Assembler Instructiuons
(Pseudo Commands)

    Instructions to assembler
        Controlling translation process
        No creation of machine code
        Affect creation of machine instructions
    Types:
        Program organisation
        equations and symbolic Addresses
        Definition of Constants and Memory
        Addressing
14
Assembler – All purpose Register

   Arithmetic example:
        Source and Destination Data width has to
         euqal
        AX , BX, CX, DX, SI, DI, BP, SP
    ; arithmetic operations
                                                All purpose
    ADD AX, BX           ; AX := AX+BX          Register
    SUB AH,AL            ; AH := AH - AL
    MOV AL, CL           ; AL := CL        AX   AH   AL
    INC CX               ; CX := CX+1
    DEC CL               ; CL := CL-1      BX   BH   BL
    NEG CX               ; CX := -CX
                                           CX CH     CL

    15
Assembler – Special Register



    Unless to all-purpose registers
        Special register(SS, DS, CS, ES, IP)
          • Never ever are
             • Destination/Source of a „mov“ command
             • Destination of arithmetic operations




16
Assembler – Flag Register

     O   D   I      T   S     Z       A      P          C




                               Zero
                            Sign                            Carry
                     Trap                     Parity
                 Interrupt enable     Auxiliary carry
         Direction

     Overflow
17
Assembler – Flag Register
   FLAG-Bits:
        C Carry            Area crossing of unsigned numbers
        A Aux. Carry       Area crossing at BCD-design
        O Overflow         Area crossing at arithmetic
                            operation with signed numbers
        S Sign             True if result = negativ
        Z Zero             Result = Null
        P Parity           Result has an even number of 1 Bits
        D Direction flag   Defines direction of string-
                            commands
        I Interrupt        Global Interrupt Enable/Disable Flag
        T Trap Flag        Used by debugger, allows single-step-
                            modus




    18
Assembler – Flag Register
    Missing flags:
        • V: Two’s complement overflow indicator
        • H: Half Carry Flag

    Operations and flags
     ADD, SUB, NEG    affects     O, S, Z, A, P, C
     INC, DEC          -“-        O, S, Z, A, P
     MUL, DIV          -“-        O, C
     AND, OR , XOR     -“-        S, Z, P, C



19
Assembler – Jump Operations


 Un-/conditioned        jumps
      Example:
            Mov AX, 0
            CMP CX, 0
     again: JZ end       (jumpzero, conditioned j.)
            ADD AX, CX
            DEC CX
            JMP again    (unconditioned jumped)
     end: NOP


20
Sources
http://www.informatik.ku-eichstaett.de
   /studium/skripte/ws0203/einf2/Vorlesung12.ppt

http://www-ist.massey.ac.nz
/GMoretti/159704/Lectures/1-Languages-Translation-&-Assemblers.pdf

http://www.mathematik.uni-marburg.de
/~priebe/lehre/ws0001/ti1/Skript/TechInf1Lo08.ppt

E:temp4.SemesterIntro into Dig.ComputingDokuBefehlssatz.pdf




        21
Thanks 4 ur Attention




          Any further
           questions
              ??


22

More Related Content

What's hot

CMOS VLSI design
CMOS VLSI designCMOS VLSI design
CMOS VLSI design
Rajan Kumar
 

What's hot (20)

Lect 2 ARM processor architecture
Lect 2 ARM processor architectureLect 2 ARM processor architecture
Lect 2 ARM processor architecture
 
Minimum mode and Maximum mode Configuration in 8086
Minimum mode and Maximum mode Configuration in 8086Minimum mode and Maximum mode Configuration in 8086
Minimum mode and Maximum mode Configuration in 8086
 
DMA and DMA controller
DMA and DMA controllerDMA and DMA controller
DMA and DMA controller
 
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT II Embeded Hardware
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT II  Embeded HardwareSYBSC IT SEM IV EMBEDDED SYSTEMS UNIT II  Embeded Hardware
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT II Embeded Hardware
 
Interfacing Stepper motor with 8051
Interfacing Stepper motor with 8051Interfacing Stepper motor with 8051
Interfacing Stepper motor with 8051
 
Introduction to Bus | Address, Data, Control Bus
Introduction to Bus | Address, Data, Control BusIntroduction to Bus | Address, Data, Control Bus
Introduction to Bus | Address, Data, Control Bus
 
CMOS VLSI design
CMOS VLSI designCMOS VLSI design
CMOS VLSI design
 
Arm cortex-m4 programmer model
Arm cortex-m4 programmer modelArm cortex-m4 programmer model
Arm cortex-m4 programmer model
 
Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086
 
Memory organization (Computer architecture)
Memory organization (Computer architecture)Memory organization (Computer architecture)
Memory organization (Computer architecture)
 
Stacks & subroutines 1
Stacks & subroutines 1Stacks & subroutines 1
Stacks & subroutines 1
 
8259 Programmable Interrupt Controller
8259 Programmable Interrupt Controller8259 Programmable Interrupt Controller
8259 Programmable Interrupt Controller
 
SHLD and LHLD instruction
SHLD and LHLD instructionSHLD and LHLD instruction
SHLD and LHLD instruction
 
FUNDAMENTALS OF COMPUTER DESIGN
FUNDAMENTALS OF COMPUTER DESIGNFUNDAMENTALS OF COMPUTER DESIGN
FUNDAMENTALS OF COMPUTER DESIGN
 
Applications of microprocessor
Applications of microprocessorApplications of microprocessor
Applications of microprocessor
 
Interfacing memory with 8086 microprocessor
Interfacing memory with 8086 microprocessorInterfacing memory with 8086 microprocessor
Interfacing memory with 8086 microprocessor
 
8086 micro processor
8086 micro processor8086 micro processor
8086 micro processor
 
Serial Peripheral Interface(SPI)
Serial Peripheral Interface(SPI)Serial Peripheral Interface(SPI)
Serial Peripheral Interface(SPI)
 
Registers
RegistersRegisters
Registers
 
Bus aribration
Bus aribrationBus aribration
Bus aribration
 

Similar to Assembler

Unit 3 assembler and processor
Unit 3   assembler and processorUnit 3   assembler and processor
Unit 3 assembler and processor
Abha Damani
 
Ec 252 ec-252-l10-instruction sets and addressing modes
Ec 252 ec-252-l10-instruction sets and addressing modesEc 252 ec-252-l10-instruction sets and addressing modes
Ec 252 ec-252-l10-instruction sets and addressing modes
bhshmuec
 
Programming basic computer
Programming basic computerProgramming basic computer
Programming basic computer
Martial Kouadio
 
Chapter 1SyllabusCatalog Description Computer structu
Chapter 1SyllabusCatalog Description Computer structuChapter 1SyllabusCatalog Description Computer structu
Chapter 1SyllabusCatalog Description Computer structu
EstelaJeffery653
 
Part III: Assembly Language
Part III: Assembly LanguagePart III: Assembly Language
Part III: Assembly Language
Ahmed M. Abed
 

Similar to Assembler (20)

Assembler
AssemblerAssembler
Assembler
 
Assembly language part I
Assembly language part IAssembly language part I
Assembly language part I
 
Assembly language part I
Assembly language part IAssembly language part I
Assembly language part I
 
9.cs instrset
9.cs instrset9.cs instrset
9.cs instrset
 
Unit 3 assembler and processor
Unit 3   assembler and processorUnit 3   assembler and processor
Unit 3 assembler and processor
 
Coal (1)
Coal (1)Coal (1)
Coal (1)
 
Ec 252 ec-252-l10-instruction sets and addressing modes
Ec 252 ec-252-l10-instruction sets and addressing modesEc 252 ec-252-l10-instruction sets and addressing modes
Ec 252 ec-252-l10-instruction sets and addressing modes
 
Programming basic computer
Programming basic computerProgramming basic computer
Programming basic computer
 
ISA.pptx
ISA.pptxISA.pptx
ISA.pptx
 
Assembly Language Programming By Ytha Yu, Charles Marut Chap 4 (Introduction ...
Assembly Language Programming By Ytha Yu, Charles Marut Chap 4 (Introduction ...Assembly Language Programming By Ytha Yu, Charles Marut Chap 4 (Introduction ...
Assembly Language Programming By Ytha Yu, Charles Marut Chap 4 (Introduction ...
 
B.sc cs-ii-u-3.1-basic computer programming and micro programmed control
B.sc cs-ii-u-3.1-basic computer programming and micro programmed controlB.sc cs-ii-u-3.1-basic computer programming and micro programmed control
B.sc cs-ii-u-3.1-basic computer programming and micro programmed control
 
Bca 2nd sem-u-3.1-basic computer programming and micro programmed control
Bca 2nd sem-u-3.1-basic computer programming and micro programmed controlBca 2nd sem-u-3.1-basic computer programming and micro programmed control
Bca 2nd sem-u-3.1-basic computer programming and micro programmed control
 
Programming the basic computer
Programming the basic computerProgramming the basic computer
Programming the basic computer
 
Al2ed chapter17
Al2ed chapter17Al2ed chapter17
Al2ed chapter17
 
SS-assemblers 1.pptx
SS-assemblers 1.pptxSS-assemblers 1.pptx
SS-assemblers 1.pptx
 
Chapter 1SyllabusCatalog Description Computer structu
Chapter 1SyllabusCatalog Description Computer structuChapter 1SyllabusCatalog Description Computer structu
Chapter 1SyllabusCatalog Description Computer structu
 
Assembly language (Example with mapping from C++ to Assembly)
Assembly language (Example with mapping from C++ to Assembly)Assembly language (Example with mapping from C++ to Assembly)
Assembly language (Example with mapping from C++ to Assembly)
 
other-architectures.ppt
other-architectures.pptother-architectures.ppt
other-architectures.ppt
 
Part III: Assembly Language
Part III: Assembly LanguagePart III: Assembly Language
Part III: Assembly Language
 
Instruction Set Architecture
Instruction Set ArchitectureInstruction Set Architecture
Instruction Set Architecture
 

More from Vaibhav Bajaj (20)

Stroustrup c++0x overview
Stroustrup c++0x overviewStroustrup c++0x overview
Stroustrup c++0x overview
 
P smile
P smileP smile
P smile
 
Ppt history-of-apple2203 (1)
Ppt history-of-apple2203 (1)Ppt history-of-apple2203 (1)
Ppt history-of-apple2203 (1)
 
Os
OsOs
Os
 
Operating system.ppt (1)
Operating system.ppt (1)Operating system.ppt (1)
Operating system.ppt (1)
 
Oop1
Oop1Oop1
Oop1
 
Mem hierarchy
Mem hierarchyMem hierarchy
Mem hierarchy
 
Database
DatabaseDatabase
Database
 
C++0x
C++0xC++0x
C++0x
 
Blu ray disc slides
Blu ray disc slidesBlu ray disc slides
Blu ray disc slides
 
Assembler (2)
Assembler (2)Assembler (2)
Assembler (2)
 
Projection of solids
Projection of solidsProjection of solids
Projection of solids
 
Projection of planes
Projection of planesProjection of planes
Projection of planes
 
Ortographic projection
Ortographic projectionOrtographic projection
Ortographic projection
 
Isometric
IsometricIsometric
Isometric
 
Intersection 1
Intersection 1Intersection 1
Intersection 1
 
Important q
Important qImportant q
Important q
 
Eg o31
Eg o31Eg o31
Eg o31
 
Development of surfaces of solids
Development of surfaces of solidsDevelopment of surfaces of solids
Development of surfaces of solids
 
Development of surfaces of solids copy
Development of surfaces of solids   copyDevelopment of surfaces of solids   copy
Development of surfaces of solids copy
 

Recently uploaded

Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Safe Software
 
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Safe Software
 

Recently uploaded (20)

Navigating the Deluge_ Dubai Floods and the Resilience of Dubai International...
Navigating the Deluge_ Dubai Floods and the Resilience of Dubai International...Navigating the Deluge_ Dubai Floods and the Resilience of Dubai International...
Navigating the Deluge_ Dubai Floods and the Resilience of Dubai International...
 
Corporate and higher education May webinar.pptx
Corporate and higher education May webinar.pptxCorporate and higher education May webinar.pptx
Corporate and higher education May webinar.pptx
 
AWS Community Day CPH - Three problems of Terraform
AWS Community Day CPH - Three problems of TerraformAWS Community Day CPH - Three problems of Terraform
AWS Community Day CPH - Three problems of Terraform
 
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
 
presentation ICT roal in 21st century education
presentation ICT roal in 21st century educationpresentation ICT roal in 21st century education
presentation ICT roal in 21st century education
 
Apidays New York 2024 - Accelerating FinTech Innovation by Vasa Krishnan, Fin...
Apidays New York 2024 - Accelerating FinTech Innovation by Vasa Krishnan, Fin...Apidays New York 2024 - Accelerating FinTech Innovation by Vasa Krishnan, Fin...
Apidays New York 2024 - Accelerating FinTech Innovation by Vasa Krishnan, Fin...
 
ICT role in 21st century education and its challenges
ICT role in 21st century education and its challengesICT role in 21st century education and its challenges
ICT role in 21st century education and its challenges
 
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWEREMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
EMPOWERMENT TECHNOLOGY GRADE 11 QUARTER 2 REVIEWER
 
Platformless Horizons for Digital Adaptability
Platformless Horizons for Digital AdaptabilityPlatformless Horizons for Digital Adaptability
Platformless Horizons for Digital Adaptability
 
CNIC Information System with Pakdata Cf In Pakistan
CNIC Information System with Pakdata Cf In PakistanCNIC Information System with Pakdata Cf In Pakistan
CNIC Information System with Pakdata Cf In Pakistan
 
Vector Search -An Introduction in Oracle Database 23ai.pptx
Vector Search -An Introduction in Oracle Database 23ai.pptxVector Search -An Introduction in Oracle Database 23ai.pptx
Vector Search -An Introduction in Oracle Database 23ai.pptx
 
Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...
Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...
Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...
 
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, AdobeApidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
 
Elevate Developer Efficiency & build GenAI Application with Amazon Q​
Elevate Developer Efficiency & build GenAI Application with Amazon Q​Elevate Developer Efficiency & build GenAI Application with Amazon Q​
Elevate Developer Efficiency & build GenAI Application with Amazon Q​
 
FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024
 
Introduction to Multilingual Retrieval Augmented Generation (RAG)
Introduction to Multilingual Retrieval Augmented Generation (RAG)Introduction to Multilingual Retrieval Augmented Generation (RAG)
Introduction to Multilingual Retrieval Augmented Generation (RAG)
 
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
 
Strategize a Smooth Tenant-to-tenant Migration and Copilot Takeoff
Strategize a Smooth Tenant-to-tenant Migration and Copilot TakeoffStrategize a Smooth Tenant-to-tenant Migration and Copilot Takeoff
Strategize a Smooth Tenant-to-tenant Migration and Copilot Takeoff
 
Exploring Multimodal Embeddings with Milvus
Exploring Multimodal Embeddings with MilvusExploring Multimodal Embeddings with Milvus
Exploring Multimodal Embeddings with Milvus
 
Strategies for Landing an Oracle DBA Job as a Fresher
Strategies for Landing an Oracle DBA Job as a FresherStrategies for Landing an Oracle DBA Job as a Fresher
Strategies for Landing an Oracle DBA Job as a Fresher
 

Assembler

  • 2. Content  Language Levels  High Level  micro code  Machinecode language  Assembler languages  Structure  Commands 2
  • 3. Language Levels High Level Language Assembler Language Machine Language Normally deepest free accessible Level Micro „Firmware“ -programming Hardware 3
  • 4. High Level  Micro Code  High Level language  Formulating program for certain application areas  Hardware independent  Assembler languages  Machine oriented language  Programs orient on special hardware properties  More comfortable than machine code (e.g. by using symbolic notations) 4
  • 5. High Level  Micro Code  Machine code:  Set of commands directly executable via CPU  Commands in numeric code  Lowest semantic level  Generally 2 executing oportunities: • Interpretiv via micro code • Directly processing via hardware 5
  • 6. High Level  Micro Code  Micro programming:  Implementing of executing of machine commands (Control unit - controller)  Machine command executed/shown as sequence of micro code commands  Micro code commands: • Simpliest process controlling • Moving of data • Opening of grids 6 • Tests
  • 7. Machinecode language  Machinecode command:  Binary word (fix length, causes elementary operations within CPU)  Machinecode program  sequence of machinecode commands 7
  • 8. Machinecode language  Structure: OpCode OpAddress  Operationcode • Defining executable operation  Operandaddress • Spezification of operands • Constants/register addresses/storage addresses  Difference between 1/2/3 address machines 8
  • 9. Machinecode language  Data transport commands  Arithmetic and logical commands  Process controlling commands  In-/output commands  Special commands  Disadvantage:  Difficultly readable  No symbolic names(Mnemomics) 9
  • 10. Assembler languages  Translated into machinecode language(Interpreter)  Each operation code(opcode) owns one symbolic command  Assignments of operand addresses are possible  Labels for command addresses 10
  • 11. Assembler languages  Usage of pseudo commands  Commands for assembler  Assigment of values/addresses(variables)  Definition of the programstart addresses  Allocating of memory for variables 11
  • 12. Assembler languages-structure <Label> <Mnemomic> <Operand> Comments  Label  symbolic labeling of an assembler address (command address at Machine level)  Mnemomic  Symbolic description of an operation  Operands  Contains of variables or addresse if necessary  Comments 12
  • 13. Assembler Languages - Machine Instructions  Bitpatterns are created, executed as commands by CPU  Classes:  Arithmetic/logical Operations(ADD,SUB,XOR, administrative commands - EQU, shifting&rotation commands)  Data transfer(load/save operations, speicher<>register, register<>register)  Control commands(jump op. [un-]conditional /relativ,control op. – STOP)  In-/output commands 13
  • 14. Assembler – Assembler Instructiuons (Pseudo Commands)  Instructions to assembler  Controlling translation process  No creation of machine code  Affect creation of machine instructions  Types:  Program organisation  equations and symbolic Addresses  Definition of Constants and Memory  Addressing 14
  • 15. Assembler – All purpose Register  Arithmetic example:  Source and Destination Data width has to euqal  AX , BX, CX, DX, SI, DI, BP, SP ; arithmetic operations All purpose ADD AX, BX ; AX := AX+BX Register SUB AH,AL ; AH := AH - AL MOV AL, CL ; AL := CL AX AH AL INC CX ; CX := CX+1 DEC CL ; CL := CL-1 BX BH BL NEG CX ; CX := -CX CX CH CL 15
  • 16. Assembler – Special Register  Unless to all-purpose registers  Special register(SS, DS, CS, ES, IP) • Never ever are • Destination/Source of a „mov“ command • Destination of arithmetic operations 16
  • 17. Assembler – Flag Register O D I T S Z A P C Zero Sign Carry Trap Parity Interrupt enable Auxiliary carry Direction Overflow 17
  • 18. Assembler – Flag Register  FLAG-Bits:  C Carry Area crossing of unsigned numbers  A Aux. Carry Area crossing at BCD-design  O Overflow Area crossing at arithmetic operation with signed numbers  S Sign True if result = negativ  Z Zero Result = Null  P Parity Result has an even number of 1 Bits  D Direction flag Defines direction of string- commands  I Interrupt Global Interrupt Enable/Disable Flag  T Trap Flag Used by debugger, allows single-step- modus 18
  • 19. Assembler – Flag Register  Missing flags: • V: Two’s complement overflow indicator • H: Half Carry Flag  Operations and flags ADD, SUB, NEG affects O, S, Z, A, P, C INC, DEC -“- O, S, Z, A, P MUL, DIV -“- O, C AND, OR , XOR -“- S, Z, P, C 19
  • 20. Assembler – Jump Operations  Un-/conditioned jumps  Example: Mov AX, 0 CMP CX, 0 again: JZ end (jumpzero, conditioned j.) ADD AX, CX DEC CX JMP again (unconditioned jumped) end: NOP 20
  • 21. Sources http://www.informatik.ku-eichstaett.de /studium/skripte/ws0203/einf2/Vorlesung12.ppt http://www-ist.massey.ac.nz /GMoretti/159704/Lectures/1-Languages-Translation-&-Assemblers.pdf http://www.mathematik.uni-marburg.de /~priebe/lehre/ws0001/ti1/Skript/TechInf1Lo08.ppt E:temp4.SemesterIntro into Dig.ComputingDokuBefehlssatz.pdf 21
  • 22. Thanks 4 ur Attention Any further questions ?? 22