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ENGG2410: Digital Design
            Lab 1: Combinational Logic Design Based on
                   Small Scale Integrated Circuits
                             School of Engineering, University of Guelph
                                              Fall 2008


                                Due Date Week #4 2008, In the lab


1     Objectives:
The purpose of this lab is : (a) to introduce you to some of the equipment in the digital lab that you will
be using in this course, (b) to build some basic combinational circuits, (c) to get handy with good practice
of testing and debugging.


2     Introduction
The main components you will be using in this digital design lab are:

    • Proto-board.

    • Logic Probe.

    • Wire Strippers and Chip Puller.

    • TTL SSI Packages.

2.1   Proto-board
The proto-board is for holding and connecting chips in an easy and simple way. As seen in Figure 1 chips
are inserted across the middle “valley” in the proto-board. The set of holes in a vertical line above the
valley are connected electrically, as are the holes below the valley. Thus each pin of the chip in the board
is connected to the holes above (or below) the pin. So, to make a connection between different pins, you
need only make connections between the holes by plugging the bare end of a wire into the holes above or
below the pins.
    In Figure 1, the horizontal lines at the top and bottom of the board delineate holes that are connected
horizontally; note that the space in the middle indicates a disconnection. The horizontally connected holes
at the tops and the vertically connected holes at the side are usually connected to the power and ground
provided by the external connector. The power and ground of the chips are then connected to these strips
of holes. The first thing you should do in the lab is connect power and ground to these horizontal and
vertical strips.




                                                     1
O O O O     O O O O    O O O O   O O O O    O   O   O O   Connected Horizontally

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O   Connected Vertically

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O

                            O                O O O O O O O O                      O      "Valley"
                                 CHIP                              CHIP
                            O                O O O O O O O O                      O     Chip Pins
                            O O O O O O O O O O O O O O O O O O O      OO   O   O O

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O

                            O O O O O O O O O O O O O O O O O O O      OO   O   O O


                            O O O O    O O O O     O O O O   O O O O   O    O   O O




                                      Figure 1: Proto-board Used in the Lab



2.2   Logic Probe
The logic probe is used for measuring the logic values of signals on the board as shown in Figure 2. Be
sure that it has power attached to the correct terminals. To test the probe, touch it to the +5V on the
proto-board and ground, to ensure that it correctly indicates the values high (1) and low (0) respectively.
For this lab, since we’ll be using TTL chips (see below in Section 2.4) you should set the switch to TTL;
in other labs we might be using CMOS chips, and so the switch setting should be changed.




                                                  Figure 2: Logic Probe


   The logic probe also can indicate when a signal is changed (oscillating). Touch the probe to the clock
on the signal generator to see how the probe indicates oscillation.

2.3   Wire Strippers and Chip Puller
The wire strippers are attached to each workstation to make sure they don’t get lost. If you haven’t ever
stripped a wire, try it!
    The chip puller should always be used to remove chips from the proto-board. Doing it with your fingers
will bend the pins and ultimately break them, so don’t.

2.4   TTL SSI Packages
The chips that you will use in this lab are Small Scale Integration (SSI - meaning not much logic on a
single chip) Transistor-Transistor Logic (TTL) family. TTL refers to the nature of the circuit of the digital
logic gate; since we will only be using TTL this one time in the lab, and CMOS logic in the remainder of


                                                              2
the lab, we won’t bother describing the circuit. It is important to know, however, that the logic probe has
a switch that must be set appropriately for the different type of logic on it.
    All of the TTL chips you will use are “Dual In-line Packages” or DIPs. Most of the packages are 14
pins as shown in Figure 3, and the pins are numbered from looking at the chip from the top: Below the
“notch” is pin 1 to pin 7, and above the notch is pin 14 down to 8. NOTE that pin “14” must always
be connected to VCC(+5v) and pin “7” to ground (0V).

                                  14 (Vcc)                 8        Part number is printed
                                                                      on the top of the chip

                    "Notch"               74XX

                                      1                    7 (Gnd)
                                   Figure 3: TTL Chips, Voltage Supply




3    Preparation
Design each of the circuits specified below using only 74LS04 (NOT), 74LS08 (AND) and 74LS32 (OR)
series TTL gates, (Please check the data sheets in Lab#1 Section and other related information
in the General Lab Section). Choose the actual pin numbers of the chips that you will use when you
build your circuit and show them on your circuit diagram - this will make the construction of your circuit
easier.
    In each case, show all of the steps required to go from the specification given below, to the final circuit,
including: assigning variable names to inputs and outputs, deriving a truth table, the logic function, and
the a schematic picture of the final circuit, with pin numbers and chip types.

    • The logic function f = ab + c

    • Design a circuit that has two inputs (x and y) and one output (f) that functions in the following
      way: the function f is true “1” when x and y are the same, and false “0” when they are different.

    • Design a circuit with three inputs (x,y,z) and two outputs (f1 and f2). The first output (f1) should
      be true “1” whenever the number of 1’s in the three inputs is either 1 or 3. The second output (f2)
      should be true “1” whenever the number of 1’s in the three inputs is either 0 or 2. In all other cases,
      the output should be false “0”.

Optional:     using all of the TTL gates available, can you build a cheaper implementation (using fewer
gates and/or wires)?


4    Requirements/In the Lab
The purpose of this lab is to get familiar with the equipment and to build and test several combinational
circuits, and get a sense of how to debug circuits that don’t work.

                                                      3
4.1   Equipment Familiarization
Read through Section 2 of this handout, and test your equipment as indicated in that section. Make sure
you know how all this stuff works; you will be using it heavily in this course, and we’re likely to put
questions about it on midterms and exams.

4.2   Building, Testing and Debugging Circuits
   • For each of the logic functions you designed in the preparation, build the circuit on the proto-board
     using TTL chips which are available in the lab. Use wires connected to the +5 Volt and/or 0 Volt
     to act as switches for your inputs and LED’s or probe to act as output. Use a RED wire to
     connect your circuit to VCC (i.e 5 volt supply), a BLACK wire to connect the circuit to
     GROUND, GREEN wires for inputs, YELLOW wires to make your connections between
     ICs. Remember to hook up the power! Show your teaching assistant that each circuit works
     correctly once it does.

   • Once the final circuit is working, the teaching assistant will break your circuit by inserting a faulty
     wire or component or doing something nasty. You are required to determine what the cause of the
     non-function is. To do this you must show concrete proof of the cause. How do you do that?

4.3   Report
When completed, you will hand in the following in your report:

  1. Your Group #, and Names

  2. Title Page

  3. Explain how you implemented each circuit by providing the truth table and logic function.

  4. Draw your circuit.

  5. Any future recommendation for current lab will be appreciated.




                                                    4

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Lab1

  • 1. ENGG2410: Digital Design Lab 1: Combinational Logic Design Based on Small Scale Integrated Circuits School of Engineering, University of Guelph Fall 2008 Due Date Week #4 2008, In the lab 1 Objectives: The purpose of this lab is : (a) to introduce you to some of the equipment in the digital lab that you will be using in this course, (b) to build some basic combinational circuits, (c) to get handy with good practice of testing and debugging. 2 Introduction The main components you will be using in this digital design lab are: • Proto-board. • Logic Probe. • Wire Strippers and Chip Puller. • TTL SSI Packages. 2.1 Proto-board The proto-board is for holding and connecting chips in an easy and simple way. As seen in Figure 1 chips are inserted across the middle “valley” in the proto-board. The set of holes in a vertical line above the valley are connected electrically, as are the holes below the valley. Thus each pin of the chip in the board is connected to the holes above (or below) the pin. So, to make a connection between different pins, you need only make connections between the holes by plugging the bare end of a wire into the holes above or below the pins. In Figure 1, the horizontal lines at the top and bottom of the board delineate holes that are connected horizontally; note that the space in the middle indicates a disconnection. The horizontally connected holes at the tops and the vertically connected holes at the side are usually connected to the power and ground provided by the external connector. The power and ground of the chips are then connected to these strips of holes. The first thing you should do in the lab is connect power and ground to these horizontal and vertical strips. 1
  • 2. O O O O O O O O O O O O O O O O O O O O Connected Horizontally O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O O O O O O O O O O OO O O O Connected Vertically O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O "Valley" CHIP CHIP O O O O O O O O O O Chip Pins O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O O O O O O O O O O OO O O O O O O O O O O O O O O O O O O O O O O O Figure 1: Proto-board Used in the Lab 2.2 Logic Probe The logic probe is used for measuring the logic values of signals on the board as shown in Figure 2. Be sure that it has power attached to the correct terminals. To test the probe, touch it to the +5V on the proto-board and ground, to ensure that it correctly indicates the values high (1) and low (0) respectively. For this lab, since we’ll be using TTL chips (see below in Section 2.4) you should set the switch to TTL; in other labs we might be using CMOS chips, and so the switch setting should be changed. Figure 2: Logic Probe The logic probe also can indicate when a signal is changed (oscillating). Touch the probe to the clock on the signal generator to see how the probe indicates oscillation. 2.3 Wire Strippers and Chip Puller The wire strippers are attached to each workstation to make sure they don’t get lost. If you haven’t ever stripped a wire, try it! The chip puller should always be used to remove chips from the proto-board. Doing it with your fingers will bend the pins and ultimately break them, so don’t. 2.4 TTL SSI Packages The chips that you will use in this lab are Small Scale Integration (SSI - meaning not much logic on a single chip) Transistor-Transistor Logic (TTL) family. TTL refers to the nature of the circuit of the digital logic gate; since we will only be using TTL this one time in the lab, and CMOS logic in the remainder of 2
  • 3. the lab, we won’t bother describing the circuit. It is important to know, however, that the logic probe has a switch that must be set appropriately for the different type of logic on it. All of the TTL chips you will use are “Dual In-line Packages” or DIPs. Most of the packages are 14 pins as shown in Figure 3, and the pins are numbered from looking at the chip from the top: Below the “notch” is pin 1 to pin 7, and above the notch is pin 14 down to 8. NOTE that pin “14” must always be connected to VCC(+5v) and pin “7” to ground (0V). 14 (Vcc) 8 Part number is printed on the top of the chip "Notch" 74XX 1 7 (Gnd) Figure 3: TTL Chips, Voltage Supply 3 Preparation Design each of the circuits specified below using only 74LS04 (NOT), 74LS08 (AND) and 74LS32 (OR) series TTL gates, (Please check the data sheets in Lab#1 Section and other related information in the General Lab Section). Choose the actual pin numbers of the chips that you will use when you build your circuit and show them on your circuit diagram - this will make the construction of your circuit easier. In each case, show all of the steps required to go from the specification given below, to the final circuit, including: assigning variable names to inputs and outputs, deriving a truth table, the logic function, and the a schematic picture of the final circuit, with pin numbers and chip types. • The logic function f = ab + c • Design a circuit that has two inputs (x and y) and one output (f) that functions in the following way: the function f is true “1” when x and y are the same, and false “0” when they are different. • Design a circuit with three inputs (x,y,z) and two outputs (f1 and f2). The first output (f1) should be true “1” whenever the number of 1’s in the three inputs is either 1 or 3. The second output (f2) should be true “1” whenever the number of 1’s in the three inputs is either 0 or 2. In all other cases, the output should be false “0”. Optional: using all of the TTL gates available, can you build a cheaper implementation (using fewer gates and/or wires)? 4 Requirements/In the Lab The purpose of this lab is to get familiar with the equipment and to build and test several combinational circuits, and get a sense of how to debug circuits that don’t work. 3
  • 4. 4.1 Equipment Familiarization Read through Section 2 of this handout, and test your equipment as indicated in that section. Make sure you know how all this stuff works; you will be using it heavily in this course, and we’re likely to put questions about it on midterms and exams. 4.2 Building, Testing and Debugging Circuits • For each of the logic functions you designed in the preparation, build the circuit on the proto-board using TTL chips which are available in the lab. Use wires connected to the +5 Volt and/or 0 Volt to act as switches for your inputs and LED’s or probe to act as output. Use a RED wire to connect your circuit to VCC (i.e 5 volt supply), a BLACK wire to connect the circuit to GROUND, GREEN wires for inputs, YELLOW wires to make your connections between ICs. Remember to hook up the power! Show your teaching assistant that each circuit works correctly once it does. • Once the final circuit is working, the teaching assistant will break your circuit by inserting a faulty wire or component or doing something nasty. You are required to determine what the cause of the non-function is. To do this you must show concrete proof of the cause. How do you do that? 4.3 Report When completed, you will hand in the following in your report: 1. Your Group #, and Names 2. Title Page 3. Explain how you implemented each circuit by providing the truth table and logic function. 4. Draw your circuit. 5. Any future recommendation for current lab will be appreciated. 4