1.
 Introduction
 Specifications
 Memory Handling
 Processor registers
 Core i5 Cache Memory
 AdvancedTechnologies
 Conclusion

2.
 Core i5 is using the Ivy Bridge microarchitecture.
 Ivy Bridge is the codename for an Intel microprocessor
using the Sandy Bridge microarchitecture.
 Ivy Bridge uses a 22 nanometer process.The Ivy
Bridge die shrink, known in the IntelTick-Tock model
as the "tick", is based on 3D tri-gate transistors. Intel
demonstrated Ivy Bridge processors in 2011.

3.
Status Launched
Launch Date Q2'12
Processor Number i5-3550S
# of Cores 4
# ofThreads 4
Clock Speed 3 GHz
MaxTurbo Frequency 3.7 GHz
Intel® Smart Cache 6 MB
Bus/Core Ratio 30
DMI 5 GT/s
Instruction Set 64-bit
Instruction Set Extensions SSE4.1/4.2,AVX
EmbeddedOptionsAvailable Yes
Lithography 22 nm

4.
Memory Specifications
Max Memory Size (dependent on
memory type)
32 GB
MemoryTypes DDR3-1333/1600
# of Memory Channels 2
Max Memory Bandwidth 25.6 GB/s
ECC Memory Supported No

5.
Graphics Specifications
ProcessorGraphics Intel® HD Graphics 2500
Graphics Base Frequency 650 MHz
Graphics Max Dynamic Frequency 1.15 GHz
Intel®Quick SyncVideo Yes
Intel® InTru™ 3DTechnology Yes
Intel® Insider™ Yes
Intel®Wireless Display Yes
Intel® Flexible Display Interface (Intel®
FDI)
Yes
Intel®ClearVideo HDTechnology Yes
# of Displays Supported 3

6.
AdvancedTechnologies
Intel®Turbo BoostTechnology 2.0
Intel® vProTechnology Yes
Intel® Hyper-ThreadingTechnology No
Intel®VirtualizationTechnology (VT-x) Yes
Intel®VirtualizationTechnology for
Directed I/O (VT-d)
Yes
Intel®Trusted ExecutionTechnology Yes
AES New Instructions Yes
Intel® 64 Yes
Intel®Anti-TheftTechnology Yes
Idle States Yes
Enhanced Intel SpeedStep®Technology Yes
Thermal MonitoringTechnologies Yes
Execute Disable Bit Yes
Intel®VT-x with Extended PageTables
(EPT)
Yes

7.
 PEG port upper pre-fetchable base/limit
registers.This allows the PEG unit to claim
I/O accesses above 32 bit.
 Addressing of greater than 4 GB is allowed on
either the DMI Interface or PCI Express*
(PCIe*) interface.
 The processor supports a maximum of 32 GB
of DRAM. No DRAM memory will be
accessible above 32 GB.

8.
 Processor contains more than 430 registers.
 PCI Device 0 Function 0 Configuration Space Registers.
 PCI Device 1 Function 0–2 Configuration Space Registers.
 PCI Device 1 Function 0–2 Extended Configuration Registers.
 PCI Device 2 Configuration Space Registers.
 Device 2 IO Registers.
 PCI Device 6 Registers.
 PCI Device 6 Extended Configuration Registers.
 Direct Media Interface Base Address Registers (DMIBAR).
 MCHBAR Registers in Memory Controller Channel 0 Registers.
 MCHBAR Registers in Memory Controller Channel 1.
 MCHBAR Registers in Memory Controller Integrated Memory Peripheral Hub (IMPH).
 MCHBAR Registers in Memory Controller Common.
 Memory Controller MMIO Registers Broadcast Group Registers.
 Integrated GraphicsVTd Remapping Engine Registers.
 PCU MCHBAR Registers.
 PXPEPBAR Registers.
 Default PEG/DMIVTd Remapping Engine Registers.

9.
 A 32-KB instruction and 32-KB data first-level
cache (L1) for each core
 A 256-KB shared instruction / data second-
level cache (L2) for each core
 Up to 8-MB shared instruction / data third-
level cache (L3), shared among all cores.

10.
 The ring design is
quite simple and has
many advantages:
shortest path, easily
scalable to include
more cores if
required.

11.
Advanced
Technologies
 Makes a single system appear as multiple
independent systems to software.
 This allows multiple, independent
operating systems to run simultaneously
on a single system.
 IntelVirtualizationTechnology for
Directed I/O (IntelVT-d) adds chipset
hardware implementation to support and
improve I/O virtualization performance
and robustness.
Intel®Virtualization
Technology (VT-x)
Intel®Virtualization
Technology for Directed
I/O (VT-d)

12.
Advanced
Technologies
 Defines platform-level enhancements that
provide the building blocks for creating
trusted platforms.
 provide the authenticity of the controlling
environment such that those wishing to rely on
the platform can make an appropriate trust
decision.
 determines the identity of the controlling
environment by accurately measuring and
verifying the controlling software.
Intel®Trusted Execution
Technology

13.
Advanced
Technologies
Intel®Trusted Execution
Technology

14.
Advanced
Technologies
 Allows an execution core to function as
two logical processors.
 While some execution resources such as
caches, execution units, and buses are
shared, each logical processor has its own
architectural state with its own set of
general-purpose registers and control
registers.
 This feature must be enabled using the
BIOS and requires operating system
support.
Intel® Hyper-Threading
Technology*

15.
Advanced
Technologies
 Allows the processor core to
opportunistically and automatically run
faster than its rated operating
frequency/render clock if it is operating
below power, temperature, and current
limits.
 The IntelTurbo BoostTechnology feature
is designed to increase performance of
both multi-threaded and single-threaded
workloads.
Intel®Turbo Boost
Technology

16.
Advanced
Technologies
 is a set of security and manageability
capabilities built into the processor aimed
at addressing four critical areas of IT
security
 Threat management, including protection from
rootkits, viruses, and malware.
 Identity and web site access point protection .
 Confidential personal and business data
protection.
 Remote and local monitoring, remediation, and
repair of PCs and workstations.
Intel® vProTechnology

17.
Advanced
Technologies
 Intel® 64 architecture delivers 64-bit
computing on server, workstation,
desktop and mobile platforms when
combined with supporting software.
 Intel 64 architecture improves
performance by allowing systems to
address more than 4 GB of both virtual
and physical memory.
Intel® 64

18.
Advanced
Technologies
 Intel® Anti-TheftTechnology (Intel® AT)
helps keep your laptop safe and secure in
the event that it’s ever lost or stolen.
Intel® AT requires a service subscription
from an Intel® AT–enabled service
provider.
 Detects device theft
 Locks down lost device
 Restores operation easily
Intel®Anti-Theft
Technology

19.
Advanced
Technologies
 The latest expansion of the Intel
instruction set.
 It extends the Intel Streaming SIMD
Extensions (Intel SSE) from 128-bit
vectors to 256-bit vectors.
 Intel AVX addresses the continued need
for vector floating-point performance in
mainstream scientific and engineering
numerical applications, visual
processing, recognition, data-
mining/synthesis, gaming, physics, crypto
graphy and other application areas.
Intel®AdvancedVector
Extensions

20.
Intel®Advanced
Vector Extensions
Intel AVX introduces
support for 256-bit wide
SIMD registers (YMM0-
YMM7 in operating modes
that are 32-bit or
less,YMM0-YMM15 in 64-
bit mode).The lower 128-
bits of theYMM registers
are aliased to the
respective 128-bit
XMM registers.

21.
Advanced
Technologies
 A set of Single Instruction Multiple Data
(SIMD) instructions that enable fast and
secure data encryption and decryption based
on the Advanced Encryption Standard (AES).
 IntelAES-NI are valuable for a wide range of
cryptographic applications, for example:
applications that perform bulk
encryption/decryption, authentication,
random number generation, and
authenticated encryption.
 AES is broadly accepted as the standard for
both government and industry applications,
and is widely deployed in various protocols.
Intel®Advanced
Encryption Standard
New Instructions
(Intel®AES-NI)

22.
Advanced
Technologies
 AES-NI consists of six Intel SSE
instructions. Four instructions, namely
AESENC, AESENCLAST, AESDEC, and
AESDELAST facilitate high performance
AES encryption and decryption.
 AESIMC and AESKEYGENASSIST, support
the AES key expansion procedure.
Intel®Advanced
Encryption Standard
New Instructions
(Intel®AES-NI)

23.
Advanced
Technologies
 Allows memory to be marked as executable or non-
executable, when combined with a supporting operating
system. If code attempts to run in non-executable
memory the processor raises an error to the operating
system.This feature can prevent some classes of viruses
or worms that exploit buffer overrun vulnerabilities and
can thus help improve the overall security of the system.
Execute Disable Bit

24.
 Core i5-3550S is built over Ivy bridge
microarchitecture.
 Processor supporting L3 cache memory.
 Most of Intel latest technologies are
supported like Anti-Seft,Vpro and
Virtualizations.

25.
 http://en.wikipedia.org/wiki/Intel_Core#Core_i5
 http://en.wikipedia.org/wiki/Ivy_Bridge_%28mic
roarchitecture%29
 http://ark.intel.com/products/65518/Intel-Core-
i5-3550S-Processor-6M-Cache-up-to-3_70-GHz
 http://en.wikipedia.org/wiki/Microarchitecture
 http://www.behardware.com/articles/863-1/ivy-
bridge-22nm-review-intel-core-i7-3770k-and-i5-
3570k.html