Hskja

1. Direct memory Access
• DMA is an abbreviation of direct memory access.
• DMA is a method of data transfer between main memory and
peripheral devices.
• The hardware unit that controls the DMA transfer is a OMA
controller.
• DMA controller transfers the data to and from memory without
the participation of the processor.

2. CPU
-------.--------
llendaddc uaaoA
•
I
I
I
I
I
I
I
I
eouroe end deatlnaUon t----+----t
endnumbwoAbylas
lotrac...,
OMA
Acknowledge
Requeat bus
NOllfyCPua,
CDfttpll■u,

3. • The processor provides the start address and the word
count of the data block which is transferred to or from
memory to the DMA controller and frees the bus for DMA
controller to transfer the block of data.
• DMA controller transfers the data block at the faster rate as
data is directly accessed by 1/0 devices and is not required
to pass through the processor which save the clock cycles.

4. OMA Block diagram
- - ,~ ---,
' ' '
,
RD WR RS DS -
-
Data Data Address Control
counter register register logic
. BG BR INTR
.,
,._;"' ~
OMA
HLDA HOLD
Processor -
-
DMAREQ
-
-
DMAACK
INTR
.
'
1/0device&
0 1
a
D ta~ I
a
Addressbos
nlrolbus
Co

5. • OMA controller transfers the block of data to and from memory
in three modes
• Single transfer mode
• Block transfer mode
• Demand or burst transfer mode
• OMA can be configured in various ways it can be a part of
individual 1/0 devices, or all the peripherals attached to the
system may share the same OMA controller.

6. FIGURE Three methods (MODES) ofDMA
ooeratlon: (a) bvte: (b) burst: (c) block.
Rc111c,t
tootnil uf
')~cm
t,,.1,c,
'lrun,rcr
IIIK' h)IC'
Rchn4uih
con1ml1u
m11:n,pru.:a,or
( 0)
Rcquc,1
c11n1111I ol
,y,tcm
1-<u,c)
lr.in,lcr
one h)h:
Rclinqu1-h
control 10
m1croprocc,~
(b)
Rcc1uc,1
control ol
•)•IC'ttl
t>t1,c,
fr11n,tcr
ClllC h)IC
(c)