1. Spring 2020 (Online Learning)
EEE324 - Digital Signal Processing
Lecture 2: Practical A/D Converters And D/A Converters
Department of Electrical and Computer Engineering
COMSATS University Islamabad, Lahore Campus

2. Resources
Textbook
• Digital Signal Processing: Principles, Algorithms and Applications by John G. Proakis and Dimitris K Manolakis
(P&M)
Reference Books
• Discrete-Time Signal Processing by Alan V. Oppenheim, Ronald. W. Schafer, Pearson Education (OS)
• Digital Signal Processing: A Computer-based approach by Sanjit K. Mitra, McGraw-Hill Science (SKM)
• Signals and Systems by Alan V. Oppenheim, Alan S. Willsky and with S. Hamid (OW&N)
Reading Material
• Chapter 6 – Sect. 6.3 of Proakis & Manolakis

3. Course Contents
Review of Signals & Systems Concepts, Introduction to DSP Theory and Applications, A/D and
D/A Signal Transformation, Sampling & Quantization of Signals, Digital Signals in Time and
Frequency Domains, Discrete Fourier Transform and Fast Fourier Transform, Circular
Convolution & Methods of Linear Filtering, Discrete Time LTI Systems, LTI Systems Analysis in
Time and Frequency Domain and its Stability, z-Transform, Unilateral z-Transform, Digital Filters,
Ideal and Practical Digital Filters, Finite Impulse Response (FIR) Filters, Infinite Impulse
Response (IIR) Filters, Realization of Digital Filters, DSP Algorithms and their Implementation
Issues, DSP Processors, DSP Applications

4. Course Learning Outcomes (CLOs)
1. Apply all the concepts of the signal and systems, their mathematical description/ representation and
transformations in discrete domain to understand and analyze discrete time LTI systems. (PLO1-C3)
2. Analyze the discrete systems using Fast Fourier Transform (FFT) and filter realization techniques for
discrete time signal processing. (PLO2-C4)
3. Design the digital filter using analog and digital techniques for discrete time signal processing (PLO3-
C5)
4. Manipulate the concepts of digital signal processing using software and hardware tools. (PLO5-P5)
5. Explain the concepts of digital signal processing by justifying the lab experiments performed using
software and hardware tools. (PLO10-A4)
6. Demonstrate the concepts of digital signal processing by completing the lab tasks through effective
individual and team work. (PLO9-A3)

5. Course Breakdown
Weeks
Topic CLO Bloom
Taxonomy
Specific Outcome Contact
Hours
Students
Learning
Hours
Assessment
1.5
Review of Concepts of Signals and
Systems
CLO1 C3
Apply signals and systems concepts to
comprehend digital signal processing
4.5 8
Quiz 1, Assignment 1, S-I,
Terminal
1.5
Time Domain Analysis of Discrete Time
LTI Systems
CLO1 C3
Analyze the discrete time LTI systems using
time domain techniques to learn digital signal
processing
4.5 8
Quiz 1, Assignment 1, S-I,
Terminal
4 LTI systems in Transform Domain CLO1 C3
Apply the transform domain techniques to
analyze LTI systems
12 36
Quiz 1, Assignment 1, SI,
Terminal
1
Sampling and Reconstruction of Signal in
time and frequency Domain
CLO1 C3
Apply time and frequency domain techniques
for sampling and reconstruction of signals
3 7 Assignment 2, S-II, Terminal
3 Implementation of DFT and FFT CLO2 C4
Demonstrate the discrete time signals by
implementing DFT and FFT
9 20
Quiz 2, Assignment 2, S-II,
Terminal
1
Filter Structures using Filter Realization
Techniques
CLO2 C4
Demonstrate the filter realization techniques to
sketch and analyze the filter structures
3 7 Quiz 3, Assignment 3, Terminal
3 Filter Design Techniques CLO3 C5
Design digital filters for DSP using filter
design techniques
9 20 Quiz 4, Assignment 4, Terminal

6. Lecture Outline
• Practical Analog-to-Digital Converter
• Ideal Quantization Operation
• Ideal Quantization Adds Noise
• Ideal Quantization Noise Model
• Ideal Quantization Noise PSD
• Ideal ADC SNR
• Non-Ideal ADC Error Sources

7. ADC
D-T
DAC
x(t)
C-T
Signal
x[n]
Signal
Clock
x̂(t)
C-T
Signal
Now that we have the basic theory for ideal sampling… How do real
ADCs and DACs work?? What are the important aspects to take into
account?
The first step was to see that this is possible:
Can we recover the signal from its ideal samples???!!!
Quantization issues in the ADCs
Sample-and-Hold issues in the DACs

8. Practical Analog-to-Digital Converter
Quantizer
Stream of
binary words
ADC t
xq[n]
t
x(t)
b bit
Binary
Words

9. Ideal Quantization Operation
• An ADC’s number of bits sets the number of levels
– Let b = # of bits used to represent a level
– There will be 2b quantizationlevels
• Each level = (integer)
– where  = ADC “resolution” or “step size”
• Sampled analog value converted to closest quantization level
– xq= round(x/)
t
–
–
4
3
2

xq[n]
–
2
3
Ideal ADC Specs
• Full-Scale Voltage:Vmax
• Number of bits: b
• Resolution:  = 2Vmax / 2b
• Dynamic Range (DR)
• Signal-to-Noise Ratio (SNR)

10. Dynamic Range of Ideal ADC
• DR = (Power of Max Signal) / (Power of Min Signal)
– Max Signal = Sinewave with Amplitude of Full Scale
– Min Signal = Smallest Sinewave That Can Change LSB = /2
Signal Just Below Min Signal
t

/2
–/2
–
8
2
2

max 
22b 2
2b 2
2
V 2
Pmax 
2
8

22
2
min 
2
V 2
Pmin 
(dB)
max
P
P
 6.02b



10


2 8
22b 2 8
10log


10
 min 

DR 10log
6 dB of DR per Bit
b DR
8 48 dB
10 60 dB
12 72 dB
14 84 dB
16 96 dB

11. Ideal Quantization Adds Noise
• Quantized Signal = Original + Noise
t
–
–
4
3
2

xq[k] |error|  /2
–
2
3
t
eq[k] = xq[k] – x[k]
/2
–/2
xq[k]  x[k] eq[k]

12. • Assume that “error then” does not affect “error now”
– Error is “uncorrelated”… aka “white noise”
– PSD is flat (“white”) Sq( f ) = No
Ideal Quantization Noise Model
error
-/2 /2
• Need a Statistical Model
– Prob. Density Function (PDF)
– Power Spectral Density (PSD) / Auto-Correlation Function (ACF)
• Assume that no error value is more likely than others
– PDF = Uniformly Distributed: U[–/2, /2]
Histogram
of Error

13. Ideal Quantization Noise PSD
-5 -4 -3 -2 -1 2 3 4 5
-40
0
-10
-20
-30
0 1
Frequency (kHz)
|DFT|
(dB)
-5 -4 -3 -2 -1 2 3 4 5
-40
0
-10
-20
-30
0 1
Frequency (kHz)
|DFT|
(dB)
PSD w/o Quantization
PSD w/ 5 Bit Quantization
Signal = 3 Sines

14. Ideal ADC SNR
• Signal-to-Noise Ratio (SNR)
– SNRADC = (Signal Power) / (Quant Noise Power)
• Uniform Quantization Noise: U[–/2, /2]
– So Noise Power is….
• ADC Specs usually give SNR for “Full-Scale” Sinewave
 
2
q q
2
12
P  E e [k]  e2
(1/ ) de 
/2

/2
8
2
2

max 
22b 2
2b 2
2
V 2
Pmax 
b
q
P
3
Pmax
 2 4
2 12

22b 82

SNRADC,max 
SNRADC,max (dB)  6.02b 1.76

15. • SNRADC,max is only for Full-Scale and Sinusoid
– For other cases:
– where C depends on Signal Level and Signal’s Peak Factor(PF)
• Peak Factor = (Signal Peak Value) / (Signal RMS)
Low PF Signal High PF Signal
Ideal ADC SNR & Peak Factor
SNRADC (dB)  6.02b C where C 1.76 dB
t t

16. -21 -18 -15 -12 -9
Peak Factor (dB)
-6 -3
20
10
30
60
50
40
90
80
70
14 bits
12 bits
10 bits
8 bits
6 bits
Note: For Full-Scale Signals Only
Max. Result
SNR
ADC
(dB)
Max. Peak Factor
Impact of PF on Ideal ADC SNR

17. • Nonlinearities
– Nonlinear Relationship Between Input/Output Levels
• Aperture Jitter
Non-Ideal ADC Error Sources
-1 -0.5 0 0.5 1
-1
1
0.5
0
-0.5
Input Value
Output
Value
– Variations in Sample Times (aren’t sampling on a regular time grid)
• Missing Output Code
– A Binary Code that Never Shows Up Regardless of InputValue
These Errors Cause:
Spurs in the Frequency Domain
Increase in the SNRADC 12/19

18. -5 -4 -3 -2 2 3 4 5
-40
-35
-15
-20
-25
-30
-10
0
-5
-1 0 1
Frequency (kHz)
|DFT|
(dB)
Signal Spikes
Spurs
Noise Floor
SFDR
Effect of Non-Ideal Error Sources

19. These are common definitions – BUT check the data sheet!
• Signal-to-Noise Ratio (SNR)
– Ratio of Fundamental Sinusoid Power to Total Noise Power
– Power of Spurs is Excluded
• Signal-to-Noise-and-Distortion Ratio (SINAD)
– Ratio of Fundamental Sinusoid Power to Total Noise and Distortion Power
– Power of Spurs is Included
• Effective Number of Bits (ENOB)
– # of Bits for an Ideal ADC whose Theoretical SNRADC = SINAD ofDevice
• Spurious-Free Dynamic Range (SFDR)
– Ratio of Fundamental Sinusoid Power to Largest Spur’s Power
Specifications for Practical ADCs
ENOB 
SINAD  1.76
6.02