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Adding Eventdev support in
ipsec-gw application
Hemant Agrawal (NXP)
Akhil Goyal (NXP)
DPDK Userspace - 2019
• Overview
• Cryptodev
• Event Crypto Adapter
• Crypto Event Adapter Processing Example
• Proposed changes in IPSEC event Gateway
3
CRYPTODEV
• A framework for processing
symmetric and asymmetric crypto
workload.
• Provides a standard API supporting
transparent crypto processing for all
vendors of crypto(SW/HW) PMD.
• Poll mode driver infrastructure with
the recent addition of event mode
support.
• User can choose to use any
combination of software/hardware
PMD and schedule work between
them
User Application
Device management
Device Capabilities
Queue Pair
Management
Symmetric session
management
Asymmetric session
management
Operation processing
(Enqueue/Dequeue)
DPDK CRYPTODEV API COMPONENTS
Device Statistics
x86
Libraries
OPENSSL
DPAA2_SEC
DPAA_SEC QAT AESNI-MBARMv8SCHEDULERCCP
CAAM_JR
NXP
Hardware
ARM
libraries
Marvell
Hardware
Libsso
lib
AMD
Hard
ware
Intel
ware
Intel
Hard
ware
CRYPTO PMDs
OCTEONTX
MVSAM
4
event driven model
Flow 0
Flow 1
Flow n
Event Queue 0
Flow 0
Flow 1
Flow n
Event Queue 1
Flow 0
Flow 1
Flow n
Event Queue n
Event
Port 0
Event
Port 1
Event
Port 2
Event
Port n
Core 0
Core 1
Core 2
Core n
Rx Packet
event
An Event device
Crypto
completion
event
Timer expiry
event
Event from Devices
Core(SW)
event
Enqueue(queue, flow,
schedule_type, event)
Link(queue, port)
{queue, flow,
schedule_type, event}
= Dequeue(port)
5
Event Crypto Adapter
• Poll mode drivers means individual queue polling and 100% CPU utilization
irrespective of amount of traffic being processed.
• Event based processing can work with ‘n’ queue’
• Event Port with Interrupt mode – no more wasted CPU cycles 
• Each accelerator (Ethernet, Crypto, Timer etc) needs event adapter to connect eventdev
• Event crypto adapter adapts the crypto queues to work for event framework
• All crypto queues can be assigned to event device (hardware/ software scheduler)
• Event device schedule the traffic to multiple queues
• Support ordered, atomic and parallel queues
• Reduces CPU utilization when traffic is low
• Better utilization of hardware resources
6
Event Crypto Adapter processing
7
Crypto Adapter Example for NXP DPAA2 Platform
eth-DPNI
eth-DPNI
DPSECI
DPIODPIO
eth-DPNI
DPCONC
while(1) {
wait_for_event()
dequeue();
process work;
…
enqueue();
}
while(1) {
wait_for_event()
dequeue();
process work;
…
enqueue();
}
Q
Q
Q
Q
EventDev
EventQueueEventQueue
Order preservation
(atomic)
Order restoration
(ordered)
Crypto
Engine
(SEC)
Q
Q
Port 1
Port 2
Port 3
DPAA queuing &
scheduling
Q
Q
8
IPSEC-SECGW *Sample* Application
• Provide a L3 application for IPSEC forwarding
• Security Policies(SP) and Security
Associations(SA) are manually configured using
a cfg file.
• SPs are implemented as ACL rules
• SAs are stored in a table
• Routing is implemented using LPM
• Support all security acceleration modes.
• Support with and without IPSEC library
• Works well with both hardware and software
devices
9
Design principle for event in IPSec-secgw
Limitation in current design
• Synchronous Design
• Crypto enqueue/dequeue APIs are
defined to be used asynchronously
but is getting used synchronously in
the same thread.
• Hardware crypto PMD may work
slower on synchronous jobs – hence
wasting cycles for empty dequeues
• Continuous polling on the
ethernet/crypto dev for dequeue
• No free CPU
Where event can help
• When All (cryptodev/ethdev) queues are
assigned to an eventdev, and we do
dequeue from event device,
• Segregate crypto/eth packets based on
event type
• Able to process both crypto and ethernet
packets
• So no more synchronous processing. 
• If the underneath Event PMD support
interrupt mode, dequeue will happen only
in case packets are available.
• Free CPU at low traffic rates.
10
Proposed Changes
• Attach all crypto/ethernet queue to event device
• From Each thread, Instead of dequeue from ethernet/crypto
device, dequeue from event device
• Segregate packets from ethernet/crypto queues based on event type
• Packets from Crypto queues -> enqueue to ethernet device
• Inbound packets will be plain packet
• Outbound packets will be ESP packets
• Packets from Ethernet queues -> enqueue to crypto device
• Inbound packets will be ESP packet coming for decryption
• Outbound packets will be Plain packets for Encryption.
11
Proposed Execution changes
From each
lcore thread
Eth-EnqueueEth-dequeue Find SA Crypto-Enqueue Crypto-Dequeue Find Route
From each
lcore thread
Event-dequeue Event
type
Crypto
Eth
Next
Header
type
Next
header
type
ESP
Outbound
pre-
processing
Crypto-Enqueue
Non-ESP
Inbound
pre-
processing
Inbound
post-
processing
Eth-Enqueue
Non-ESP
Outbound
post-
processing
ESP
Existing Model
Event Driven Model
12
Challenges and Mitigation
• Target is for 20.02.
• Plan to send RFC in 19.11 timeframe
• Main challenge is to co-exist with various crypto/security modes in the
app.
• Packet re-ordering
• Use Atomic queues (for order preservation)
• Use ordered queues (for order restoration) depending on available support in
PMD
• Cannot hold packets at any point to wait for next iteration
• Process all packets from a burst and enqueue to next stage(crypto/eth) in the
same context.
Questions?
Hemant Agrawal
<hemant.agrawal@nxp.com>
Akhil Goyal
<akhil.goyal@nxp.com>
14
Supported_processing_modes
NIC
L2
Application
L3
librte_ipsec
cryptodev
Crypto
Accelerator
NET PMD HW CRYPTO PMD
ethdev
NIC
L2
Application
L3
librte_ipsec
cryptodev
lcore
NET PMD SW CRYPTO PMD
ethdev
Lookaside Hardware
Crypto Processing
Core based Crypto
Processing
SmartNIC
L2
Application
L3
librte_ipsec
NET PMD
ethdev/flow/security
SADB
crypto
IO based Inline
Crypto Processing
NIC
L2
Application
L3
Security
cryptodev
Crypto
Accelerator
NET PMD HW CRYPTO PMD
ethdev
Lookaside Hardware
Security Processing
lib_ipsec
15
IPSEC - Encrypt Packet Processing
Packet Received
Flow and SPD/SA
Lookup
Pre-Protocol
Processing
•Sequence Number
•Random IV
generation
•Block Cipher
Padding
•Tunnel Header
Preparations
(TOS/ECN/DF etc)
Crypto Processing
•Encryption
•Authentication
Post-Protocol
Processing
IP Header
Addition
L2 process
and
transmission
Lookaside Acceleration

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Dpdk 2019-ipsec-eventdev

  • 1. x Adding Eventdev support in ipsec-gw application Hemant Agrawal (NXP) Akhil Goyal (NXP) DPDK Userspace - 2019
  • 2. • Overview • Cryptodev • Event Crypto Adapter • Crypto Event Adapter Processing Example • Proposed changes in IPSEC event Gateway
  • 3. 3 CRYPTODEV • A framework for processing symmetric and asymmetric crypto workload. • Provides a standard API supporting transparent crypto processing for all vendors of crypto(SW/HW) PMD. • Poll mode driver infrastructure with the recent addition of event mode support. • User can choose to use any combination of software/hardware PMD and schedule work between them User Application Device management Device Capabilities Queue Pair Management Symmetric session management Asymmetric session management Operation processing (Enqueue/Dequeue) DPDK CRYPTODEV API COMPONENTS Device Statistics x86 Libraries OPENSSL DPAA2_SEC DPAA_SEC QAT AESNI-MBARMv8SCHEDULERCCP CAAM_JR NXP Hardware ARM libraries Marvell Hardware Libsso lib AMD Hard ware Intel ware Intel Hard ware CRYPTO PMDs OCTEONTX MVSAM
  • 4. 4 event driven model Flow 0 Flow 1 Flow n Event Queue 0 Flow 0 Flow 1 Flow n Event Queue 1 Flow 0 Flow 1 Flow n Event Queue n Event Port 0 Event Port 1 Event Port 2 Event Port n Core 0 Core 1 Core 2 Core n Rx Packet event An Event device Crypto completion event Timer expiry event Event from Devices Core(SW) event Enqueue(queue, flow, schedule_type, event) Link(queue, port) {queue, flow, schedule_type, event} = Dequeue(port)
  • 5. 5 Event Crypto Adapter • Poll mode drivers means individual queue polling and 100% CPU utilization irrespective of amount of traffic being processed. • Event based processing can work with ‘n’ queue’ • Event Port with Interrupt mode – no more wasted CPU cycles  • Each accelerator (Ethernet, Crypto, Timer etc) needs event adapter to connect eventdev • Event crypto adapter adapts the crypto queues to work for event framework • All crypto queues can be assigned to event device (hardware/ software scheduler) • Event device schedule the traffic to multiple queues • Support ordered, atomic and parallel queues • Reduces CPU utilization when traffic is low • Better utilization of hardware resources
  • 7. 7 Crypto Adapter Example for NXP DPAA2 Platform eth-DPNI eth-DPNI DPSECI DPIODPIO eth-DPNI DPCONC while(1) { wait_for_event() dequeue(); process work; … enqueue(); } while(1) { wait_for_event() dequeue(); process work; … enqueue(); } Q Q Q Q EventDev EventQueueEventQueue Order preservation (atomic) Order restoration (ordered) Crypto Engine (SEC) Q Q Port 1 Port 2 Port 3 DPAA queuing & scheduling Q Q
  • 8. 8 IPSEC-SECGW *Sample* Application • Provide a L3 application for IPSEC forwarding • Security Policies(SP) and Security Associations(SA) are manually configured using a cfg file. • SPs are implemented as ACL rules • SAs are stored in a table • Routing is implemented using LPM • Support all security acceleration modes. • Support with and without IPSEC library • Works well with both hardware and software devices
  • 9. 9 Design principle for event in IPSec-secgw Limitation in current design • Synchronous Design • Crypto enqueue/dequeue APIs are defined to be used asynchronously but is getting used synchronously in the same thread. • Hardware crypto PMD may work slower on synchronous jobs – hence wasting cycles for empty dequeues • Continuous polling on the ethernet/crypto dev for dequeue • No free CPU Where event can help • When All (cryptodev/ethdev) queues are assigned to an eventdev, and we do dequeue from event device, • Segregate crypto/eth packets based on event type • Able to process both crypto and ethernet packets • So no more synchronous processing.  • If the underneath Event PMD support interrupt mode, dequeue will happen only in case packets are available. • Free CPU at low traffic rates.
  • 10. 10 Proposed Changes • Attach all crypto/ethernet queue to event device • From Each thread, Instead of dequeue from ethernet/crypto device, dequeue from event device • Segregate packets from ethernet/crypto queues based on event type • Packets from Crypto queues -> enqueue to ethernet device • Inbound packets will be plain packet • Outbound packets will be ESP packets • Packets from Ethernet queues -> enqueue to crypto device • Inbound packets will be ESP packet coming for decryption • Outbound packets will be Plain packets for Encryption.
  • 11. 11 Proposed Execution changes From each lcore thread Eth-EnqueueEth-dequeue Find SA Crypto-Enqueue Crypto-Dequeue Find Route From each lcore thread Event-dequeue Event type Crypto Eth Next Header type Next header type ESP Outbound pre- processing Crypto-Enqueue Non-ESP Inbound pre- processing Inbound post- processing Eth-Enqueue Non-ESP Outbound post- processing ESP Existing Model Event Driven Model
  • 12. 12 Challenges and Mitigation • Target is for 20.02. • Plan to send RFC in 19.11 timeframe • Main challenge is to co-exist with various crypto/security modes in the app. • Packet re-ordering • Use Atomic queues (for order preservation) • Use ordered queues (for order restoration) depending on available support in PMD • Cannot hold packets at any point to wait for next iteration • Process all packets from a burst and enqueue to next stage(crypto/eth) in the same context.
  • 14. 14 Supported_processing_modes NIC L2 Application L3 librte_ipsec cryptodev Crypto Accelerator NET PMD HW CRYPTO PMD ethdev NIC L2 Application L3 librte_ipsec cryptodev lcore NET PMD SW CRYPTO PMD ethdev Lookaside Hardware Crypto Processing Core based Crypto Processing SmartNIC L2 Application L3 librte_ipsec NET PMD ethdev/flow/security SADB crypto IO based Inline Crypto Processing NIC L2 Application L3 Security cryptodev Crypto Accelerator NET PMD HW CRYPTO PMD ethdev Lookaside Hardware Security Processing lib_ipsec
  • 15. 15 IPSEC - Encrypt Packet Processing Packet Received Flow and SPD/SA Lookup Pre-Protocol Processing •Sequence Number •Random IV generation •Block Cipher Padding •Tunnel Header Preparations (TOS/ECN/DF etc) Crypto Processing •Encryption •Authentication Post-Protocol Processing IP Header Addition L2 process and transmission Lookaside Acceleration