1. Ph.no 9886740211
eMail:Prasad.meduri@gmail.com
IN pMeduri
Prasad Meduri
Objective
To work for an organization where professionalism and enthusiasm are recognized and to continuously
acquire skills in emerging trends.
Core Skills Summary
 8+ years of cumulative Quality Assurance cum testing-specific experience
collaboratively working with testers, developers in testing complex projects and in the
overall enhancement of software product quality.
 3 years of project coordination and academic coordination to cater trainee needs in
various software technologies in the education and training division of the company.
Areas of Expertise
 Involvement in visual inspection and voltage measurement of the boards before taking them up for
functional validations.
 Board bring up, debugging and peripheral tests like multiple LAN ports, USB ports, GPIOs and
various UARTs etc..
 Configuring the IP Encryptors in L2/L3/L4 independent networks and test for the data integrity
 configuring the systems in Bridge Mode and Route Modes
 Configuring & working with applications for TCP/UDP file transfers like FTP, TFTP, VLC
Streaming, windows Net Meeting, HTTP Tests
 Configuration of the IP based devices: Routers & VOIP interfaces
 Exposure to network management tools (Wireshark, Ethereal) and throughput measurement analysis
in network based projects
 Manual Testing on (Windows, Linux) Client - Server & Embedded Interfaces board level & general
Integration
 Subject units to Burn-in ( keep the unit in power on condition continuously for longer duration >=72
hours) , Verify the preliminary tests post Burn-In.
 Exposure to shell scripting on Linux
 Performance Tests like checking the unit behavior by repeatedly executing the critical tests one after
the other for longer duration.
 Test automation for Windows Graphical User Interfaces (GUI ) using VB-Script & QTP
 Test Management using Quality Center
 Troubleshooting Windows OS flavors
 Exposure to Rational Clear Quest & Clear Case, WinCVS for Bug Tracking & Version Controlling
 Client Interactions & Communication
 Involvement in Internal Audits along with the Quality Manager for constantly monitoring the quality
standards followed in the organization.
Qualification
1. Graduation: B.Sc. from Andhra University.
2. Professional: MCA from University of Madras.
3. Post Graduate Diploma in Computer Methods.
4. Technical: HDSE from APTECH Computers.
Employment History
 Dexcel Electronics Designs Pvt Ltd, Bangalore, India (Sept. 2005 - Till date)

2. Ph.no 9886740211
eMail:Prasad.meduri@gmail.com
IN pMeduri
 Astrix Systems Pvt Ltd, Hyderabad, India (Mar 2004 to Aug. 2005)
 RAM Informatics Ltd, Hyderabad, India (Jul 2002 to Mar 2004)
 RAMInfo, E&T Division of RAM Informatics Ltd, Hyderabad, India (Jul 2000 to Jul 2002)
Project Details
#1.IP Encryptor: v3.0 for 10/100/1000 Networks
Mar 2011– Till date
IP-Encryptor product is used in areas where security is a criteria for the networks defined over the TCP/IP
standard. The IP-Encryptor unit would act like a crypto switch/gateway where its LAN port receives plain
IP packets and an encrypted version of this IP packet is getting forwarded to its WAN network.
Security, a critical feature in today’s networks, enables secure transactions for any organization commercial
or defense to communicate between two or more independent transacting parties. Network security also
enables sharing data across different global locations. To address such issues in today’s IP world, Dexcel
has designed Gigabit IP Processor, which will be a part of Gigabit IP Encryptor.
IP Encryptor v3.0 is an FPGA based embedded solution designed by Dexcel designs. The device runs on
Xilinx Zynx-7000 SoC device. The Complete solution consists of the main processor card and two
dedicated child-cards I.e Encryption Card and Decryption Card.
Responsibilities
1) Preparation / review of Test Plan & Test case documents
2) Configuring the system and performing the detailed functional tests in Layer 2 mode , Transport
Mode and Tunnel Mode
3) Verifying the applications FTP, VLC Streaming, HTTP tests and VOIP device tests in the LAN /
WAN networks for TCP / UDP compliance.
4) Perform Network to Network tests by making necessary Router settings.
5) Configure Tunnels and perform all the functional tests in the Live Networks.
6) Configuring Custom IP – Filters.
7) Validate the data transfer over the network by installing a sniffer PC.
8) Utilize the MIB browser for viewing the SNMP results and V3 traps.
9) Make sure that the device is working fine by subjecting it to overnight tests for data transfer end to
end.
10) Involve with Project Manager to schedule the Testing Activities. Involve in client demos and
understand the client setups. Test Execution, bug reporting & Analysis.
11) Closely work with the development team during Unit testing stages to meet the requirements and
modify the test documents.
#2.IP Encryptor: v1.0/2.0 for 10/100 Networks
Mar 2009– Mar 2011
IP-Encryptor product is used in areas where security is a criteria for the networks defined over the TCP/IP
standard. The IP-Encryptor unit would act like a crypto switch/gateway where its LAN port receives plain
IP packets and an encrypted version of this IP packet is getting forwarded to its WAN network.
IP Encryptor is an FPGA based embedded solution designed by Dexcel designs. The device runs on Altera
Stratix III FPGA for programming the hardware device files and NIOSII processor for JTAG programming.
System Software consists of Boot loader and OS-less flash binary.
Responsibilities
1) Preparation / review of Test Plan & Test case documents

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2) Configuring the system and performing the detailed functional tests in Layer 2 mode , Transport
Mode and Tunnel Mode
3) Verifying the applications FTP, VLC Streaming, HTTP tests and VOIP device tests in the LAN /
WAN networks for TCP / UDP compliance.
4) Validate the data transfer over the network by installing a sniffer PC.
5) Make sure that the device is working fine by subjecting it to overnight tests for data transfer end to
end.
6) Involve with Project Manager to schedule the Testing Activities. Involve in client demos and
understand the client setups. Test Execution, bug reporting & Analysis.
7) Closely work with the development team during Unit testing stages to meet the requirements and
modify the test documents.
#3.Dual Ethernet Controller Card
Mar 2009– Mar 2011
Dual Ethernet Controller Card (DECC) is a generic purpose Controller card with two high speed
( 10/100/1000) Ethernet ports.
DECC board is based on Xilinx Virtex-5 FX series FPGA
which includes the Power PC hardcore IP.
System Software consists of boot loader, Kernel Image and other board support firmware
Responsibilities
1) Preparation / review of Test Plan & Test case documents
2) Configuring the system and performing the detailed functional tests
3) Measuring the device throughput using various data transfer measures.
4) All the peripherals and modules would be tested
5) Make sure that the device is working fine by subjecting it to overnight tests for data transfer end to
end.
#4.ISTRAC –Servo Control Electronics (CE)
ISCE would be used as a sub-system in ISRO’s R&D laboratory area to monitor the RADAR movements
& configure the critical parameters & start the scans.
Hardware interface is on Atmel processor & IO board which interface to various IO lines Initially Board
support package consists of bootloader, Linux image.
The firmware (SysMngr) takes care of the actual data flow from ISCE to various sub modules in the
product like Local PC Graphical User Interface (local GUI), HMI (LCD, Keypad) & the Radar Controller
(RC) which runs on Linux OS
Responsibilities
1) Preparation / review of Test Plan & Test case documents
2) Board inspection, basic peripheral tests
3) Configuring the parameters and starting the scans individually from
HMI, Local GUI & RC
4) Integration Tests on the Servo Unit at regular intervals to analyze the overall system behavior
5) bug reporting & Analysis
.#5.Trusted Platform Module
September 2005 – Sept 2008.
The Embedded Security Chip (widely known as TPM) is the root-of-trust in a given platform (such as on

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IN pMeduri
desktop or notebook computers). If built into a computer that runs an operating system that is aware of this
chip, it can check the system integrity and authenticate third-party users who would like to access the
security features, while remaining under complete control of its primary user. Thus, privacy and
confidentiality are assured. With Embedded Security Chip based platforms, it will be possible for the first
time to create the basis for a world-wide public key infrastructure (PKI). This in turn will ensure the
security of many applications for private and corporate environments in particular, while making other
types of applications possible for the first time.
Responsibilities:
 Involvement in Scheduling of Test Activities
 Test Case design: Involvement in the peer-reviews to check the Test case coverage.
 Synchronize the test case implementation in Quality center with Test scripts in Clear Case by
implementing Test Automation for newly derived test cases with QTP and also the pending test
cases in win runner.
 Test execution and result updating in Test Management Tool (Quality Center).
 Participate in Change Control Board and utilize Rational Clear Quest to manage bugs effectively.
 Regression testing and re-testing activities to confirm the software stability.
#6. eSeva
Jul 2002 – March 2004
Environment: Windows 2000, Javascript, Java, JSP. Back end: Oracle 8.0
The project was developed J2EE technology for the implementation of eSeva Services in the State
of Andhra Pradesh. The eSeva project is developed for twin cities under VISION 2020 for Govt. of AP. for
the Payments of Electricity bills, Telephone bills, and Water bills. The integrated system also provides the
following Services: RTC online reservations, Railway reservation system, Railway inquiries, and MCH
birth and death certification, Municipal Taxes etc…The Project is primarily designed for Twin Cities
(Hyderabad and Secunderabad) only and now is accessible to some districts also for fulfillment of the
above said online facilities of eSeva.
#7.Project Coordinator / Internal Auditor
RAMInfo – E&T Division of Ram Informatics Ltd
July 2000 to July 2002
Responsibilities:
 Coordination with the trainees and the faculty members to ensure effective commencement of
training sessions as per schedule.
 Help/supervise the trainees in the work area/training area regularly.
References
 Narasimha Vedala - Staff Engineer – Infineon Technologies’ Bangalore
Narasimha.vedala@infineon.com
 PS Walia Sr.Project Manager – Dexcel Electronics’ - Bangalore
ps.walia@dexceldesigns.com