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Gernot heiser unsw sydney and se l4 foundation

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RISC-V International
RISC-V International

RISC-V Summit 2020 presentation

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seL4® on RISC-V® Fast, Secure, Open-Source OS Kernel, Proved Bug-Free https://sel4.systems/ Gernot Heiser, UNSW Sydney and seL4 Foundation
The Highlight of the Year 2 RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 08/11/2020 eL4 i eri ed on RISC-V! microkerneld de R G H TAGS open source, operating s stems, risc- , securit 2020/ 06/ 09 Sounds great! But hat does it mean? seL4 ( :// 4. /) (pronounced e -e-ell-fo ) is arguabl the orld s most secure operating s stem (OS) kernel. The OSkernel is the lo est le el of soft are running on a computer s stem. It is the code that e ecutes in pri ileged mode (S-mode in RISC-V; M-mode is reser ed for microcode/ rm are). The kernel is ultimatel responsible for the securit of a computer s stem. seL4 is a microkernel ( :// . . / /M ). The idea of a microkernel is to minimise the ed comp ing ba e the part of the s stem for hich there is no Plan B if it fails. The Linu and Windo s kernels consist of tens of millions of lines of code, and contain literall thousands (more likel tens of thousands) of bugs a huge attack surface. A ell-designed microkernel, such as seL4, has about ten thousand lines inherentl more trust orth ( :// . 61. . / / //B LH 18. ).
Background: What is ? seL4 is an open source, high-assurance, high-performance operating system microkernel Piece of software that runs at the heart of any system and controls all accesses to resources World’s most comprehensive mathematical proofs of correctness and security Available on GitHub under GPLv2 license World’s fastest microkernel hardware software critical non-critical, untrusted attacks RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 3
What is ? seL4 is the most trustworthy foundation for safety- and security-critical systems Already in use across many domains: automotive, aviation, space, defence, critical infrastructure, cyber-physical systems, IoT, industry 4.0, certified security... RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 4
Performance Source seL4 Fiasco.OC Zircon Mi et al, 2019 986 2717 8157 Gu et al, 2020 1450 3057 8151 seL4.systems, Nov’20 797 N/A N/A RISC-V Summit, Dec'20 GERNOT HEISER: SEL4 ON RISC-V 5 Latency (in cycles) of a round-trip cross-address-space IPC on x64 Sources: • Zeyu Mi, Dingji Li, Zihan Yang, Xinran Wang, Haibo Chen: “SkyBridge: Fast and Secure Inter-Process Communication for Microkernels”, EuroSys, April 2020 • Jinyu Gu, Xinyue Wu, Wentai Li, Nian Liu, Zeyu Mi, Yubin Xia, Haibo Chen: “Harmonizing Performance and Isolation in Microkernels with Efficient Intra-kernel Isolation and Communication”, Usenix ATC, June 2020 • seL4 Performance, https://sel4.systems/About/Performance/, accessed 2020-11-08 Temporary performance regression in Dec’19 World’s fastest microkernel!
A few more months for RISC-V Now done for RISC-V! Unique Verification by Mathematical Proof RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 6 Proof Integrity Abstract Model C Imple- mentation Confidentiality Availability Binary code Proof Proof Functional Correctness Translation Correctness Security Enforcement seL4: Still only capability- based OS kernel with correctness proof! seL4: The only OS on RISC-V with correctness proof
What Does This Mean? Kinds of properties proved • Behaviour of C code is fully captured by abstract model • Behaviour of C code is fully captured by executable model • Kernel never fails, behaviour is always well-defined • assertions never fail • will never de-reference null pointer • will never access array out of bounds • cannot be subverted by misformed input • … • All syscalls terminate, reclaiming memory is safe, ... • Well typed references, aligned objects, kernel always mapped… • Access control is decidable 7 GERNOT HEISER: SEL4 ON RISC-V Can prove further properties on abstract level! RISC-V Summit, Dec'20
What Did We LearnAbout RISC-V? RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 8 ISA Kernel functions Kernel code size number relative SLOC relative x86 64-bit 1231 177% 16,655 3.4 Arm v7 (32-bit) 853 122% 14,114 2.8 RISC-V RV64 695 100% 4,977 1.0 Regularity is good! • Regular page-table structure ⇒ simplifies code and proofs • Regularity of ISA ⇒ most kernel code word-size independent • Clock specified in ISA Hopefully IRQ controller as well! ISA Kernel code size (SLOC) common 32-bit 64-bit x86 10,908 3,882 5,747 Arm 7,898 6,216 5,267 RISC-V 4,753 220 224 ISA Kernel functions Kernel code size Verification Effort number relative SLOC relative x86 64-bit 1231 177% 16,655 3.4 ≈ 5–6 py Arm v7 (32-bit) 853 122% 14,114 2.8 (11 py) RISC-V RV64 695 100% 4,977 1.0 ≈ 3.5 py
Rewrite Rules Binary Code Formalised C Formalised Binary Graph Language Graph Language Greatest Feature: Formal ISASpec! Gernot Heiser: seL4 on RISC-V 9 Target of functional correctness proof Proof Formal C Semantics Proof SMT Solver De- compiler Proof Formal ISA Spec Compiler Proof Verification of binary (in progress): C Source • Formal spec increases assurance • Will eventually link to verified hardware! RISC-V Summit, Dec'20
How Can I Use It?  Open source (GPL v2): Download from https://github.com/sel4  But keep in mind: seL4 is an OS microkernel and hypervisor, not an OS!  Many OS components available on the seL4 GitHub GERNOT HEISER: SEL4 ON RISC-V 10 | RISC-V Summit, Dec'20 Native Apps OS Services Device Drivers Kernel Mode User Mode
How Can I Use It?  Open source (GPL v2): Download from https://github.com/sel4  But keep in mind: seL4 is an OS microkernel and hypervisor, not an OS!  Many OS components available on the seL4 GitHub  Alternative: HENSOLDT Cyber’s TRENTOS GERNOT HEISER: SEL4 ON RISC-V 11 | RISC-V Summit, Dec'20 Kernel Mode User Mode MiG-V: HENSOLDT-Cyber RV64 Processor (based on Ariane) TRENTOS Secure Boot Crypto SD Driver E/N Driver TCP/IP File System Key Store Loader Logger License Manager Secure Update TLS Stack Supply-chain security through logic obfuscation Verified!
RISC-V Summit, Dec'20 GERNOT HEISER: SEL4 ON RISC-V 12 Further Reading: • About seL4: https://sel4.systems/ • seL4 whitepaper: https://sel4.systems/About/seL4-whitepaper.pdf • seL4 Foundation: https://sel4.systems/Foundation Defining the state of the art in trustworthy operating systems for over 10 years Now proved correct on RISC-V!
Questions? RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 13

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Gernot heiser unsw sydney and se l4 foundation

  • 1. seL4® on RISC-V® Fast, Secure, Open-Source OS Kernel, Proved Bug-Free https://sel4.systems/ Gernot Heiser, UNSW Sydney and seL4 Foundation
  • 2. The Highlight of the Year 2 RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 08/11/2020 eL4 i eri ed on RISC-V! microkerneld de R G H TAGS open source, operating s stems, risc- , securit 2020/ 06/ 09 Sounds great! But hat does it mean? seL4 ( :// 4. /) (pronounced e -e-ell-fo ) is arguabl the orld s most secure operating s stem (OS) kernel. The OSkernel is the lo est le el of soft are running on a computer s stem. It is the code that e ecutes in pri ileged mode (S-mode in RISC-V; M-mode is reser ed for microcode/ rm are). The kernel is ultimatel responsible for the securit of a computer s stem. seL4 is a microkernel ( :// . . / /M ). The idea of a microkernel is to minimise the ed comp ing ba e the part of the s stem for hich there is no Plan B if it fails. The Linu and Windo s kernels consist of tens of millions of lines of code, and contain literall thousands (more likel tens of thousands) of bugs a huge attack surface. A ell-designed microkernel, such as seL4, has about ten thousand lines inherentl more trust orth ( :// . 61. . / / //B LH 18. ).
  • 3. Background: What is ? seL4 is an open source, high-assurance, high-performance operating system microkernel Piece of software that runs at the heart of any system and controls all accesses to resources World’s most comprehensive mathematical proofs of correctness and security Available on GitHub under GPLv2 license World’s fastest microkernel hardware software critical non-critical, untrusted attacks RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 3
  • 4. What is ? seL4 is the most trustworthy foundation for safety- and security-critical systems Already in use across many domains: automotive, aviation, space, defence, critical infrastructure, cyber-physical systems, IoT, industry 4.0, certified security... RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 4
  • 5. Performance Source seL4 Fiasco.OC Zircon Mi et al, 2019 986 2717 8157 Gu et al, 2020 1450 3057 8151 seL4.systems, Nov’20 797 N/A N/A RISC-V Summit, Dec'20 GERNOT HEISER: SEL4 ON RISC-V 5 Latency (in cycles) of a round-trip cross-address-space IPC on x64 Sources: • Zeyu Mi, Dingji Li, Zihan Yang, Xinran Wang, Haibo Chen: “SkyBridge: Fast and Secure Inter-Process Communication for Microkernels”, EuroSys, April 2020 • Jinyu Gu, Xinyue Wu, Wentai Li, Nian Liu, Zeyu Mi, Yubin Xia, Haibo Chen: “Harmonizing Performance and Isolation in Microkernels with Efficient Intra-kernel Isolation and Communication”, Usenix ATC, June 2020 • seL4 Performance, https://sel4.systems/About/Performance/, accessed 2020-11-08 Temporary performance regression in Dec’19 World’s fastest microkernel!
  • 6. A few more months for RISC-V Now done for RISC-V! Unique Verification by Mathematical Proof RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 6 Proof Integrity Abstract Model C Imple- mentation Confidentiality Availability Binary code Proof Proof Functional Correctness Translation Correctness Security Enforcement seL4: Still only capability- based OS kernel with correctness proof! seL4: The only OS on RISC-V with correctness proof
  • 7. What Does This Mean? Kinds of properties proved • Behaviour of C code is fully captured by abstract model • Behaviour of C code is fully captured by executable model • Kernel never fails, behaviour is always well-defined • assertions never fail • will never de-reference null pointer • will never access array out of bounds • cannot be subverted by misformed input • … • All syscalls terminate, reclaiming memory is safe, ... • Well typed references, aligned objects, kernel always mapped… • Access control is decidable 7 GERNOT HEISER: SEL4 ON RISC-V Can prove further properties on abstract level! RISC-V Summit, Dec'20
  • 8. What Did We LearnAbout RISC-V? RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 8 ISA Kernel functions Kernel code size number relative SLOC relative x86 64-bit 1231 177% 16,655 3.4 Arm v7 (32-bit) 853 122% 14,114 2.8 RISC-V RV64 695 100% 4,977 1.0 Regularity is good! • Regular page-table structure ⇒ simplifies code and proofs • Regularity of ISA ⇒ most kernel code word-size independent • Clock specified in ISA Hopefully IRQ controller as well! ISA Kernel code size (SLOC) common 32-bit 64-bit x86 10,908 3,882 5,747 Arm 7,898 6,216 5,267 RISC-V 4,753 220 224 ISA Kernel functions Kernel code size Verification Effort number relative SLOC relative x86 64-bit 1231 177% 16,655 3.4 ≈ 5–6 py Arm v7 (32-bit) 853 122% 14,114 2.8 (11 py) RISC-V RV64 695 100% 4,977 1.0 ≈ 3.5 py
  • 9. Rewrite Rules Binary Code Formalised C Formalised Binary Graph Language Graph Language Greatest Feature: Formal ISASpec! Gernot Heiser: seL4 on RISC-V 9 Target of functional correctness proof Proof Formal C Semantics Proof SMT Solver De- compiler Proof Formal ISA Spec Compiler Proof Verification of binary (in progress): C Source • Formal spec increases assurance • Will eventually link to verified hardware! RISC-V Summit, Dec'20
  • 10. How Can I Use It?  Open source (GPL v2): Download from https://github.com/sel4  But keep in mind: seL4 is an OS microkernel and hypervisor, not an OS!  Many OS components available on the seL4 GitHub GERNOT HEISER: SEL4 ON RISC-V 10 | RISC-V Summit, Dec'20 Native Apps OS Services Device Drivers Kernel Mode User Mode
  • 11. How Can I Use It?  Open source (GPL v2): Download from https://github.com/sel4  But keep in mind: seL4 is an OS microkernel and hypervisor, not an OS!  Many OS components available on the seL4 GitHub  Alternative: HENSOLDT Cyber’s TRENTOS GERNOT HEISER: SEL4 ON RISC-V 11 | RISC-V Summit, Dec'20 Kernel Mode User Mode MiG-V: HENSOLDT-Cyber RV64 Processor (based on Ariane) TRENTOS Secure Boot Crypto SD Driver E/N Driver TCP/IP File System Key Store Loader Logger License Manager Secure Update TLS Stack Supply-chain security through logic obfuscation Verified!
  • 12. RISC-V Summit, Dec'20 GERNOT HEISER: SEL4 ON RISC-V 12 Further Reading: • About seL4: https://sel4.systems/ • seL4 whitepaper: https://sel4.systems/About/seL4-whitepaper.pdf • seL4 Foundation: https://sel4.systems/Foundation Defining the state of the art in trustworthy operating systems for over 10 years Now proved correct on RISC-V!
  • 13. Questions? RISC-V Summit, Dec'20 Gernot Heiser: seL4 on RISC-V 13