More Related Content Similar to All About Decoders DLD. (20) All About Decoders DLD.1. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 1
Digital Fundamentals
CHAPTER 6
Functions of Combinational Logic
DECODERS
2. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 2
DECODER
•Discrete quantities of information are represented in digital systems by
binary codes.
•A binary code of n bits is capable of representing upto 2n distinct
elements of coded information.
•Decoder is a combinational circuit that converts binary information from
n input lines to a maximum of 2n unique output lines.
•A decoder is a logic circuit that accepts a set of inputs that represents a
binary number and activates only the output that corresponds to the
input number.
•In other words, a decoder circuit looks at its inputs, determines which
binary number is present there, and activates the one output that
corresponds to that number ; all other outputs remain inactive
3. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 3
• The basic binary function
• An AND gate can be used as the basic decoding
element because it produces a HIGH output only
when all inputs are HIGH
4. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 4
Decoding logic for the binary code 1001 with an active-HIGH output.
5. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 5
• If an active-HIGH output (one of the output will high
and the rest will be low) is required for each decoded
number, the entire decoder can be implemented with
• AND gates
• Inverters
• If an active-LOW output (one of the output will be low
and the rest will be high) is required for each decoded
number, the entire decoder can be implemented with
1. NAND gates
2. Inverters
6. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 6
2-to-4-Line Decoder
(with Enable input)-Active LOW output (1)...
7. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 7
2-4-line-Decoder
• It will have 2 inputs and 2n 2(2)= 4 outputs.
• If binary 00 is coming on input then 0
decimal line “0”will be ON and rest will be
OFF.
• So whatever binary comes on input there
will be 1 on that particular binary line.
13. Floyd
Digital Fundamentals, 9/e
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Slide 13
Implementation of larger Decoder from smaller
Decoder
• Implementation of 3-to- 8 Line Decoder by
cascading two 2-to-4 line Decoder.
• Implementation of 4-to-16 Line Decoder by
cascading two 3-to-8 Line Decoders or by
four 2-to-4 line Decoder.