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Unit-v
vlsi design process
prepared by
B.S.NageswaraRao
Assistant Professor
Eswar College of Engineering
Narasaraopet
 SEQUENCE OF STEPS REQUIRED FOR VLSI DESIGNS TO
DESIGN A CHIP WITH CONSTRAINTS.
 SIZE
 AREA
 POWER AND DELAY IS CALLED DESIGN PROCESS
 The Process Of Designing Of Vlsi Circuit Is Highly
Complex Task
 Complexity Increases, Design Flow And
Verification Become Tedious
 CAD tool are used to ease the process of design
flow by using automation process
 Process For Developing A Chip From Concept To
Silicon Divided Into Four Steps
 DESIGN
 VERIFICATION
 IMPLIMENTATION
 SOFTWARE DEVELOPMENT
 DESIGN:IT IS START WITH DESCRIPTION OF
SPECIFICATIONS OF THE SYSTEM TO BE DESIGN
 DESCRIPTION OF THE DESIGN CAN TAKES PLACE
ANY ONE OF THE FALLOWING
 A)BEHAVIORAL DOMINE:
 IT SPECIFY THE HARDWARE IMPLIMENTATION OF
THE SYSTEM’S FUNCTIONALITY WITH HELP OF
SEQUENCE OF REGISTER TRANSFER STATEMENTS
b)STRUCTURAL DOMINE
 DESIGN DESCRIBE WITH SET OF SUB MODULES
CONNECTED TOGETHER TO FUNCTION
c)PHYSICAL DOMINE
 It Specify The Layout Used To Build The System
According To Architect Idea At The Transistor
Level
VERIFICATION
To verify the functionality of a chip that is
to be performed according to
specifications
It is an important step to designing a
reliable designs
Verification is at different levels
A)register transfer level(high level of
abstraction)
B)transistor level(low level of abstraction)
implimentation
 After verification required design realized
onto the hardw
 physical implementation of the required
function with actual hardware components
that result entity or product
 It include both logic and physical
implementation
software
 This is last task process of program the
brain of the chip for desire function
TECHNOLOGY OPTIONS
 DIFFERENT OPTIONS FOR CREATING PHYSICAL
REALIZATION OF DIGITAL CIRCUIT ONTO SILICON
CHIP
 TWO OPTIONS TO FABRICATE THE CHIP FROM THE
CIRCUIT LEVEL TO THE PHYSICAL REALIZATION
 FULL CUSTOM
 SEMI-CUSTOM
FULL- CUSTOM DESIGN
 DESIGNER HANDLEXIBILITY CHOOSE LODIC,
CRAFT ALL DIGITAL CIRCUITS,THIS IS EARLY
DAYS OF DEGITAL DESIGN
 FUNCTION AND LAYOUT OF EVERY
TRASISTOR CUSTOMIZE AND OPTIMIZE BY
DESIGNER
 INTEL 4004 PROCESSOR IS EXAMPLE
 ADVANTAGES:
 HIGH FERFORMANCE
 MINIMUM AREA MAXIMUM SPEED
 DIS-ADV:
 REQUIRE MORE MAN POWER
 HIGH COST AND LONG TIME TO MARKET
 DESIGN COST IS HIGH
 LONG TIME FOR VERIFICATION
SEMI-CUSTOM
CLASSIFIED AS
1)CELL BASED DESIGN
2)ARRAY BASED DESIGN
CELL BASED DESIGN
CLASSIFIED AS
1)STANDARD CELL DESIGN
2)MACRO CELL
3)COMPILED CELL
ARRAY BASED DESIGN
 1)PRE-DIFFUSED DESIGN
 2)PRE-WIRED DESIGN
CELL BASED DESIGN
 LOGIC ELEMENT IMPLIMENTED BY CIRCUIT CONSIST
OF ONE OR MORE PRIMITIVE GATES(AND,OR,NOT).
 UNIVERSAL GATES(NAND,NOR)
 XOR,XNOR
 SEQUENTIAL ELEMENTS(FF’S)
 COMPLEX FUNCTION(AND-OR-INVERT)
 MUX’S,FULL
ADDER,COMPARATOR,COUNTER,DECODER AND
ENCODER
 THOSE ARE REUSABLE
DUE TO REUSE
 REDUCT TIME TO MARKET
 CHALLENGE IN THIS IS SELECTION CELLS
AND COMBINE THEM FOR REQUIRE
FUNCTION
ADVANTAGES OF CELL BASED DESIGN
 MINIMIZE DESIGN EFFORT TIME DUE TO
REUSABLE PROPERTY
 PRE-DESIGNED CELLS REDUCE THE
COMPLEXITY OF THE CIRCUIT
DIS-ADVANTAGES OF CELL BASED DESIGN
 FIXED LOGIC ELEMENTS IN LIBRARY
 IT REDUCES THE POSSIBILITY OF 100
PERCENTAGE DESIGNERS CHOICE BASED ON
OBJECTIVES
 FAN-OUT AND FAN-IN ARE NOT KNOWN IN
ADVANCE
STANDARD CELL-BASED DESIGN
 LOGIC CELL ARE PLACED IN ROWS THAT ARE
SEPERATED BY INTERCONNECT CHANNELS
 Cells are different sizes
 Cells in rows are same height but different
widths
 Interconnection is overhead
Compiled cell based design
 Designer have choice to customize and
optimize the cells
 Cells are generated by software tools as
function of user supplied parameters
 Cells are placed based on predefined
technology rules
 Such as cell size,power budget,routing
style.
Macro cell based design
 Cells are pre designed
 Muxs
 Datapaths
 Memories
 Dsp and embedded processors
 Functionality androuting with in the module is
fixed or flexible
Array-based designs
 Pre-diffused: primitive cells or transistors are
manufactured by the vendors
 All the fabrication steps needed to make these primitive
cells are standard and optimized irrespective of
application
 Desired inter connections and only few metallization steps
 Example: masked fpga
Pre-wired: in this manufacturing is
separated from implementation
It performed at user's site
Example:fpga
Power calculations

Vlsi design process
Vlsi design process
Vlsi design process
Vlsi design process

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Vlsi design process

  • 1. Unit-v vlsi design process prepared by B.S.NageswaraRao Assistant Professor Eswar College of Engineering Narasaraopet
  • 2.  SEQUENCE OF STEPS REQUIRED FOR VLSI DESIGNS TO DESIGN A CHIP WITH CONSTRAINTS.  SIZE  AREA  POWER AND DELAY IS CALLED DESIGN PROCESS
  • 3.  The Process Of Designing Of Vlsi Circuit Is Highly Complex Task  Complexity Increases, Design Flow And Verification Become Tedious  CAD tool are used to ease the process of design flow by using automation process
  • 4.  Process For Developing A Chip From Concept To Silicon Divided Into Four Steps  DESIGN  VERIFICATION  IMPLIMENTATION  SOFTWARE DEVELOPMENT
  • 5.  DESIGN:IT IS START WITH DESCRIPTION OF SPECIFICATIONS OF THE SYSTEM TO BE DESIGN  DESCRIPTION OF THE DESIGN CAN TAKES PLACE ANY ONE OF THE FALLOWING  A)BEHAVIORAL DOMINE:  IT SPECIFY THE HARDWARE IMPLIMENTATION OF THE SYSTEM’S FUNCTIONALITY WITH HELP OF SEQUENCE OF REGISTER TRANSFER STATEMENTS
  • 6. b)STRUCTURAL DOMINE  DESIGN DESCRIBE WITH SET OF SUB MODULES CONNECTED TOGETHER TO FUNCTION
  • 7. c)PHYSICAL DOMINE  It Specify The Layout Used To Build The System According To Architect Idea At The Transistor Level
  • 8. VERIFICATION To verify the functionality of a chip that is to be performed according to specifications It is an important step to designing a reliable designs Verification is at different levels A)register transfer level(high level of abstraction) B)transistor level(low level of abstraction)
  • 9. implimentation  After verification required design realized onto the hardw  physical implementation of the required function with actual hardware components that result entity or product  It include both logic and physical implementation
  • 10. software  This is last task process of program the brain of the chip for desire function
  • 11. TECHNOLOGY OPTIONS  DIFFERENT OPTIONS FOR CREATING PHYSICAL REALIZATION OF DIGITAL CIRCUIT ONTO SILICON CHIP  TWO OPTIONS TO FABRICATE THE CHIP FROM THE CIRCUIT LEVEL TO THE PHYSICAL REALIZATION  FULL CUSTOM  SEMI-CUSTOM
  • 12. FULL- CUSTOM DESIGN  DESIGNER HANDLEXIBILITY CHOOSE LODIC, CRAFT ALL DIGITAL CIRCUITS,THIS IS EARLY DAYS OF DEGITAL DESIGN  FUNCTION AND LAYOUT OF EVERY TRASISTOR CUSTOMIZE AND OPTIMIZE BY DESIGNER  INTEL 4004 PROCESSOR IS EXAMPLE
  • 13.  ADVANTAGES:  HIGH FERFORMANCE  MINIMUM AREA MAXIMUM SPEED  DIS-ADV:  REQUIRE MORE MAN POWER  HIGH COST AND LONG TIME TO MARKET  DESIGN COST IS HIGH  LONG TIME FOR VERIFICATION
  • 14. SEMI-CUSTOM CLASSIFIED AS 1)CELL BASED DESIGN 2)ARRAY BASED DESIGN
  • 15. CELL BASED DESIGN CLASSIFIED AS 1)STANDARD CELL DESIGN 2)MACRO CELL 3)COMPILED CELL
  • 16. ARRAY BASED DESIGN  1)PRE-DIFFUSED DESIGN  2)PRE-WIRED DESIGN
  • 17. CELL BASED DESIGN  LOGIC ELEMENT IMPLIMENTED BY CIRCUIT CONSIST OF ONE OR MORE PRIMITIVE GATES(AND,OR,NOT).  UNIVERSAL GATES(NAND,NOR)  XOR,XNOR  SEQUENTIAL ELEMENTS(FF’S)  COMPLEX FUNCTION(AND-OR-INVERT)  MUX’S,FULL ADDER,COMPARATOR,COUNTER,DECODER AND ENCODER  THOSE ARE REUSABLE
  • 18. DUE TO REUSE  REDUCT TIME TO MARKET  CHALLENGE IN THIS IS SELECTION CELLS AND COMBINE THEM FOR REQUIRE FUNCTION
  • 19. ADVANTAGES OF CELL BASED DESIGN  MINIMIZE DESIGN EFFORT TIME DUE TO REUSABLE PROPERTY  PRE-DESIGNED CELLS REDUCE THE COMPLEXITY OF THE CIRCUIT
  • 20. DIS-ADVANTAGES OF CELL BASED DESIGN  FIXED LOGIC ELEMENTS IN LIBRARY  IT REDUCES THE POSSIBILITY OF 100 PERCENTAGE DESIGNERS CHOICE BASED ON OBJECTIVES  FAN-OUT AND FAN-IN ARE NOT KNOWN IN ADVANCE
  • 21. STANDARD CELL-BASED DESIGN  LOGIC CELL ARE PLACED IN ROWS THAT ARE SEPERATED BY INTERCONNECT CHANNELS  Cells are different sizes  Cells in rows are same height but different widths  Interconnection is overhead
  • 22. Compiled cell based design  Designer have choice to customize and optimize the cells  Cells are generated by software tools as function of user supplied parameters  Cells are placed based on predefined technology rules  Such as cell size,power budget,routing style.
  • 23. Macro cell based design  Cells are pre designed  Muxs  Datapaths  Memories  Dsp and embedded processors  Functionality androuting with in the module is fixed or flexible
  • 24. Array-based designs  Pre-diffused: primitive cells or transistors are manufactured by the vendors  All the fabrication steps needed to make these primitive cells are standard and optimized irrespective of application  Desired inter connections and only few metallization steps  Example: masked fpga
  • 25. Pre-wired: in this manufacturing is separated from implementation It performed at user's site Example:fpga