Ce diaporama a bien été signalé.
Nous utilisons votre profil LinkedIn et vos données d’activité pour vous proposer des publicités personnalisées et pertinentes. Vous pouvez changer vos préférences de publicités à tout moment.

Hardware Software Codesign

17 593 vues

Publié le

Publié dans : Formation

Hardware Software Codesign

  1. 1. HARDWARE/SOFTWARECODESIGNCENG-6534Digital Systems Synthesis andOptimizationSummer 2012
  2. 2. Presentation Goals• Introduce the fundamentals of HW/SW codesign• Show benefits of the codesign approach over current design process• How codesign concepts are being introduced into design methodologies• (Future) What the benefits, how industry and research groups are attempting
  3. 3. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  4. 4. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  5. 5. What is Codesign?• The meeting of system-level objectives by exploiting the trade-offs between hardware and software in a system through their concurrent design.  concurrent development of HW and SW  integrated design
  6. 6. The importance of Codesign▫ Improves design quality, design cycle time, and cost  Reduces integration and test time▫ Supports growing complexity of embedded systems▫ Takes advantage of advances in tools and technologies  Processor cores  High-level hardware synthesis capabilities  ASIC development
  7. 7. Why is the Codesign needed?• Most systems today include both dedicated hardware units and software units• Programmable processors being used in systems• Solve dependability issues of systems (with tradeoff and interplay)• Reduce the time-to-market frame• Etc.
  8. 8. Codesign Problem• Specification of the system• Hardware/Software Partitioning• Scheduling• Modeling the hardware/software system during the design process
  9. 9. Codesign Features• Enables mutual influence of both HW and SW early in the design cycle• Enables evaluation of larger design space• Analyzing different hardware/software partitions• Enables fast verification• Faster exploration of the design space
  10. 10. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  11. 11. This paper explore a bottom up HW/SW codesign strategy toinvestigate trade-offs in time behavior and area. • A comparison of hardware and software implementations of low level modules is given. Benchmarks: gcd, diffeq, ellipticF, caseDevelop methods and criteria for the partitioning of such systemsinto a hardware part and a software part. • Levels: hardware, machine language, programming language, application modules, and whole applications
  12. 12. Trade-offs in performance andcomplexity are examined by movingsoftware primitives intohardware (Figure 1). Figure 1 Levels of Abstraction
  13. 13. Area TimeHardware Hardware • A CMOS 2 µm² • Number of cyclesSoftware Software • 32 Bit word 139 µm² • Average number of cycles**active area take into taken per instructionHW/SW codesign activities are defined a basic comparison restricted to the twofactors: area and time
  14. 14. • Area the hardware 1000 times as much as the software •Speedup about 30 times is reached by introducing hardware.***Improvements in system design moving parts from software to hardwarecan only be expected at higher levels.
  15. 15. R. Gupta[93]
  16. 16. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  17. 17. This paper explains the Codesign moved from anemerging discipline to mainstream technology forabout a decade. Codesign is an ideal way to explore the design space and to create a suitable platform architecture.
  18. 18. Hardware/Software codesign; Increase the predictability of embedded system designby providing:  analysis methods  synthesis methods.
  19. 19. HW/SW partitioning mapsTo achieve a partition that will give us the required performance
  20. 20. HW/SW PartitioningDefinitionThe process of deciding, for each subsystem, whether therequired functionality is more advantageously implemented inhardware or softwareGoalTo achieve a partition that will give us the required performancewithin the overall system requirements (in size, weight, power,cost, etc.)
  21. 21. • First Steps(Partitioning) Cosyma from the Technical University of Vulcan from Stanford Braunschweig . Analyze PerformanceHardware Performance Software Performance System PerformanceUse high-level synthesis Worst-case execution CPU-ASIC systemtechniques to estimate the timelongest path through thelogic.
  22. 22. • Maturation•**Cosimulation Mixed-level simulation, designers can trade off simulation performance for accuracy •The Ptolemy The execution of software on the CPU is simulated using a virtual model of the processor hardware
  23. 23. • Maturation•The worst-case execution time problem •Low-power cosynthesis•The system-performance problem •Developed models and algorithms for implementing interface protocols•Hardware cost estimation•Esterel model to develop the codesign finitestate machine (CFSM), the synchronousdataflow model•Developed a synthesis method combinations ofCPUs and ASICs
  24. 24. • Moving Into The Mainstream • Practical design task -- reconfigurable computing (FPGAs) The platform FPGA seems to be the chip for which cosynthesis was created: The chip’s internal architecture is exactly what hardware/software partitioning targets. FPGA requires; •Identifying an application that maps well onto it •interfaces to the system bus must be built What language is best for describing the input to hardware/software partitioning algorithm The system on chip (SoC)
  25. 25. SoC design is IP(Intellectual Property)-oriented, so designers can use CPUs, predesigned special-purpose logic, and even FPGA fabrics as components. Platform-based design: A platform is a predesigned architecture that designers can use to build systems for a given range of applications.***IP block is a reusable unit of logic, cell, or chip layout design
  26. 26. • Open ProblemsStill working to define and redefine Developing methods to analyzecomputational models for jointly new classes of architectures that aredescribing hardware and software starting to become common insystems. embedded systems. (VLIW)Continues to evaluate algorithms for System-level power managementdesign-space exploration. How to evaluate the effect of networks onMemory systems continue to be chips on codesign.the subject of research Expand to include systems built of manyNew modeling languages. SoCs (VLSI)SystemC and SpecCsystem-level design languages.
  27. 27. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  28. 28. This paper reviews the past, present, and future prospects for hardware/softwarecodesign, which is used extensively in embedded electronic system productsfor automobiles, industrial design automation, avionics, mobile devices,home appliances, and other products. Optimize and/or satisfy design constraints such as cost,Hardware/software codesign performance, and power of the finalinvestigates the concurrent design of producthardware and software componentsof complex electronic systems. Reduce the time-to-market frame.
  29. 29. Our future of expected diminishing technical progress -the life after Moore’slaw- codesign might become even more important for two reasons: Sale numbers of successful new technical products by •Tools to design better quality and more reliable systems •More design time on a careful analysis and exploration of design options.
  30. 30. The major purposes and intentions of HW/SW codesign• Co-ordination  To work together on all parts of a system• Co-ncurrency  To work concurrently instead of starting the firmware and software development as well as their test only after the hardware platform is available.• Co-rrectness  Complex hardware and software require techniques to not only verify the correctness of each individual subsystem– coverify(correct interactions after their integration)• Co-mplexity  Close the well-known design gap to produce correctly working and highly optimized (e.g., with respect to cost, power, performance) system implementations.
  31. 31. FACETS AND ACHIEVEMENTS OF MODERN ESL-BASED CODESIGN: CODESIGN 3.0 (roughly 2005 until today) System Design Challenges Heterogeneous SoC technology Hardware and software complexity Integration panaceaThere must be a way to raise the abstraction level at which designers express their systemsunder design, giving birth to the idea of electronic system level (ESL) design as well as ways tointerface and reuse designs across different abstraction levels.
  32. 32. Reduction of the Time-to-Market Frame and Design Risks Through theConcurrent Analysis, Exploration, and Design of Hardware and Software
  33. 33. The Double Roof Model of Codesign Defines the typical top–down design process for embedded hardware/software systems Vertical arrows, each representing a synthesis step Horizontal arrows indicate the step of passing information about the implementation at a certain level directly to the next lower level of abstraction as an additional specification information or constraintsThe double roof model can be seen as extending the Y-chart by an explicit separation of software andhardware design.Model tries not only to put into perspective the system level as a new and important abstraction level forthe design of electronic embedded systems, but also to concatenate existing design abstraction andsynthesis levels for their integration and interplay.
  34. 34. Model-Based Versus Language-Based Specification of Applications and Platforms Languages for Hardware, Software, and CodesignVHDL and SystemVerilog C and C++ SystemC and SpecC Important Models of Computation for Codesign FSMs, timed automata, process networks, Petri nets, and data flow
  35. 35. Design Space Exploration Design space exploration (DSE) has soon started to become a distinguishing element of codesign technology.The design space is given by the set of all possiblepermutations of allocations, bindings, and schedules.Any such triple satisfying a certain number of additionalnonfunctional constraints such as on cost, performance,power, temperature, etc., is called a feasible solution. System design space exploration, as the name says, is the task to explore the set of feasible implementations 1) efficiently and 2) finding not only one of these, but 3) many and also 4) optimal ones.
  36. 36. SystemCoDesignerJ. Keinert, M. Streubuhr, T. Schlichter, J. Falk, J. Gladigau, C. Haubelt, J. Teich, and M.Meredith, SystemCoDesigner :An automatic ESL synthesis approach by design spaceexploration and behavioral synthesis for streaming applications The goal of the SystemCoDesigner project is to automatically map applications written in SystemC to a heterogeneous MPSoC platform
  37. 37. CODESIGN 4.0 OR: RESEARCH PERSPECTIVES FOR THE NEXT DECADES OF CODESIGN•Variations and Extensions of Codesign•Controller/Scheduler Codesign•Codesign for Dependability of FutureNanoelectronic Systems•Codesign of Runtime Adaptive Systems
  38. 38. Mission Statements on the Future of CodesignThe Wall of Complexity The Need for Self-AdaptivityThe Wall of Heterogeneity The Need for Cross-Layer CoverificationThe Wall of Dependability
  39. 39. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  40. 40. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica This paper is to simulate the behavior of multiprocessor system on chip. With virtual platform (OVPSim made by Imperas Company) they simulated both hardware architectures and running software applications. What they used? ARM7 IP core MIPS32 IP core Shared memory Local memory BUS for interconnections Simulated three systems on chip models
  41. 41. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica INTRODUCTION & BACKGROUND The hardware projecting of the systems on chip The integration of an increasingly number of processing cores on a The complexity of the present single chip. algorithms which require a greater computing power The improving of the hardware components is unstoppable, taking into consideration the problem of power consume, the engineers have to come with a solution. This solution was the multiprocessors.
  42. 42. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica INTRODUCTION & BACKGROUND The systems on chip (SoC) : More hardware components and circuits specialized for satisfying the limits linked to the physical size to the power consumption Integrate: Digital functions, Analogical functions, Mixed signals, Radio-frequency functions, The Multiprocessor Systems on Chip (MPSoC): Systems on chip which integrate more processors, usually created for dedicated applications. solves implementing parallelism problem and addressed, elegantly, the problem of the energy consumption, managing to decrease theclock frequency
  43. 43. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica HARDWARE-SOFTWARE CO-DESIGN METHODThe MPSoC hardware architecturemay be represented asprocessingnodes or components whichinteracts through a network. A node to be formed of three layers
  44. 44. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica HARDWARE-SOFTWARE CO-DESIGN METHOD These models take into consideration only the software component and imply the existence of some software lower levels and a hardware platform which can implement the respective model.
  45. 45. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica R ESULTS OF SIMULATION The application consists of three major tasks which can be easily parallelized: Task1: recursive generating of Fibonacci numbers Task2: check if the Fibonacci number is prime or not Task3: calculating the sum from 1 to the respective Fibonacci number.
  46. 46. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica 1. simulation 2. simulation
  47. 47. NITA Julian, LAZARESCU Vasile , CONSTANTINESCU Rodica 3. simulation For an application the execution time can be optimized by partitioning the tasks and by mapping them on the proper processors type
  48. 48. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  49. 49. ConclusionTried to show that the application and knowledge of hardware/software codesigntechniques is a must for all those who want to keep up with the challenges ofmore and more complex electronic system designs in the future.Hardware/Software Codesign is becoming more and more necessary as mixedimplementation systems become both more prevalent and more complex.This presentation has attempted to present some of the aspects of codesign andsome of the research papers to develop effective codesign techniques.
  50. 50. Outline• Introduction• Trade-Offs in HW/SW Codesign• A Decade of Hardware/Software Codesign• Hardware/Software Codesign: The Past, the Present, and Predicting the Future• A New Hw/Sw Co-Design Method For Multiprocessor System On Chip Applications• Conclusion• Questions
  51. 51. Questions

×