Lecture on register allocation for Compiler Construction course at TU Delft

1. Challenge the future
Delft
University of
Technology
Course IN4303, 2016-2017
Compiler Construction
Guido Wachsmuth, Eelco Visser
Register Allocation

2. exercise
Register Allocation
Allocate Minimal Number of Registers
2
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

3. today’s lecture
Register Allocation
Overview
Interference graphs
• construction during liveness analysis
3

4. today’s lecture
Register Allocation
Overview
Interference graphs
• construction during liveness analysis
Graph Coloring
• assign registers to local variables and compiler temporaries
• store local variables and temporaries in memory
3

5. today’s lecture
Register Allocation
Overview
Interference graphs
• construction during liveness analysis
Graph Coloring
• assign registers to local variables and compiler temporaries
• store local variables and temporaries in memory
Coalescing
• handle move instructions
3

6. today’s lecture
Register Allocation
Overview
Interference graphs
• construction during liveness analysis
Graph Coloring
• assign registers to local variables and compiler temporaries
• store local variables and temporaries in memory
Coalescing
• handle move instructions
Pre-colored nodes
3

7. Register Allocation
Interference Graphs
I
4

8. terminology
Register Allocation
Recap: Liveness Analysis
5
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

9. terminology
Register Allocation
Recap: Liveness Analysis
5
definition a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

10. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

11. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
definition
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

12. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
usage
definition
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

13. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
usage
definition
live-in
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

14. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
usage
definition
live-in
live-out
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

15. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
usage
definition
live-in
live-in
live-out
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

16. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
usage
definition
live-in
live-out
live-in
live-out
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

17. terminology
Register Allocation
Recap: Liveness Analysis
5
usage
definition
usage
definition
live-in
live-out
live-out
live-in
live-out
a ← 0
b ← a + 1
c ← c + b
a ← 2 * b
if a < N
return c

18. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

19. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

20. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

21. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

22. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

23. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

24. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

25. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

26. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

27. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

28. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Recap: Liveness Analysis
6

29. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Interference Graphs
7

30. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Interference Graphs
7
a b
c

31. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Interference Graphs
7
a b
c

32. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Interference Graphs
7
a b
c

33. Register Allocation
Graph Coloring
II
8

34. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
example
Register Allocation
Graph Coloring
9
a b
c

35. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
a
example
Register Allocation
Graph Coloring
9
b
c

36. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
a b
example
Register Allocation
Graph Coloring
9
c

37. a ← 0
return c
if a < N
b ← a + 1
a ← 2 * b
c ← c + b
a b
c
example
Register Allocation
Graph Coloring
9

38. r1 ← 0
return r2
if r1 < N
r1 ← r1 + 1
r1 ← 2 * r1
r2 ← r2 + r1
a b
c
example
Register Allocation
Graph Coloring
10

39. steps
Register Allocation
Graph Coloring
Simplify
remove node of insignificant degree (fewer than k edges)
spill
remove node with k or more edges
Select
add node, select color
11

40. example with 2 colors
Register Allocation
Graph Coloring
12
a b
c

41. example with 2 colors
Register Allocation
Graph Coloring
12
b
c
a
a

42. example with 2 colors
Register Allocation
Graph Coloring
12
b
c
a
a
c

43. b
example with 2 colors
Register Allocation
Graph Coloring
12
c
a
a
c

44. b
c
example with 2 colors
Register Allocation
Graph Coloring
12
a
a

45. a b
c
example with 2 colors
Register Allocation
Graph Coloring
12

46. example with 4 colors
Register Allocation
Graph Coloring
13
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

47. j k
example with 4 colors
Register Allocation
Graph Coloring
14
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

48. j k
example with 4 colors
Register Allocation
Graph Coloring
15
g
b m
e
f
h g d c
r1
r2
r3
r4

49. j k
example with 4 colors
Register Allocation
Graph Coloring
16
g
b m
e
f
h g d c
h
r1
r2
r3
r4

50. j k
example with 4 colors
Register Allocation
Graph Coloring
17
g
b m
e
f
h g d c
h
k
r1
r2
r3
r4

51. j k
example with 4 colors
Register Allocation
Graph Coloring
18
g
b m
e
f
h g d c
h
k
d
r1
r2
r3
r4

52. j k
example with 4 colors
Register Allocation
Graph Coloring
19
g
b m
e
f
h g d c
h
k
d
j
r1
r2
r3
r4

53. j k
example with 4 colors
Register Allocation
Graph Coloring
20
g
b m
e
f
h g d c
h
k
d
j
er1
r2
r3
r4

54. j k
example with 4 colors
Register Allocation
Graph Coloring
21
g
b m
e
f
h g d c
h
k
d
j
e
f
r1
r2
r3
r4

55. j k
example with 4 colors
Register Allocation
Graph Coloring
22
g
b m
e
f
h g d c
h
k
d
j
e
f
b
r1
r2
r3
r4

56. j k
example with 4 colors
Register Allocation
Graph Coloring
23
g
b m
e
f
h g d c
h
k
d
j
e
f
b
c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

57. j k
example with 4 colors
Register Allocation
Graph Coloring
24
g
b m
e
f
h g d c
h
k
d
j
e
f
b
c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

58. j k
example with 4 colors
Register Allocation
Graph Coloring
25
g
b m
e
f
h g d c
h
k
d
j
e
f
b
c
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
r1 := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := r1 + 4
j := b
live out: d k j
r1
r2
r3
r4

59. j k
example with 4 colors
Register Allocation
Graph Coloring
26
g
b m
e
f
h g d c
h
k
d
j
e
f
b
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
r1 := mem[j + 16]
b := mem[f]
r2 := e + 8
d := r2
k := r1 + 4
j := b
live out: d k j
r1
r2
r3
r4

60. j k
example with 4 colors
Register Allocation
Graph Coloring
27
g
b m
e
f
h g d c
h
k
d
j
e
f
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
r1 := mem[j + 16]
r3 := mem[f]
r2 := e + 8
d := r2
k := r1 + 4
j := r3
live out: d k j
r1
r2
r3
r4

61. j k
example with 4 colors
Register Allocation
Graph Coloring
28
g
b m
e
f
h g d c
h
k
d
j
e
live-in: k j
g := mem[j + 12]
h := k - 1
r3 := g * h
e := mem[j + 8]
r1 := mem[j + 16]
r3 := mem[r3]
r2 := e + 8
d := r2
k := r1 + 4
j := r3
live out: d k j
r1
r2
r3
r4

62. j k
example with 4 colors
Register Allocation
Graph Coloring
29
g
b m
e
f
h g d c
h
k
d
j
live-in: k j
g := mem[j + 12]
h := k - 1
r3 := g * h
r4 := mem[j + 8]
r1 := mem[j + 16]
r3 := mem[r3]
r2 := r4 + 8
d := r2
k := r1 + 4
j := r3
live out: d k j
r1
r2
r3
r4

63. j k
example with 4 colors
Register Allocation
Graph Coloring
30
g
b m
e
f
h g d c
h
k
d
r1
r2
r3
r4
live-in: k r2
g := mem[r2 + 12]
h := k - 1
r3 := g * h
r4 := mem[r2 + 8]
r1 := mem[r2 + 16]
r3 := mem[r3]
r2 := r4 + 8
d := r2
k := r1 + 4
r2 := r3
live out: d k r2

64. j k
example with 4 colors
Register Allocation
Graph Coloring
31
g
b m
e
f
h g d c
h
k
r1
r2
r3
r4
live-in: k r2
g := mem[r2 + 12]
h := k - 1
r3 := g * h
r4 := mem[r2 + 8]
r1 := mem[r2 + 16]
r3 := mem[r3]
r2 := r4 + 8
r4 := r2
k := r1 + 4
r2 := r3
live out: r4 k r2

65. j k
example with 4 colors
Register Allocation
Graph Coloring
32
g
b m
e
f
h g d c
h
r1
r2
r3
r4
live-in: r1 r2
g := mem[r2 + 12]
h := r1 - 1
r3 := g * h
r4 := mem[r2 + 8]
r1 := mem[r2 + 16]
r3 := mem[r3]
r2 := r4 + 8
r4 := r2
r1 := r1 + 4
r2 := r3
live out: r4 r1 r2

66. j k
example with 4 colors
Register Allocation
Graph Coloring
33
g
b m
e
f
h g d c
r1
r2
r3
r4
live-in: r1 r2
g := mem[r2 + 12]
r3 := r1 - 1
r3 := g * r3
r4 := mem[r2 + 8]
r1 := mem[r2 + 16]
r3 := mem[r3]
r2 := r4 + 8
r4 := r2
r1 := r1 + 4
r2 := r3
live out: r4 r1 r2

67. j k
example with 4 colors
Register Allocation
Graph Coloring
34
b m
e
f
h g d c
r1
r2
r3
r4
live-in: r1 r2
r4 := mem[r2 + 12]
r3 := r1 - 1
r3 := r4 * r3
r4 := mem[r2 + 8]
r1 := mem[r2 + 16]
r3 := mem[r3]
r2 := r4 + 8
r4 := r2
r1 := r1 + 4
r2 := r3
live out: r4 r1 r2

68. Register Allocation
Spilling
III
35

69. steps
Register Allocation
Optimistic Coloring
Simplify
remove node of insignificant degree (fewer than k edges)
Spill
remove node of significant degree (k or more edges)
Select
add node, select color
36

70. d
example with 2 colors
Register Allocation
Optimistic Coloring
37
a b
c

71. d
example with 2 colors
Register Allocation
Optimistic Coloring
37
b
c
a
a

72. d
example with 2 colors
Register Allocation
Optimistic Coloring
37
b
c
a
apotential spill

73. d
example with 2 colors
Register Allocation
Optimistic Coloring
37
b
c
a
a
c
potential spill

74. d
example with 2 colors
Register Allocation
Optimistic Coloring
37
c
a b
a
c
b
potential spill

75. d
example with 2 colors
Register Allocation
Optimistic Coloring
37
c
a b
a
c
b
potential spill

76. d
b
example with 2 colors
Register Allocation
Optimistic Coloring
37
c
a
a
c
potential spill

77. d
b
c
example with 2 colors
Register Allocation
Optimistic Coloring
37
a
apotential spill

78. d
a b
c
example with 2 colors
Register Allocation
Optimistic Coloring
37

79. steps
Register Allocation
Spilling
Simplify
remove node of insignificant degree (less than k edges)
Spill
remove node of significant degree (k or more edges)
Select
add node, select color
Actual spill
Start over
38

80. a
example with 2 colors
Register Allocation
Spilling
39
b
c

81. a
example with 2 colors
Register Allocation
Spilling
39
b
c
apotential spill

82. a
example with 2 colors
Register Allocation
Spilling
39
b
c
a
c
potential spill

83. a b
example with 2 colors
Register Allocation
Spilling
39
c
a
c
potential spill

84. a b
c
example with 2 colors
Register Allocation
Spilling
39
apotential spill

85. a b
c
example with 2 colors
Register Allocation
Spilling
39
aactual spill

86. return b
a ← c + a
c ← b + 1
b ← a + 1
example
Register Allocation
Spilling
40
a ← 1

87. example
Register Allocation
Spilling
41
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

88. a1 ← 1
M[42] ← a1
example
Register Allocation
Spilling
41
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

89. a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
example
Register Allocation
Spilling
41
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

90. a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
a4 ← c + a3
M[42] ← a4
a3 ← M[42]
example
Register Allocation
Spilling
41
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

91. example
Register Allocation
Spilling
42
a4 ← c + a3
M[42] ← a4
a3 ← M[42]
a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

92. example
Register Allocation
Spilling
42
a4 ← c + a3
M[42] ← a4
a3 ← M[42]
a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

93. example
Register Allocation
Spilling
42
a4 ← c + a3
M[42] ← a4
a3 ← M[42]
a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

94. example
Register Allocation
Spilling
42
a4 ← c + a3
M[42] ← a4
a3 ← M[42]
a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

95. example
Register Allocation
Spilling
42
a4 ← c + a3
M[42] ← a4
a3 ← M[42]
a1 ← 1
M[42] ← a1
b ← a2 + 1
a2 ← M[42]
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

96. example
Register Allocation
Spilling
43
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

97. b2 ← M[42]
c ← b2 + 1
example
Register Allocation
Spilling
43
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

98. b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
example
Register Allocation
Spilling
43
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

99. return b3
b3 ← M[42]
b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
example
Register Allocation
Spilling
43
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

100. example
Register Allocation
Spilling
44
return b3
b3 ← M[42]
b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

101. example
Register Allocation
Spilling
44
return b3
b3 ← M[42]
b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

102. example
Register Allocation
Spilling
44
return b3
b3 ← M[42]
b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

103. example
Register Allocation
Spilling
44
return b3
b3 ← M[42]
b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

104. example
Register Allocation
Spilling
44
return b3
b3 ← M[42]
b2 ← M[42]
c ← b2 + 1
M[42] ← b1
b1 ← a + 1
a ← c + a
c ← b + 1
b ← a + 1
a ← 1
return b

105. Register Allocation
Coalescing
IV
45

106. coalescing
Register Allocation
Eliminating Move Instructions
46
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

107. coalescing
Register Allocation
Eliminating Move Instructions
47
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

108. Register Allocation
Coalescing
48
coalesce |ˌkəʊəˈlɛs|
verb [no object]
come together to form one mass or whole: the puddles had coalesced
into shallow streams.
• [with object] combine (elements) in a mass or whole: his idea served to
coalesce all that happened into one connected whole.

109. j k
example
Register Allocation
Recap: Graph Coloring
49
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

110. j k
example
Register Allocation
Recap: Graph Coloring
49
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

111. j k
example
Register Allocation
Recap: Graph Coloring
49
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

112. j k
better solution
Register Allocation
Coalescing
50
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

113. j k
better solution
Register Allocation
Coalescing
50
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

114. j k
better solution
Register Allocation
Coalescing
50
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

115. jb k
coalescing nodes
Register Allocation
Coalescing
51
m
e
f
h g cd
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

116. conservative strategies
Register Allocation
Coalescing
Briggs
• a/b has fewer than k neighbours of significant degree
• nodes of insignificant degree and a/b can be simplified
• remaining graph is colorable
George
• all neighbours of a of significant degree interfere also with b
• neighbours of a of insignificant degree can be simplified
• subgraph of original graph is colorable
52

117. steps
Register Allocation
Graph Coloring
Simplify
remove non-move-related node of insignificant degree
Coalesce
Freeze
turn move-related node of insignificant degree into non-move-related
Spill
Select
Start over
53

118. j k
example
Register Allocation
Coalescing
54
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

119. j k
example
Register Allocation
Coalescing
55
g
b m
e
f
h g d c
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

120. j k
example
Register Allocation
Coalescing
56
g
b m
e
f
h g d c
h
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

121. j k
example
Register Allocation
Coalescing
57
g
b m
e
f
h g d c
h
k
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

122. j k
example
Register Allocation
Coalescing
58
g
b m
e
f
h g
h
k
cd
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

123. cd
jb k
example
Register Allocation
Coalescing
59
g
m
e
f
h g
h
k
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

124. cd
jb k
example
Register Allocation
Coalescing
60
g
m
e
f
h g
h
k
cd
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

125. cd
jb k
example
Register Allocation
Coalescing
61
g
m
e
f
h g
h
k
cd
jb
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

126. cd
jb k
example
Register Allocation
Coalescing
62
g
m
e
f
h g
h
k
cd
jb
fr1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

127. cd
jb k
example
Register Allocation
Coalescing
63
g
m
e
f
h g
h
k
cd
jb
f
m
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
e := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := e + 8
d := c
k := m + 4
j := b
live out: d k j

128. cd
jb k
example
Register Allocation
Coalescing
64
g
m
e
f
h g
h
k
cd
jb
f
m
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
r1 := mem[j + 8]
m := mem[j + 16]
b := mem[f]
c := r1 + 8
d := c
k := m + 4
j := b
live out: d k j

129. cd
jb k
example
Register Allocation
Coalescing
65
g
m
e
f
h g
h
k
cd
jb
fr1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
f := g * h
r1 := mem[j + 8]
r2 := mem[j + 16]
b := mem[f]
c := r1 + 8
d := c
k := r2 + 4
j := b
live out: d k j

130. cd
jb k
example
Register Allocation
Coalescing
66
g
m
e
f
h g
h
k
cd
jb
r1
r2
r3
r4
live-in: k j
g := mem[j + 12]
h := k - 1
r3 := g * h
r1 := mem[j + 8]
r2 := mem[j + 16]
b := mem[r3]
c := r1 + 8
d := c
k := r2 + 4
j := b
live out: d k j

131. cd
jb k
example
Register Allocation
Coalescing
67
g
m
e
f
h g
h
k
cd
r1
r2
r3
r4
live-in: k r4
g := mem[r4 + 12]
h := k - 1
r3 := g * h
r1 := mem[r4 + 8]
r2 := mem[r4 + 16]
b := mem[r3]
c := r1 + 8
d := c
k := r2 + 4
r4 := r4
live out: d k r4

132. cd
jb k
example
Register Allocation
Coalescing
68
g
m
e
f
h g
h
k
r1
r2
r3
r4
live-in: k r4
g := mem[r4 + 12]
h := k - 1
r3 := g * h
r1 := mem[r4 + 8]
r2 := mem[r4 + 16]
b := mem[r3]
r1 := r1 + 8
r1 := r1
k := r2 + 4
r4 := r4
live out: r1 k r4

133. cd
jb k
example
Register Allocation
Coalescing
69
g
m
e
f
h g
h
r1
r2
r3
r4
live-in: r2 r4
g := mem[r4 + 12]
h := r2 - 1
r3 := g * h
r1 := mem[r4 + 8]
r2 := mem[r4 + 16]
b := mem[r3]
r1 := r1 + 8
r1 := r1
k := r2 + 4
r4 := r4
live out: r1 r2 r4

134. cd
jb k
example
Register Allocation
Coalescing
70
g
m
e
f
h g
r1
r2
r3
r4
live-in: r2 r4
g := mem[r4 + 12]
r2 := r2 - 1
r3 := g * r2
r1 := mem[r4 + 8]
r2 := mem[r4 + 16]
b := mem[r3]
r1 := r1 + 8
r1 := r1
k := r2 + 4
r4 := r4
live out: r1 r2 r4

135. jb k
coalescing nodes
Register Allocation
Coalescing
71
m
e
f
h g cd
r1
r2
r3
r4
live-in: r2 r4
r1 := mem[r4 + 12]
r2 := r2 - 1
r3 := r1 * r2
r1 := mem[r4 + 8]
r2 := mem[r4 + 16]
b := mem[r3]
r1 := r1 + 8
r1 := r1
k := r2 + 4
r4 := r4
live out: r1 r2 r4

136. Register Allocation
Pre-Colored Nodes
V
72

137. CDECL
Register Allocation
Recap: Calling Conventions
Caller
• push parameters right-to-left on the stack
• clean-up stack after call
Callee
• save old BP
• initialise new BP
• save registers
• return result in AX
• restore registers
• restore BP
73
push 21
push 42
call _f
add ESP 8
push EBP
mov EBP ESP
mov EAX [EBP + 8]
mov EDX [EBP + 12]
add EAX EDX
pop EBP
ret

138. STDCALL
Register Allocation
Recap: Calling Conventions
Caller
• push parameters right-to-left on the stack
Callee
• save old BP
• initialise new BP
• save registers
• return result in AX
• restore registers
• restore BP
74
push 21
push 42
call _f@8
push EBP
mov EBP ESP
mov EAX [EBP + 8]
mov EDX [EBP + 12]
add EAX EDX
pop EBP
ret 8

139. FASTCALL
Register Allocation
Recap: Calling Conventions
Caller
• passes parameters in registers
• pushes additional parameters right-to-left on the stack
• cleans up the stack
Callee
• save old BP, initialise new BP
• save registers
• return result in AX
• restore registers
• restore BP
75
mov ECX 21
mov EDX 42
call @f@8
push EBP
mov EBP ESP
mov EAX ECX
add EAX EDX
pop EBP
ret

140. saving registers
Register Allocation
Recap: Calling Conventions
Not enough registers for all local variables across life time
• save register to memory to free for other use
Caller-save registers
• Caller is responsible for saving and restoring register
Callee-save registers
• Callee is responsible for saving and restoring register
Use callee-save registers to pass parameters
76

141. representing registers
Register Allocation
Pre-Colored Nodes
Nodes
• register = pre-colored node
• no simplify, no spill
• coalesce possible
Edges
• all registers interfere with each other
• explicit usage of registers
• call and return instructions influence liveness
77

142. pre-colored nodes
Register Allocation
Callee-Save Register in Temporary
78
enter: def(r7)
…
exit: use(r7)
enter: def(r7)
t ← r7
…
r7 ← t
exit: use(r7)

143. example
Register Allocation
Pre-Colored Nodes
79
enter : c ← r3 // callee-save
a ← r1 // caller-save
b ← r2 // caller-save
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3 live out)
int f(int a, int b) {
int d = 0;
int e = a;
do {
d = d + b;
e = e - 1;
} while (e > 0);
return d;
}
machine has 3 registers

144. example
Register Allocation
Pre-Colored Nodes
80
r3
r2
b e
r1 a
d
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)

145. example
Register Allocation
Pre-Colored Nodes
81
r3
r2
b e
r1 a
d
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
c
spill c

146. example
Register Allocation
Pre-Colored Nodes
82
r3
r2
b
r1 ae
d
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
c
coalesce a and e

147. example
Register Allocation
Pre-Colored Nodes
83
r3
br2
r1 ae
d
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
c
coalesce r2 and b

148. example
Register Allocation
Pre-Colored Nodes
84
r3
br2
r1ae d
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
c
coalesce r1 and ae

149. example
Register Allocation
Pre-Colored Nodes
85
r3
br2
r1ae d
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
c
simplify d
d

150. example
Register Allocation
Pre-Colored Nodes
86
r3
br2
r1ae r3
c
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
c
color d as r3

151. example
Register Allocation
Pre-Colored Nodes
87
r3
br2
r1ae r3
c
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
c
spill c

152. example
Register Allocation
Pre-Colored Nodes
88
r3
br2
r1ae r3
c
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
spill c

153. examples
Register Allocation
Pre-Colored Nodes
89
r3
r2
b e
r1 a
d
c
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
start over

154. examples
Register Allocation
Pre-Colored Nodes
90
r3
r2
b e
r1 a
d
c
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)

155. examples
Register Allocation
Pre-Colored Nodes
91
r3
r2
b e
r1 a
d
c1
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
c2
new graph

156. examples
Register Allocation
Pre-Colored Nodes
92
r3
r2
b e
r1 a
d
c1
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
c2
coalesce c1, c2, r3

157. examples
Register Allocation
Pre-Colored Nodes
93
c1c2r3
r2
b e
r1 a
d
c1
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
c2
coalesce c1, c2, r3

158. examples
Register Allocation
Pre-Colored Nodes
94
c1c2r3
r2
b e
r1 a
d
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
coalesce (b, r2) and (a, e)

159. examples
Register Allocation
Pre-Colored Nodes
95
c1c2r3 br2
r1 ae
d
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
coalesce (ae, r1)

160. examples
Register Allocation
Pre-Colored Nodes
96
c1c2r3 br2
r1ae d
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
simplify d
d

161. examples
Register Allocation
Pre-Colored Nodes
97
c1c2r3 br2
r1ae r3
enter : c1 ← r3
M[cloc] ← c1
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c2
c2 ← M[cloc]
return (r1, r3)
color d as r3
d

162. examples
Register Allocation
Pre-Colored Nodes
98
c1c2r3 br2
r1ae r3
enter : r3 ← r3
M[cloc] ← r3
r1 ← r1
r2 ← r2
r3 ← 0
r1 ← r1
loop : r3 ← r3 + r2
r1 ← r1 - 1
if r1 > 0 goto loop
r1 ← r3
r3 ← r3
r3 ← M[cloc]
return (r1, r3)
apply register assigment

163. example
Register Allocation
Pre-Colored Nodes
99
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
enter : r3 ← r3
M[cloc] ← r3
r1 ← r1
r2 ← r2
r3 ← 0
r1 ← r1
loop : r3 ← r3 + r2
r1 ← r1 - 1
if r1 > 0 goto loop
r1 ← r3
r3 ← r3
r3 ← M[cloc]
return (r1, r3)

164. example
Register Allocation
Pre-Colored Nodes
100
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
enter : r3 ← r3
M[cloc] ← r3
r1 ← r1
r2 ← r2
r3 ← 0
r1 ← r1
loop : r3 ← r3 + r2
r1 ← r1 - 1
if r1 > 0 goto loop
r1 ← r3
r3 ← r3
r3 ← M[cloc]
return (r1, r3)

165. example
Register Allocation
Pre-Colored Nodes
101
enter : c ← r3
a ← r1
b ← r2
d ← 0
e ← a
loop : d ← d + b
e ← e - 1
if e > 0 goto loop
r1 ← d
r3 ← c
return (r1, r3)
enter : M[cloc] ← r3
r3 ← 0
loop : r3 ← r3 + r2
r1 ← r1 - 1
if r1 > 0 goto loop
r1 ← r3
r3 ← M[cloc]
return (r1, r3)

166. example
Register Allocation
Pre-Colored Nodes
102
enter : M[cloc] ← r3
r3 ← 0
loop : r3 ← r3 + r2
r1 ← r1 - 1
if r1 > 0 goto loop
r3 ← M[cloc]
return (r1, r3)
int f(int a, int b) {
int d = 0;
int e = a;
do {
d = d + b;
e = e - 1;
} while (e > 0);
return d;
}

167. Register Allocation
Summary
VI
103

168. lessons learned
Register Allocation
Summary
How can we assign registers to local variables and temporaries?
• perform liveness analysis
• build interference graph
• color interference graph
What to do if the graph is not colorable?
• keep local variables in memory
How to handle move instructions efficiently?
• coalesce nodes safely
104

169. learn more
Register Allocation
Literature
Andrew W. Appel, Jens Palsberg: Modern Compiler
Implementation in Java, 2nd edition. 2002
Lal George, Andrew W. Appel: Iterative Register Coalescing.
POPL 1996
Lal George, Andrew W. Appel: Iterative Register Coalescing.
TOPLAS 18(3), 1996
105

170. coming next
Register Allocation
Outlook
Compiler components & their generators
• Lecture 12: Data-Flow Analysis Dec 6
• Lecture 13: Register Allocation Dec 13
• Lecture 14: LL Parsing Dec 20
• Lecture 15: LR Parsing Jan 10
Exam preparation
• Question & Answer & Outlook Jan 24
• Exam Jan 31
106

171. Register Allocation
Copyrights
107

172. Register Allocation 108

173. attribution & copyrights
Register Allocation
Pictures
Slide 1:
Colors #2 by Carmelo Speltino, some rights reserved
Slide 40:
Tchibo by Dominica Williamson, some rights reserved
109