6. The MAX19515 Block Diagram

7. Pipelined Architecture / Track and Hold Circuit It uses 10 Stage with fully differential pipelined architecture that allows High-Speed conversion while optimizing power consumption Track and Hold Circuit Pipelined Architecture The analog inputs signal is applied through Track and Hold Circuit. The input sampling switch is closed then input signal is applied to the sampling capacitors through the input switch resistance. Sampling capacitor and switching resistor

11. Integrated Voltage Regulator AVDD < 2V: Voltage regulator is bypassed. AVDD > 2V: Voltage regulator is enabled

12. Applications Information – Analog Input Transformer-Coupled Differential Analog Input

15. Design Parameters Total Harmonic Distortion (THD) THD is the ratio of the RMS of the first six harmonics of the input signal to the fundamental itself. This is expressed as: Aperture Delay The input signal is sampled on the rising edge of the sampling clock. There is a small delay between the rising edge of the sampling clock and the actual sampling instant, which is defined as aperture delay (tad). Overdrive Recovery Time Overdrive recovery time is the time required for the ADC to recover from an input transient that exceeds the full-scale limits. The specified overdrive recovery time is measured with an input transient that exceeds the fullscale limits by ±10%.