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Implementation of a FHSS transceiver on an SDR platform If I have seen further it is only by standing on the shoulders of giants
SDR platform RF module Data conv module DSP module
Specs of an SDR platform DSP Module: ,[object Object]
ARM CPU clock 	 	297 MHz
NAND flash memory 	128 MB
DDR2 SDRAM 	 		128 MB
FPGA					Virtex IV,[object Object]
Specs of an SDR platform RF Module: Receiver Frequency range 			30Mhz to 900Mhz Switching speed			240us to 420us  Minimum Detectable signal	-102dbm Transmitter Frequency Range			200Mhz to 930Mhz Synthesizer Freq Range		500MHz to 930Mhz Switching speed 			240us to 420us
FHSS on the SDR board Transmitter: Data Acq Frequency Hopping Up Sampling Up Conversion to IF Modulation DSP FPGA DAC Up Conversion to RF Tx Antenna Data Conv RF Module
FHSS on the SDR board Receiver: FPGA Data Conv RF Module Down Conversion from IF Rx Antenna ADC Down Sampling Down Conversion to IF De-hopping Demodulation Received Data DSP
Hardware Flow Diagram RF Module Tx Antenna Rx Antenna 430MHz 30 MHz RF Out RF In IF Out IF In 30 MHz DAC FPGA Virtex-4 Data Conversion Expansion Connector ADC Data Conv Module 102.4 MSPS 2 MSPS DM6446 Virtex-4 SX35 FPGA Data Conversion Expansion Connector VPSS 8KSPS DSP Module PCM codecs
Synchronization  Pilot Signal PN Sequence Data
Technical Challenges Less powerful ADC Synchronization Switching Speed 240us Less powerful ADC DAC RF module LYRIO 125 MSPs 4 MSPs DM6446 Virtex-4 SX35 FPGA Modulation Scheme Computational Efficiency Up Sampling Non-integer Up sampling factor VPSS Buffer Length=2^x

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Implementation of a fhss transceiver on an sdr

  • 1. Implementation of a FHSS transceiver on an SDR platform If I have seen further it is only by standing on the shoulders of giants
  • 2. SDR platform RF module Data conv module DSP module
  • 3.
  • 4. ARM CPU clock 297 MHz
  • 6. DDR2 SDRAM 128 MB
  • 7.
  • 8. Specs of an SDR platform RF Module: Receiver Frequency range 30Mhz to 900Mhz Switching speed 240us to 420us Minimum Detectable signal -102dbm Transmitter Frequency Range 200Mhz to 930Mhz Synthesizer Freq Range 500MHz to 930Mhz Switching speed 240us to 420us
  • 9. FHSS on the SDR board Transmitter: Data Acq Frequency Hopping Up Sampling Up Conversion to IF Modulation DSP FPGA DAC Up Conversion to RF Tx Antenna Data Conv RF Module
  • 10. FHSS on the SDR board Receiver: FPGA Data Conv RF Module Down Conversion from IF Rx Antenna ADC Down Sampling Down Conversion to IF De-hopping Demodulation Received Data DSP
  • 11. Hardware Flow Diagram RF Module Tx Antenna Rx Antenna 430MHz 30 MHz RF Out RF In IF Out IF In 30 MHz DAC FPGA Virtex-4 Data Conversion Expansion Connector ADC Data Conv Module 102.4 MSPS 2 MSPS DM6446 Virtex-4 SX35 FPGA Data Conversion Expansion Connector VPSS 8KSPS DSP Module PCM codecs
  • 12. Synchronization Pilot Signal PN Sequence Data
  • 13. Technical Challenges Less powerful ADC Synchronization Switching Speed 240us Less powerful ADC DAC RF module LYRIO 125 MSPs 4 MSPs DM6446 Virtex-4 SX35 FPGA Modulation Scheme Computational Efficiency Up Sampling Non-integer Up sampling factor VPSS Buffer Length=2^x
  • 14. Conclusions Successful Simulation of the FHSS system on Matlab Successful Implementation of an FSK transceiver on a Spartan III kit Successful Implementation of a test bench that could take any waveform and implement it Successful Implementation of an FHSS transceiver on the SDR platform A real time audio transceiver on the SDR platform with FSK A real time audio transceiver on the SDR platform with PSK
  • 15. Recommendations Comparison of a large number of modulation schemes on the developed test bench Source Coding and Channel Coding Algorithms Multi-node Communication