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PoC Requirements and Use Cases
- 1. Consume. Collaborate. Contribute.Consume. Collaborate. Contribute. POC Requirements and use cases ODSA Project Workshop March 28, 2019
- 2. Consume. Collaborate. Contribute.Consume. Collaborate. Contribute. P O C R e q u i r e m e n t s a n d u s e c a s e s Quinn A. Jacobson, Ph.D. Strategic Architect Achronix
- 3. Consume. Collaborate. Contribute. Why do a Proof-of-Concept • Learn • Reduce Risk • Convince Skeptics
- 4. Consume. Collaborate. Contribute. POC Unique Challenges • Problem has to be hard enough that you expose the issues • Solution has to be easy enough that you can do it fast
- 5. Consume. Collaborate. Contribute. Multiple dimensions of POC • Architectural ⎻ Validate interfaces protocols ⎻ Evaluate performance issues ⎻ Develop software programming models • Physical ⎻ Explore chiplet integration and packaging ⎻ Validate power distribution ⎻ Develop high-speed I/O solutions • Business ⎻ Force information sharing at a bare die-level ⎻ Exposing issues of sharing sensitive business metrics ⎻ Validate risk and value sharing models
- 6. Consume. Collaborate. Contribute. Ambitious POC • Smart Network Interface Card ⎻ A NIC that offloads work from the host CPU ⎻ Virtualization, SDN and NFV moved more networking tasks from hardware to software on the host. . . . . . now we need to hardware accelerate those software tasks ⎻ Good candidate for POC because everyone wants a domain-specific accelerator, but lots of custom requirements and configurations • To make it fun lets also cover Computational Storage Solutions ⎻ Another important category of domain specific accelerators ⎻ Leverage some of the same connectivity building blocks of Smart NICs
- 7. Consume. Collaborate. Contribute. Smart NIC • Programmable Engine Task ⎻ Match based on Src/Dst/transaction (go back to host software if no match) ⎻ Security checks ⎻ Optional TCP/IP and HTTP processing ⎻ Potentially simple substitutions in header ⎻ Potentially encrypt/decrypt • Programmable Engine Requirements ⎻ Highly flexible because protocols and tasks change over time ⎻ Want low-latency and high-throughput • Programmable Engine Implementation ⎻ Some combination of Configurable ASICs, CPU cores, and FPGAs ⎻ Configured as (a) part of NIC, (b) sidecar to NIC, or (c) bump in wire before NIC PCIe Ethernet SR-IOV Interface Standard NIC + Programmable Engine Memory Ethernet PHY&MAC
- 8. Consume. Collaborate. Contribute. POC HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 9. Consume. Collaborate. Contribute. Major Units • Network Processor ⎻ For networking support • CPU module ⎻ For control plane ⎻ Storage connectivity • FPGA ⎻ For data plane
- 10. Consume. Collaborate. Contribute. Connectivity • PCIe Gen3 x8 (64 Gbps) ⎻ To host ⎻ To represent chiplet link • 40G Ethernet ⎻ Performance match to PCIe Gen3 x8 • DDR3 memory
- 11. Consume. Collaborate. Contribute. POC HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 12. Consume. Collaborate. Contribute. POC - NIC HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 13. Consume. Collaborate. Contribute. POC – Bump-in-the-wire SmartNIC HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 14. Consume. Collaborate. Contribute. POC – SmartNIC w/ data accelerator HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 15. Consume. Collaborate. Contribute. POC – Computational Storage HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 16. Consume. Collaborate. Contribute. POC – Computational Storage HOST STORAGE NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA CPU F F QSFP 40G QSFP 40G MTP MTP F F QSFP 40G QSFP 40G MTP MTP DRAM DRAM F F F F PCIe x4 Gen3
- 17. Consume. Collaborate. Contribute. POC - Alternative HOST NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA QSFP 40G QSFP 40G DRAM DRAM QSFP 40G STORAGECPU PCIe x4 Gen3
- 18. Consume. Collaborate. Contribute. POC – SW Dev System HOST NETWORK X8 PCIe G3 (64Gbps) 40G Ethernet optical 40G Ethernet copper NFP FPGA QSFP 40G QSFP 40G DRAM DRAM QSFP 40G STORAGECPU PCIe x4 Gen3
- 19. Consume. Collaborate. Contribute. Multiple dimensions of POC • Architectural ⎻ Validate interfaces protocols ⎻ Evaluate performance issues ⎻ Develop software programming models • Physical ⎻ Explore chiplet integration and packaging ⎻ Validate power distribution ⎻ Develop high-speed I/O solutions • Business ⎻ Force information sharing at a bare die-level ⎻ Exposing issues of sharing sensitive business metrics ⎻ Validate risk and value sharing models