3. ๏Invention
โข In 1947, John Bardeen, Walter
Brattain, and William Schockly,
researchers at Bell Lab, invented
Transistor.
โข They found Transistor Effect: โwhen
electrical contacts were applied to a
crystal of germanium, the output
power was larger than the input.โ
โข Awarded the Nobel Prize in physics
(1956)
โข Revolutionized portability and
efficiency of electronic devices
John Bardeen, Walter
Brattain, and William
Schockly
First model of Transistor, 1947
5. FIELD-EFFECT
TRANSISTORS
Field-effect transistors (FETs) follow
an other principle than bipolar
junction transistors
Meaning of โField Effectโ ,An electric field
is develop by the charges , this electric
field controls the conduction path of the
output ckt . So there is an effect due to
electric field and because of this reason
we call the device field effect
FETs controlled by voltage
7. DIFFERENCES
โข Voltage controlled devices
โข Higher input impedance
โข Less sensitive to temp.
variations
โข Unipolar device
โข Smaller/ Easily Integrated
Chips
โข Current controlled devices
โข Lower impedance
โข Higher sensitive
โข Bipolar device
โข Bigger IC
FETโs BJTโs
8. GENERAL OVERVIEW
โข Basic Concept :
โข The terminals of a FET refer to their function: Gate (G), Source
(S), Drain (D)
โข FETs are voltage-controlled by the voltage between gate and
source terminal
โข Voltage effects the electric field of the transistor which enlarges
or diminishes the channel
9. CONSTRUCTION OF FET
โข Source: The source is the terminal through which majority
carriers enter the Silicon Bar
โข Drain: Terminal through which Majoroty carriers leave the bar
โข Gate: controls Drain current and is always reverse biased
10. ANALOGY OF FET WITH WATER
โข The operation of FET can be compared to the water flow
through a flexible pipe
โข When One end is pressed the cross sectional area decreases
hence water flow decreases
โข In a FET drain is similar to outlet
โข Gate is similar to control in the figure below:
14. THE
CONCLUSION
ISโฆโฆ.
A PN Junction with reversed biased..
Establish โdepletion regionโ
There is no current through the junction
As the increased in voltage , the wider
the deption region.
Depletion region has no free charges.
Depletion region has fixed space.
15.
16. JUNCTION FIELD-EFFECT TRANSISTORS
(JFETS)
โข Simplest type of FET
โข Long channel semiconductor
โข Either p- or n-doped (p-type, n-type)
โข A contact at each ends at source and drain terminals
โข Gate terminal surrounds the channel and is doped opposite to
the doping of the channel
22. if VDD is increased from 0 V, Id will increase
proportionally, as shown in the graph of Figure .In
this area, the channel resistance is essentially
constant because the depletion region is not large
enough to have significant effect. This is called
the ohmic region because VDS and ID are related
by Ohmโs law
when ID begins
to increase
very rapidly with
any
further increase
in VDS.
Breakdown can
result in
irreversible
damage to the
device, so JFETs
are always
operated below
breakdown and
within the active
23. โข VGS Controls ID : If VGS is set to increase by adjusting
VGG . ID decreases as the magnitude of VGS is increased
to larger negative values because of the narrowing of the
channel
๏ฑRegions :
๏ Ohmic Region โ linear region
โข JFET behaves like an ordinary resistor
24. โข Saturation or Amplifier Region
โข JFET operates as a constant current device because Id is relatively
independent of Vds
๏Breakdown Region
โข If Vds is increased beyond its value corresponding to Va โ avalanche
breakdown voltage.
โข JFET enters the breakdown region where Id increases to an
excessive value.
๏Cut Off Region
โข As Vgs is made more and more negative, the gate reverse bias
increases which increases the thickness of the depletion region.
โข As negative value of Vgs is increased, a stage comes when the 2
depletion regions touch each other. Vgs (off) = -Vp /Vp/ =
26. METAL OXIDE SEMICONDUCTOR FET:
MOSFET
โข As Compared to BJT, MOS transistor can be made
quiet small and their manufacturing process is
relatively simple.
โข MOSFET also known as insulated-gate field-effect
transistors (IGFET) is preferred in power electronics
due to its ability of fast switching especially in timing
circuits.
โข MOSFET has a "Metal Oxide" gate(silicon dioxide-
27. โขThis isolation of the controlling gate makes the
input resistance of the MOSFET extremely high
in the Mega-ohms region (infinite), thus
switching loss at input side can controlled and
stabilized.
โขAs the gate terminal is isolated from the main c
urrent carrying channel "No current flows into
the gateโ so MOSFET acts as a voltage
controlled resistor (like JFET).
โขMOSFET is specially used in digital
29. Substrate
Channel Drain
Insulator
Gate
OPERATION OF A TRANSISTOR
VSG > 0
n type operation
Positive gate bias attracts electrons into channel
Channel now becomes more conductive
More
electrons
Source
VSD
VSG
VSD
30. โข Gate is insulated from the
body of FET so it is called
insulated gate FET(IGFET)
โข Structurally there exits no
channel between source and
drain .
โข Because a thin layer of P-
type substrate touching the
metal oxide film provides
channel for electrons and
hence acts like N-type
material.
N CHANNEL
ENHANCEMENT
MOSFET
MOSFET
ARCHITECTURE
31. โข It consists of a lightly doped p type
substrate in to which two heavily
Doped n type material are diffused.
โข The surface is coated with a layer of
silicon dioxide(Sio2 )
โข Holes are cut through the Sio2 to
make contact with n-type blocks.
N CHANNEL
ENHANCEMENT
MOSFET
CONSTRUCTIO
Nโฆโฆ.
32. WORKING OF THE ENHANCEMENT MOSFET
โข Drain is made positive with
respect to the source and no
potential is applied to the gate as
shown in figure.
โข The two n-blocks and p-type
substrate form back to back pn
junctions connected by the
Resistance of the p-type material.
โข Both the junctions cannot be
forwarded at the Same time so
N CHANNEL
ENHANCEMENT
MOSFET
33. WORKING OF THE ENHANCEMENT MOSFET
โข So MOSFET is cut off when
gate source voltage Is zero
โข The gate is made positive
with respect to source
substrate as shown in figure
โข A channel of electrons (n-
channel) is formed in
between the source and
drain regions.
N CHANNEL
ENHANCEMENT
MOSFET
34. โข Consequently positive
charges appears on the gate
and negative charges
appears in the substrate
between the drain and
source.
โข As VGS no. electrons in
the channel ID .
N CHANNEL
ENHANCEMENT
MOSFET
35. E-MOSFET
TRANSFER
CHARACTERISTI
C
โข E-MOSFET does not have a
significant IDss parameter
โข t there is ideally no drain
current until VGS reaches a
certain nonzero value
called the threshold
voltage, VGS(th).
โข the curve starts at VGS(th)
rather than VGS(off)
โข The equation for the E-
MOSFET transfer
characteristic curve is
36. OF THE E-TYPE
MOSFET
โข ๐๐บ๐ is always positive
โข As ๐๐บ๐ increases, ๐ผ๐ท
increases
โข As ๐๐บ๐ is kept constant and
๐๐ท๐ is increased, then ๐ผ๐ท
saturates (๐ผ๐ท๐๐ ) and the
saturation level, ๐๐ท๐๐ ๐๐ก is
reached.
โข ๐๐ท๐๐ ๐๐ก can be calculated by
โข ๐๐ท๐ ๐๐ก = ๐๐บ๐ โ ๐T
37. TRIODE REGION
A VOLTAGE-CONTROLLED RESISTOR @SMALL VDS
G
p
n+n+
metal
S DB
oxide
+-
+++
+++
- - - -
VGS1>Vt
p
n+n+
metal
S DB
oxide
+-
+++
+++
+++
- - - - - -
VGS2>VGS1
p
n+n+
metal
S DB
oxide
+-
+++
+++
+++
- - - - - - - - -
VGS3>VGS2
+++
ID
VDS
0.1 v
increasing
VGS
Increasing VGS puts more
charge in the channel, allowing
more drain current to flow
cut-off
38. SATURATION REGION
OCCURS AT LARGE VDS
p
n+n+
metal
source
S
gate
G
drain
D
body
B
oxide
+
-
+++
+++
+++
VDS large
As the drain voltage increases, the difference in
voltage between the drain and the gate becomes
smaller. At some point, the difference is too small
to maintain the channel near the drain ๏ pinch-off
39. Saturation Region
occurs at large VDS
p
n+n+
metal
source
S
gate
G
drain
D
body
B
oxide
+
-
+++
+++
+++
VDS large
The saturation region is when the MOSFET
experiences pinch-off.
Pinch-off occurs when VG - VD is less than VT.
40. Saturation Region
occurs at large VDS
p
n+n+
metal
source
S
gate
G
drain
D
body
B
oxide
+
-
+++
+++
+++
VD>>Vs
VGS - VDS < VT or VGD <
VDS > VGS - VT
VT
41. SATURATION REGION
ONCE PINCH-OFF OCCURS, THERE IS NO
FURTHER INCREASE IN DRAIN CURRENT
ID
VDS
0.1 v
increasing
VGS
triode
saturation
VDS>VGS-VT
VDS<VGS-VT
42. CONSTRUCTION OF N
CHANNEL DEPLETION
MOSFET
โข An n-type channel is obtained by
diffusion between N+ type
source and drain in an n-channel
MOSFET.
โข In depletion MOSFET a lightly
doped n-type channel has been
introduced between to heavily
doped source& drain blocks,.
โข โขIn depletion MOSFET a lightly
doped n-type channel has been
introduced between to heavily
doped source& drain blocks.
43. CONSTRUCTION OF P
CHANNEL DEPLETION
MOSFET
โข An p-type channel is obtained by
diffusion between p+ type source
and drain in an p channel
MOSFET.
โข In p-channel depletion MOSFETs
are made by using n-type
substrate and diffusing a lightly
doped p-type channel between
two heavily doped P-type source
& drain blocks
44. WORKING
โข Negative gate
โข When Vgs =0 electrons can flow freely from
source to drain through the conducting
channel. since a channel exists between drain &
source, Id flows even when Vgs =0
โข With negative voltage a depletion MOSFET
behave like JFET.
โข The action of negative voltage on gate is to
deplete the channel of free n-type charge
carriers so named as depletion MOSFET.
โข The negative potential at the gate pressure
electrons toward the p -type substrate and
attract the holes for the p-type substrate
โข When ๐๐บ๐ is reduced to ๐๐ (pinch off voltage),
then
N CHANNEL
DEPLETION MOSFE
45. DRAIN CHARACTERISTICS
โข When the gate source voltage is zero
considerable drain current flows.
โข When the gate is applied with negative
voltage, positive charge are induced in
the n channel through the SiO2 layer
of the gate capacitor.
โข The conduction in n channel FET is due
to electrons i.e., the majority carriers
โข Therefore the induced positive charges
make the n-channel less conductive.
โข The voltage drop due to the drain
current causes the channel region
nearer to the drain to be more
depleted than the region due to the
46. The transfer characteristics are similar to the JFET
In Depletion Mode operation:
When VGS = 0V, ID = IDSS
When VGS < 0V, ID < IDSS
When VGS > 0V, ID > IDSS
The formula used to plot the Transfer Curve, is:
The transfer characteristics are similar to the JFET
In Depletion Mode operation:
When VGS = 0V, ID = IDSS
When VGS < 0V, ID < IDSS
When VGS > 0V, ID > IDSS
The formula used to plot the Transfer Curve, is: ๏ฆ ๏ถ
๏ง ๏ท
๏จ ๏ธ
2
GS
D DSS
P
V
I = I 1-
V
47. The depletion MOSFET can also be
operated in enhancement mode
simply by applying a positive
voltage to the gate
48. DUAL-GATE MOSFETS
โข The dual-gate MOSFET can be either a depletion or an enhancement
type.
The only difference is that it has two gates
๏ฑAdvantage of the dual-gate:
โขCapacitance is reduced
โข Used for Automatic gain control (AGC)
49.
50. COMPARISON OF MOSFET AND JFET
โข JFET Gate is not insulated
from the channel
โข Channel and gate forms two
pn junctions
โข There are only 3 leads
โข Can be operated in depletion
mode only
โข Input impedance is high
โข MOSFET or IGFET is insulated
from the channel
โข Channel and gate forms
parrallel plate capacitor.
โข There are 4 leads
โข Can be operated in both
depletion and enhancement
mode
โข Input impedance is very high
JFET MOSFET