3. DESIGN SPECIFICATION
The Algorithm to be implemented in detail with mathematical
Number of inputs and outputs in the design and number of bits in each of
Number of bits used in the internal arithmetic operation.
Number of clock signals to be used in the design.
Maximum clock frequency to be used.
Area of the chip.
Power dissipation in the chip.
6. FUNCTIONAL SIMULATION
Before Design implementation , functional simulation is
performed to verify the logic created is correct or not.
Design methodology determines it performance.
Schematic Flow-It is performed directly after completing
design within the design entry tools.
HDL Flow-It is performed after the design has been
entered and synthesized.
9. PLANNING PLACEMENT AND ROUTING(PPR)
Task of dividing a circuit in such a way so that the area of each
sub-circuit is well with in the prescribed range and number of
interconnection between sub-circuits is also minimized.
Step to determine the shape of each sub circuit module and
pin location at their boundary and find out the approximate
location of each module in a rectangular chip.
10. PLANNING PLACEMENT AND ROUTING(PPR)
It is the problem of determination of best position of each
module, when each module has a fixed shape , area and
It is the method of interconnection of different circuit
components, with an aim to minimize the chip area and also
reduction of total wire-length.
13. TIMING SIMULATION
Constitutes on NET Delays and GATE Delays.
Delays encountered by a signal for traversing from
output of one gate to the input of another gate is called
Delays from input of one gate to the output of same gate
due to propagation time of the gate is called GATE
It is done with the clock speed.
14. FUSING/FABRICATION IN TO THE CHIP
Last step in VLSI Design.
Two different design styles
CELL BASED DESIGN
ARRAY BASED DESIGN
15. FUSING/FABRICATION IN TO THE CHIP
The semiconductor chips are ASIC’s which are
designed specifically for a given application or application
CELL BASED DESIGN – uses libraries of predesigned cells which are
then placed and wired to complete the design.
ARRAY BASED DESIGN – uses a prefabricated matrix of non-connected
components. FPGA uses programmable logic modules and also
programmable interconnections in which configuration data is
loaded during each application.