Computer Architecture

1. Interface cIrcuIts

2. • An I/O interface consists of the circuitry required to connect
an input/ output device to a computer system.
• On one side of the interface have bus signals for address,
data and control.
• On the other hand data path with its associated controls to
transfer data between the interface and the input/ output
device.
• This side is called a port.
• It can be classified as
– Serial port
– Parallel port

4. Parallel Port
• It transfers data simultaneously to (or) from the device.
• It uses multiple pin connector.
• Circuit is simple.

5. Serial port
1. It transmits and receives data one bit at a time.
2. For long distance, it is convenient and cost effective.

6. 1. I/O interface
1. It provides a storage buffer for atleast one word of data.
2. Contains status flags that can be accessed by the processor
to determine whether the buffer is full (or) empty.
3. Address decoding circuitry to determine when it is being
addressed by the processor.
4. Performs any format conversion that may be necessary to
transfer data between the bus and the input/ output device
such as parallel – serial conversion in the case of a serial
port.

7. Parallel port
• Parallel port is used to send (or) receive data having group
of bits(8 bits or 16 bits) simultaneously.
• Parallel ports are classified as input port and output port.
• Input port – used to receive the data
• Output port- used to send the data.

8. Input port
• Commonly used i/p device is a keyboard.
• A key is pressed , corresponding signal alters and encoder
circuits generates ASCII code for the corresponding key.

9. Output port
• The output port contains a data register DATA OUT and a
status flag SOUT.
• SOUT set to 1- when output device ready to accept another
character. When it is cleared to 0 then the processor load the
data

10. Serial port
• It is used to transmit/ receive data serially. i.e one at a time.
• A key feature of an interface circuit in serial port is that it is
capable of communicating in a bit-serial on the device side
and in a bit-parallel on the bus side.

12. • The input shift register accepts bi-serial input from
input/output device.
• When all 8 bits of data have been received, the contents of
this shift register are loaded in parallel into the DATAIN
register.
• Similarly, output data in the DATAOUT register are loaded
into the output shift register.
• The status flag SIN -1 new data loaded in DATAIN
• SIN 0- processor read the data of DATAIN
• SOUT 0 –processor writes new data into DATAOUT
• SOUT 1- DATAOUT to output shift register.