Boundary Scan Basics - x1149 de Keysight
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Descubre los principios básicos sobre qué es Boundary Scan en la prueba electrónica, por qué es necesaria y cómo puedes tenerla como parte de tus sistemas de prueba gracias al x1149 de Keysight Technologies.
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Boundary Scan Basics - x1149 de Keysight
- 2. IEEE 1149.6 IEEE 1149.1 IEEE 1581 JTAG TCK TMS TDI TDO TRST
- 3. What is boundary scan? A Typical IC • Testing requires knowledge of functionality of the device 101010 101010 101010 101010 101010 101010 Core Logic 101010 101010 101010 101010 101010 101010
- 4. What is boundary scan? A Typical IC … adding boundary scan Core logic is isolated TEST ACCESS PORT CONTROLLER Core Logic Test Data Out (TDO) Test Clock (TCK) Test Data In (TDI) Test Mode Select (TMS) Boundary Scan Cells
- 5. What is boundary scan? A Typical IC … testing with boundary scan Serial Data In TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 10010 1 Test Data Out (TDO) Test Clock (TCK) Test Data In (TDI) Test Mode Select (TMS)
- 6. What is boundary scan? A Typical IC … testing with boundary scan Serial Data Out TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 11 0 0 1 0 1 Test Data Out (TDO) Test Clock (TCK) Test Data In (TDI) Test Mode Select (TMS)
- 7. What is… Boundary Scan Interconnect (1149.1)?
- 8. What is boundary scan? Boundary Scan Interconnect (1149.1) Testing in a chain TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 TDO TCK TDI TMS
- 9. What is boundary scan? Boundary Scan Interconnect (1149.1) TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS
- 10. What is boundary scan? Boundary Scan Interconnect (1149.1) TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 TDO TCK TDI TMS 1 0 0 1 0 1
- 11. What is boundary scan? Boundary Scan Interconnect (1149.1) One port controls the test in the chain TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic 0 0 0 1 1 1 TDO TCK TDI TMS 1 0 0 1 0 1
- 12. What is… Boundary Scan Interconnect (1149.6)?
- 13. What is boundary scan? Boundary Scan Interconnect (1149.6) For High-speed Differential signals TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS ++ − −
- 14. What is boundary scan? Boundary Scan Interconnect (1149.6) For High-speed Differential signals, with AC coupling capsc ++ − − TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 0 1 0 1 01 0 1 0 1
- 15. What is boundary scan? Buswire TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 1 1 1 1 1 ++ − − Testing each driver separately
- 16. What is boundary scan? Buswire Testing each driver separately TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 1 1 1 1 1 ++ − −
- 17. What is boundary scan? Pull Up/Down Resistors Opens test: Expect “natural” state TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 1 0 1 ++ − − GND VCC high low 0
- 18. What is boundary scan? Pull Up/Down Resistors Opens Fault TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 0 0 0 ++ − − GND low 0 low VCC
- 19. What is boundary scan? Pull Up/Down Resistors Shorts test: Expect driven state TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 0 1 ++ − − GND VCC high low 0 1 0 1 0 1
- 20. What is boundary scan? Pull Up/Down Resistors Shorts fault TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS 1 1 ++ − − GND high low 0 1 VCC 1 0 1 1
- 21. What is… Boundary Scan Silicon Nails Test?
- 22. What is boundary scan? Silicon Nails Test Testing non-Boundary Scan ICs TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS ++ − − GND VCC 01 1 0 111 0 1
- 23. What is… Cover Extended Technology (CET)?
- 24. What is boundary scan? Cover-Extend Technology (CET) Testing non-Boundary Scan ICs; Vectorless test method TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS TEST ACCESS PORT CONTROLLER Core Logic TDO TCK TDI TMS ++ − − GND VCC 1 0 1
- 26. Keysight x1149; Boundary Scan Analyzer COMPLETE BUNDLE AVAILABLE. • PC Controlled (Ethernet). • Four TAP/IO Boxes. - 1x TAP Port. - 4x Digital input ports. - 5x Digital output ports. • One Diagnostic Clip. • Add-on Cover-Extend Technology capability - Vectorless testing of ICs or Connectors through boundary scan • Scan Path Linker - Connecting physically separate chains to test the interconnecting nets
- 27. 4 programmable 0-5V receivers IEEE 1149.1 TAP TCK : programmable 0-5V, 40-380V/us, max 22.5MHz TMS : programmable 1.1-5.0V, max 7.5MHz TRST : programmable 1.1-5.0V, max 10KHz TDI : programmable 1.1-5.0V, max 11.25MHz TDO : programmable 0-5V, max 11.25MHz 1 VCC 4 GND TAP#4 CET TAP#3 TAP#2 TAP#15 programmable 1.1-5.0V drivers Adaptor110-240V USB to PC *USB *Trigger Out LAN to PC *RS-232 *reserved for future use LAN to PC Keysight x1149; Boundary Scan Analyzer
- 28. x1149 CET Mux Power Adaptor LAN to PC x1149 TAP/IO x1149 Controller No test access Cover Extend Technology uses Boundary Scan as the stimulus to test non- Boundary Scan components having no test access. VTEP amplifier, sensor plate and a Cover-Extend Mux is required to complete the metrology. VTEP amplifier & sensor plate
- 29. Graphical view of the selected chain. Mouse over to retrieve the TAP information. All information of the devices in the chain at a glance. Process Outline Guides user through test development and debug. Project Explorer Navigate to sections of the test at a click. Click to select chain. Generate Multi-Chain Scan Path Linker combines chains at a click. Configure/Reconfigure Chain Automatically sets up chains using board’s net information.
- 30. Output Shows the results of all the tests for the chain(s). Results of tests are highlighted in colors. Test results can be sorted by clicking on the title tab. Repair Ticket Pin-level failure reporting and possible cause. Board with injected open faults (Dot6 test) CET test failures
- 31. ‘Standard’ Boundary Scan Test • Board designs can have boundary scan chains physically separated (not connected). • Such boundary chains will be generated and tested as separate chains. Scan Path Linker • Boundary scan test coverage can be increased by the number of interconnect nets if boundary scan chains can be ‘connected’ during testing and revert to its original design after testing. • x1149 Scan Path Linker connects two or more boundary scan chains by linking the TDO to the TDI of these chains inside the controller. • Automated logic level management IC IC IC IC No test coverage IC IC IC IC Nets tested
- 32. Keysight x1149 Application Boundary Scan Analyzer Introduction to
- 33. U1 TDI TDO U4 TDI TDO U5 TDI TDO U3 TDI TDO What if … ? • Normal circuit board • Select Bscan components • Wire the Bscan components into chains of the same voltage levels Introduction to U2 J1 U6 J2 J3 3.3V 5V
- 34. U1 TDI TDO U4 TDI TDO U5 TDI TDO U3 TDI TDO What if … ? • Normal circuit board • Select Bscan components • Wire the Bscan components into chains of the same voltage levels • Interconnected nodes can be tested even without testpoints Introduction to U2 J1 U6 J2 J3 3.3V 5V
- 35. What if … ? … Then we … • Add a test box controlled by PC Introduction to U4 TDI TDO U1 TDI TDO U6U5 TDI TDO U3 TDI TDO U2 J1 J2 J3 3.3V 5V TAP 1 CET TAP 2
- 36. What if … ? … Then we … • Test box outputs clear failure messages for easy failure diagnosis Introduction to U4 TDI TDO U1 TDI TDO U6U5 TDI TDO U3 TDI TDO U2 J1 J2 J3 3.3V 5V Board Failed #1 Open Failure at U4.62 Expected: 10011010 Actual: 00000000 #2 Voltage Failure on “3.3V” Measured: 0.0V High: 3.4V Low: 3.2V Expected: Actual: TAP 1 CET TAP 2
- 37. What if … ? … Then we … • Add voltage monitoring • Add vectorless testing Introduction to U4 TDI TDO U1 TDI TDO U6U5 TDI TDO U3 TDI TDO U2 J1 J2 J3 3.3V 5V Board Failed #1 Open Failure at U4.62 Expected: 10011010 Actual: 00000000 #2 Voltage Failure on “3.3V” Measured: 0.0V High: 3.4V Low: 3.2V Expected: Actual: TAP 1 CET TAP 2
- 38. What if … ? … Then we … • … we have the solution •NOW Introduction to U4 TDI TDO U1 TDI TDO U6U5 TDI TDO U3 TDI TDO U2 J1 J2 J3 3.3V 5V Board Failed #1 Open Failure at U4.62 Expected: 10011010 Actual: 00000000 #2 Voltage Failure on “3.3V” Measured: 0.0V High: 3.4V Low: 3.2V Expected: Actual: TAP 1 CET TAP 2
- 39. DEMO Set Up
- 42. Safe and Secure Use in Manufacturing • No worries when integrating x1149 onto i3070 • Option available to run boundary scan test using i3070 or x1149; libraries are compatible • No Support issues • Keysight supports both i3070 and x1149 products
- 43. Conclusion • There are many exciting features and capabilities on the Keysight x1149 for your to explore. • Get an evaluation kit for you to evaluate now. Agilent Restricted
- 44. ¡GRACIAS!