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Cvd

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Cvd

  1. 1. 1Microelectronics Processing Course - J. Salzman - Jan. 2002 Microelectronics Processing Chemical Vapor Deposition
  2. 2. 2Microelectronics Processing Course - J. Salzman - Jan. 2002 Thin film deposition systemsThin film deposition systems CVD PVD Spin-on Electrolytic deposition
  3. 3. 3Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD depositionCVD deposition Chemical Vapor Deposition is the formation of a non-volatile solid film on a substrate by the reaction of vapor phase chemicals (reactants) that contain the required constituents. The reactant gases are introduced into a reaction chamber and are decomposed and reacted at a heated surface to form the thin film.
  4. 4. 4Microelectronics Processing Course - J. Salzman - Jan. 2002 Examples of CVD filmsExamples of CVD films
  5. 5. 5Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD Systems AP-CVD LP-CVD PE-CVD HDP-CVD PH-CVD (CVD writing)
  6. 6. 6Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD systemsCVD systems Horizontal APCVD Reactor
  7. 7. 7Microelectronics Processing Course - J. Salzman - Jan. 2002 Steps involved in a CVD processSteps involved in a CVD process (schematic)(schematic)
  8. 8. 8Microelectronics Processing Course - J. Salzman - Jan. 2002 Steps involved in a CVD processSteps involved in a CVD process (schematic)(schematic) 3. Adsorption of reactants on the wafer surface. 4. Surface processes, including chemical decomposition or reaction, surface migration to attachment sites (such as atomic- level ledges and kinks), site incorporation, and other surface reactions. 5. Desorption of byproducts from the surface. 6. Transport of byproducts by diffusion through the boundary layer and back to the main gas stream. 7. Transport of byproducts by forced convection away from the deposition region. 1. Transport of reactants by forced convection to the deposition region. 2. Transport of reactants by diffusion from the main gas stream through the boundary layer to the wafer surface.
  9. 9. 9Microelectronics Processing Course - J. Salzman - Jan. 2002 Steps involved in a CVD processSteps involved in a CVD process (schematic)(schematic)
  10. 10. 10Microelectronics Processing Course - J. Salzman - Jan. 2002 Steps involved in a CVD processSteps involved in a CVD process (schematic)(schematic)
  11. 11. 11Microelectronics Processing Course - J. Salzman - Jan. 2002 Steps involved in a CVD processSteps involved in a CVD process (limiting processes)(limiting processes) 1. Gas phase process (mainly diffusion to substrate). 2. Surface process (mainly reaction)
  12. 12. 12Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD kinetic growth modelCVD kinetic growth model We approximate the flux Fl by the linear formula F1 = hG (CG –CS ) where CG and CS are the concentrations of the SiCI4 (molecules per cubic centimeter) in the bulk of the gas and at the surface, respectively, and hG is the gas-phase mass-transfer coefficient. The flux consumed by the chemical-reaction taking place at the surface of the growing film F2 is approximated by the formula F2 = kS CS where kS is the chemical surface-reaction rate constant. In steady state F1 = F2 = F. Using this condition, we get GS G S hk C C /1+ =
  13. 13. 13Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD kinetic growth model-IICVD kinetic growth model-II We can now express the growth rate of the silicon film by writing where N1 is the number of silicon atoms incorporated into a unit volume of the film. Its value for silicon is 5.0×1022 cm-3 . Noting that CG = YCT where CT is the total number of molecules per cubic centimeter in the gas, we get the expression for the growth rate, 11 N C hk hk N F v G GS GS + == Y N C hk hk N F v T GS GS 11 + == The growth rate at a given mole fraction is determined by the smaller of hG or kS . In the limiting cases the growth rate will be given either by [surface-reaction control] or by [mass-transfer control].Yk N C v S T 1 ≅ Yk N C v S T 1 ≅ hGY
  14. 14. 14Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD growth model – Gas phase massCVD growth model – Gas phase mass transfertransfer The “Stagnant-film” model of gas-phase mass-transfer δ SG G CC DF − =1 δ G G D h = Boundary layer theory: δ increases with distance in the direction of gas flow (from Newton’s second low). DG – diffusivity of reactant species δ - boundary layer thickness
  15. 15. 15Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD growth model – Gas phase massCVD growth model – Gas phase mass transfertransfer The flow of reactants F is F ∝ DG δ-1
  16. 16. 16Microelectronics Processing Course - J. Salzman - Jan. 2002 Tilted CVD susceptorTilted CVD susceptor The susceptor in a horizontal epitaxial reactor is tilted so that the cross-sectional area of the chamber is decreased, increasing the gas velocity along the susceptor. This compensates for both the boundary layer and depletion effects.
  17. 17. 17Microelectronics Processing Course - J. Salzman - Jan. 2002 Áp suất cao, độ dài khuếch tán nhỏ, tốc độ phản ứng nhanh, tốc độ phát triển màng bị giới hạn bởi sự truyền khí trong vùng biên. Dùng để kết tủa những màng điện môi dày như silicon nitride, hạn chế của phương pháp này là tạp. III.1 APCVD (atmospheric pressure CVD)
  18. 18. 18Microelectronics Processing Course - J. Salzman - Jan. 2002 • Giảm áp suất nhằm giảm các phản ứng ở pha khí không mong muốn làm cho độ đòng đều màng tăng. • Yêu cầu áp suất thấp chiều dài khuếch tán giảm , hgcao nên có thể điều khiển được tốc độ phản ứng • Có thể chế tạo màng bảo giác chất lượng tốt. • Dùng cho điện môi và bán dẫn. III.2 LPCVD (low pressure CVD) Y N C hk hk v T GS GS 1+ = δ G G D h = Recall that and The key new point isThe key new point is total G P D 1 ∝
  19. 19. 19Microelectronics Processing Course - J. Salzman - Jan. 2002  Các ion khí hiếm được tăng cường bởi thế AC ( RF ) hay DC tới va chạm với precuser tại bề mặt để tạo phản ứng.  Đưa plasma (năng lượng điện trường 1eV = 11600 K ) vào CVD để làm ion phân ly trong plasma, dể dàng tạo phản ứng hóa học ở nhiệt độ thấp PECVD ( đỉnh cao của CVD).  Thường dùng làm kết tủa lớp silicon nitride thụ động hóa. III.3 PECVD (plasma-enhanced CVD)
  20. 20. 20Microelectronics Processing Course - J. Salzman - Jan. 2002 Ví dụ sử dụng quá trình CVD trong công nghệ sảnVí dụ sử dụng quá trình CVD trong công nghệ sản xuất bán dẫn.xuất bán dẫn. màng Phương trình phản ứng Nhiệt độ (0 C) SiO2 SiH4 + O2 -> SiO2 + 2H2 Si(OC2 H5 )4 -> SiO2 + gas.RP SiCl2 H2 + N2 O -> SiO2 + 2N2 + 2HCl SiH4 + CO2 H2 -> SiO2 + gas.RP 400-450 650-700 850-900 850-950 Si3 N4 3SiH2 Cl2 + 4NH3 -> Si3 N4 + 6HCl + 6H2 700-900 Polysilico n SiH4 -> Si + 2H2 600-650 Tungsten 2WF6 + 3Si -> 2W + 3SiF4 WF6 + SiH4 -> W + SiF4 + 2HF + H2 300 400-450
  21. 21. 21Microelectronics Processing Course - J. Salzman - Jan. 2002
  22. 22. 22Microelectronics Processing Course - J. Salzman - Jan. 2002 IV. Kiểu bình phản ứng CVD.  Bình phản ứng thành bình nóng.  Bình phản ứng thành bình lạnh.  Bình phản ứng liên tục.  Bình phản ứng CVD ghép điện plasma. CVD bao gồm nhiều kiểu bình phản ứng và kiểu xử lý. Việc lựa chọn kiểu bình phản ứng phụ thuộc vào ứng dụng thông qua các yêu cầu đối với vật liệu đế, hình thái học lớp phủ độ dày và độ đồng đếu của lớp màng.
  23. 23. 23Microelectronics Processing Course - J. Salzman - Jan. 2002 Advantages of CVD processesAdvantages of CVD processes CVD processes are ideally suited for depositing thin layers of materials on some substrate. In contrast to some other deposition processes which we will encounter later, CVD layers always follow the contours of the substrate: They are conformal to the substrate as shown below.
  24. 24. 24Microelectronics Processing Course - J. Salzman - Jan. 2002 Disadvantages of CVD processesDisadvantages of CVD processes The two most important ones (and the only ones we will address here) are: 1. They are not possible for some materials; there simply is no suitable chemical reaction. 2. They are generally not suitable for mixtures of materials.
  25. 25. 25Microelectronics Processing Course - J. Salzman - Jan. 2002 LP-CVDLP-CVD Y N C hk hk v T GS GS 1+ = δ G G D h = Recall that and The key new point isThe key new point is total G P D 1 ∝
  26. 26. 26Microelectronics Processing Course - J. Salzman - Jan. 2002 Gas depletion in LPCVD reactorGas depletion in LPCVD reactor In the surface reaction limited regime T is critical (10 C). Ramping T compensates depletion.
  27. 27. 27Microelectronics Processing Course - J. Salzman - Jan. 2002 Plasma enhanced CVD systemPlasma enhanced CVD system (PECVD)(PECVD) As the thermal budget gets more and more constrained while more and more layers need to be added for multi-layer metallization, we want to come down with the temperature for the oxide ( or other) CVD processes. One way for doing this is to supply the necessary energy for the chemical reaction by ionizing the gas, thus forming a plasma.
  28. 28. 28Microelectronics Processing Course - J. Salzman - Jan. 2002 PECVD properties  Low substrate temperature  Conformal film  Not stoichiometric film  By-products incorporated  Outgassing  Cracking  Peeling
  29. 29. 29Microelectronics Processing Course - J. Salzman - Jan. 2002 High Density Plasma CVD systemsHigh Density Plasma CVD systems (HDP-CVD)(HDP-CVD) • ECR • ICP A separate RF bias sputtering planarization
  30. 30. 30Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD of Si - EpitaxyCVD of Si - Epitaxy When SiH4 gas is used in a CVD reactor, a Si layer is deposited on the wafer surface. The size of the crystallites depends on the deposition temperature. At high enough temperature, the ad-atoms have enough kinetic energy to move on the surface and align themselves with the underlying Si. This is an epitaxial layer, and the process is called Epitaxy instead of CVD. At lower deposition temperatures, the layer is poly-crystalline Si (consisting of small crystallites)
  31. 31. 31Microelectronics Processing Course - J. Salzman - Jan. 2002 Si EpitaxySi Epitaxy The chemical reaction that produces the Si is fairly simple: SiCl4(g)+2H2(g)=(1000-1200o C)=Si(s)+4HCl(g) Instead of SiCl4 you may want to use SiHXCl4-X
  32. 32. 32Microelectronics Processing Course - J. Salzman - Jan. 2002 Epitaxial FurnaceEpitaxial Furnace
  33. 33. 33Microelectronics Processing Course - J. Salzman - Jan. 2002 Effect of SiClEffect of SiCl44 concentration on Siconcentration on Si depositiondeposition Polysilicon deposition occurs for growth rates exceeding 2 μm/min. Etching of the surface will occur for mole fraction concentrations exceeding 28%.
  34. 34. 34Microelectronics Processing Course - J. Salzman - Jan. 2002 CVD kinetic growth modelCVD kinetic growth model Arrhenius plot of growth velocity vs. 1/T for CVD process Deposition rate vs. 1/T for Si deposited by APCVD using various source gases. Partial pressure of the reactant gas was 0.8 torr. H2 used as carrier gas for solid curves. Using N2 as diluent shifts SiH4 curve to the right.
  35. 35. 35Microelectronics Processing Course - J. Salzman - Jan. 2002 Si epitaxy – controlling doping profilesSi epitaxy – controlling doping profiles Epitaxy is definitely needed if a doping profile is required where the resistivity in regions near the surface is larger than in the bulk. By diffusion, you can always lower the resistivity and even change the doping type, but increasing the resistivity by diffusion is not realistically possible.
  36. 36. 36Microelectronics Processing Course - J. Salzman - Jan. 2002 Examples for CVD Processes Used inExamples for CVD Processes Used in Semiconductor ManufacturingSemiconductor Manufacturing Layer Reaction equations Temperature (ºC) SiO2 LTO TEOS HTO SiH4 + O2 -> SiO2 + 2H2 Si(OC2 H5 )4 -> SiO2 + gas.RP SiCl2 H2 + N2 O -> SiO2 + 2N2 + 2HCl SiH4 + CO2 H2 -> SiO2 + gas.RP 400-450 650-700 850-900 850-950 Si3 N4 3SiH2 Cl2 + 4NH3 -> Si3 N4 + 6HCl + 6H2 700-900 Polysilico n SiH4 -> Si + 2H2 600-650 Tungsten selective blanket 2WF6 + 3Si -> 2W + 3SiF4 WF6 + SiH4 -> W + SiF4 + 2HF + H2 300 400-450
  37. 37. 37Microelectronics Processing Course - J. Salzman - Jan. 2002 Oxide CVDOxide CVD SiH2 CI2 + 2NO2 = (900 °C) = SiO2 + 2HCI + 2N2 There are several possibilities, one is While this reaction was used until about 1985, a better reaction is offered by the "TEOS" process. Si(C2 H5 O)4 = (720 °C) = SiO2 + 2H2 O + C2 H4 . Si(C2 H5 O)4 has the chemical name Tetraethylorthosilicate
  38. 38. 38Microelectronics Processing Course - J. Salzman - Jan. 2002 Oxide CVDOxide CVD
  39. 39. 39Microelectronics Processing Course - J. Salzman - Jan. 2002 SiSi33NN44 DepositionDeposition •We don't "nitride" the Si, analogous to oxidations, by heating the Si in a N2 (actually we do - on occasion), because Si3 N4 is so impenetrable to almost everything - including nitrogen - that the reaction stops after a few nm. There is simply no way to grow a "thick" nitride layer thermally. •Also, don't forget: Si3 N4 is always producing tremendous stress, and you don't want to have it directly on the Si without a buffer oxide in between. In other words: We need a CVD process for nitride. Well, it becomes boring now: •Take your CVD furnace from before, and use a suitable reaction, e.g. 3SiH2 Cl2 + 4NH3 =(...o C)= Si3 N4 + 2HCl + 1,5 H2 .
  40. 40. 40Microelectronics Processing Course - J. Salzman - Jan. 2002 Tungsten (W) CVDTungsten (W) CVD •Ironically, W-CVD comes straight form nuclear power technology: High purity Uranium (chemical symbol U) is made by a CVD process using UF6 as the gas that decomposes at high temperature. •W is chemically very similar to U, so we use WF6 for W-CVD. •A CVD furnace, however, is not good enough anymore. W-CVD needed its own equipment, painfully (and expensively) developed a decade ago. •We will not go into details, however. CVD methods, although quite universally summarily described here, are all rather specialized and the furnace type reactor referred to here, is more an exception than the rule.

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