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Xianyu Zhu
1722 Silver Meadow Ct. San Jose, CA, 95121
(315)480-1561 zxyzxyzxy55@gmail.com
Education:
Syracuse University, Syracuse, NY
L.C. SmithCollege of Engineering and Computer Science
M.S., Electrical andElectronic Engineering, May2016
GPA: 3.848/4.0
Hunan Institute of Engineering, Hunan, China
School of Electrical Engineering and Information Technology
B.S., Electrical Engineeringand Automation, June 2014
Main Coursework:
Graduate: Theoryof Semiconductor, VLSI Design Methods, VLSI Timing Analysis, VLSI TestingandVerification
Undergraduate: Digital Electronic Technique, Electronic Testing Technology, PLC’s Principle and Application
Technical Skills:
ProgrammingLanguage: VHDL, Verilog, Systemverilog
Software: ModelSim, Cadence Virtuoso, Cadence’s incisive Formal Verifier, Cadence SOCEncounter, hSpice, Synopsys VCS,
Synopsys Tetramax, Synopsys Formality, DesignVision, Quartus Ⅱ CAD system
Projects:
8-bit Microprocessor Design
Design an 8-bit Microprocessor’s schematic andlayout inCadence Virtuoso. This 8-bit Microprocessor has a Controller, an8-bit
ALU, an 8-bit Register, a program counter and anInstructionRegister. In thisproject, the Controller is self-designedbasedon
VHDL and generated its layout andschematic byusing the Cadence SOEncounter. Then, puttingallthe parts’ schematics and
layouts together inCadence Virtuoso. The layouts passedDRCandLVS check.
BIST Project
Completed a built-in self-test circuit modelinVerilog. This BISTcircuit includeda LFSR to generate test vectors, a CUT, anMISR
to generate signature anda controller. This self-testing modelpassedsimulationin Synopsys VCS. Testbench includedtest cases
for both normaloperationmode andtestingmode.
TestingMOSIS-fabricated chips
Completed a testingfor an8-bit Microprocessor chip onAltera DE-2 board. Inthisproject, Quartus software is usedto compile
a self-designTestModule which is based onVHDL. An Altera DE-2 board (FPGA)andan8-bit Microprocessor chipis connected
to the breadboard. Then, the outputs of the chipis connected to a Logic Analyzer, HP1662E, that canshow the output
waveform from the chip.

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Xianyu Zhu Resume

  • 1. Xianyu Zhu 1722 Silver Meadow Ct. San Jose, CA, 95121 (315)480-1561 zxyzxyzxy55@gmail.com Education: Syracuse University, Syracuse, NY L.C. SmithCollege of Engineering and Computer Science M.S., Electrical andElectronic Engineering, May2016 GPA: 3.848/4.0 Hunan Institute of Engineering, Hunan, China School of Electrical Engineering and Information Technology B.S., Electrical Engineeringand Automation, June 2014 Main Coursework: Graduate: Theoryof Semiconductor, VLSI Design Methods, VLSI Timing Analysis, VLSI TestingandVerification Undergraduate: Digital Electronic Technique, Electronic Testing Technology, PLC’s Principle and Application Technical Skills: ProgrammingLanguage: VHDL, Verilog, Systemverilog Software: ModelSim, Cadence Virtuoso, Cadence’s incisive Formal Verifier, Cadence SOCEncounter, hSpice, Synopsys VCS, Synopsys Tetramax, Synopsys Formality, DesignVision, Quartus Ⅱ CAD system Projects: 8-bit Microprocessor Design Design an 8-bit Microprocessor’s schematic andlayout inCadence Virtuoso. This 8-bit Microprocessor has a Controller, an8-bit ALU, an 8-bit Register, a program counter and anInstructionRegister. In thisproject, the Controller is self-designedbasedon VHDL and generated its layout andschematic byusing the Cadence SOEncounter. Then, puttingallthe parts’ schematics and layouts together inCadence Virtuoso. The layouts passedDRCandLVS check. BIST Project Completed a built-in self-test circuit modelinVerilog. This BISTcircuit includeda LFSR to generate test vectors, a CUT, anMISR to generate signature anda controller. This self-testing modelpassedsimulationin Synopsys VCS. Testbench includedtest cases for both normaloperationmode andtestingmode. TestingMOSIS-fabricated chips Completed a testingfor an8-bit Microprocessor chip onAltera DE-2 board. Inthisproject, Quartus software is usedto compile a self-designTestModule which is based onVHDL. An Altera DE-2 board (FPGA)andan8-bit Microprocessor chipis connected to the breadboard. Then, the outputs of the chipis connected to a Logic Analyzer, HP1662E, that canshow the output waveform from the chip.