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Intel 8086Intel 8086
FeaturesFeatures
 It is a 16-bit μp processor.It is a 16-bit μp processor.
 8086 has a 20 bit address bus can access8086 has a 20 bit address bus can access
up to 2up to 22020
memory locations (1 MB).memory locations (1 MB).
 It can support up to 64K I/O ports.It can support up to 64K I/O ports.
 It provides 14, 16 -bit registers.It provides 14, 16 -bit registers.
 Word size is 16 bits.Word size is 16 bits.
 It has multiplexed address and data busIt has multiplexed address and data bus
AD0- AD15 and A16 – A19.AD0- AD15 and A16 – A19.
 It requires single phase clock with 33% dutyIt requires single phase clock with 33% duty
cycle to provide internal timing.cycle to provide internal timing.
 8086 is designed to operate in two modes,8086 is designed to operate in two modes,
Minimum and Maximum.Minimum and Maximum.
 It can pre-fetches up to six instruction bytesIt can pre-fetches up to six instruction bytes
from memory and queues them in order tofrom memory and queues them in order to
speed up instruction execution.speed up instruction execution.
 It requires +5V power supply.It requires +5V power supply.
 A 40 pin dual in line package.A 40 pin dual in line package.
 Address ranges from 00000H to FFFFFHAddress ranges from 00000H to FFFFFH
 Memory is byte addressable - Every byte hasMemory is byte addressable - Every byte has
a separate address.a separate address.
EXECUTION UNIT – General Purpose RegistersEXECUTION UNIT – General Purpose Registers
Register Purpose
AX Word multiply, word divide, word I /O
AL Byte multiply, byte divide, byte I/O, decimal arithmetic
AH Byte multiply, byte divide
BX Store address information
CX String operation, loops
CL Variable shift and rotate
DX Word multiply, word divide, indirect I/O
(Used to hold I/O address during I/O instructions. If the result is more than
16-bits, the lower order 16-bits are stored in accumulator and higher order
16-bits are stored in DX register)
8086 Block Diagram8086 Block Diagram
DATA1 DW 25H:
DATA1 is defined as a word (16-bit) variable, i.e., a memory location that
contains 25H.
DATA2 EQU 20H:
DATA2 is not a memory location but a constant.
Assembler directive, DW = Define Word
1. Direct Addressing :
MOV AX,34H [34H] → AX
•The contents of 34H is put into AX. The CPU goes to memory to get data.
•34H is put in AX.
2. Immediate Addressing :
MOV AX,20H 20H → AX,
•20H is put in AX. Does not go to memory to get data. Data is in the instruction.
3. Register Addressing :
MOV AX,BX BX → AX
3. Register Indrirect Addressing :
MOV DX, [BX] BX → DX(with offset registers)
Continue……..Continue……..
5. Register Addressing :
BX
6. Register Indirect Addressing :
MOV AX,[BX] AX DS:BX
7. Based-Indexed Addressing :
MOV AX,[BX + SI]
8. Based-Indexed with Displacement :
MOV AX,[BX + SI + 2010H]
MOV AX,BX AX
Continue……Continue……
ThankThank
YouYou

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Intel 8086

  • 2. FeaturesFeatures  It is a 16-bit μp processor.It is a 16-bit μp processor.  8086 has a 20 bit address bus can access8086 has a 20 bit address bus can access up to 2up to 22020 memory locations (1 MB).memory locations (1 MB).  It can support up to 64K I/O ports.It can support up to 64K I/O ports.  It provides 14, 16 -bit registers.It provides 14, 16 -bit registers.  Word size is 16 bits.Word size is 16 bits.  It has multiplexed address and data busIt has multiplexed address and data bus AD0- AD15 and A16 – A19.AD0- AD15 and A16 – A19.  It requires single phase clock with 33% dutyIt requires single phase clock with 33% duty cycle to provide internal timing.cycle to provide internal timing.
  • 3.  8086 is designed to operate in two modes,8086 is designed to operate in two modes, Minimum and Maximum.Minimum and Maximum.  It can pre-fetches up to six instruction bytesIt can pre-fetches up to six instruction bytes from memory and queues them in order tofrom memory and queues them in order to speed up instruction execution.speed up instruction execution.  It requires +5V power supply.It requires +5V power supply.  A 40 pin dual in line package.A 40 pin dual in line package.  Address ranges from 00000H to FFFFFHAddress ranges from 00000H to FFFFFH  Memory is byte addressable - Every byte hasMemory is byte addressable - Every byte has a separate address.a separate address.
  • 4. EXECUTION UNIT – General Purpose RegistersEXECUTION UNIT – General Purpose Registers Register Purpose AX Word multiply, word divide, word I /O AL Byte multiply, byte divide, byte I/O, decimal arithmetic AH Byte multiply, byte divide BX Store address information CX String operation, loops CL Variable shift and rotate DX Word multiply, word divide, indirect I/O (Used to hold I/O address during I/O instructions. If the result is more than 16-bits, the lower order 16-bits are stored in accumulator and higher order 16-bits are stored in DX register)
  • 5. 8086 Block Diagram8086 Block Diagram
  • 6. DATA1 DW 25H: DATA1 is defined as a word (16-bit) variable, i.e., a memory location that contains 25H. DATA2 EQU 20H: DATA2 is not a memory location but a constant. Assembler directive, DW = Define Word
  • 7. 1. Direct Addressing : MOV AX,34H [34H] → AX •The contents of 34H is put into AX. The CPU goes to memory to get data. •34H is put in AX. 2. Immediate Addressing : MOV AX,20H 20H → AX, •20H is put in AX. Does not go to memory to get data. Data is in the instruction. 3. Register Addressing : MOV AX,BX BX → AX 3. Register Indrirect Addressing : MOV DX, [BX] BX → DX(with offset registers) Continue……..Continue……..
  • 8. 5. Register Addressing : BX 6. Register Indirect Addressing : MOV AX,[BX] AX DS:BX 7. Based-Indexed Addressing : MOV AX,[BX + SI] 8. Based-Indexed with Displacement : MOV AX,[BX + SI + 2010H] MOV AX,BX AX Continue……Continue……
  • 9.