On National Teacher Day, meet the 2024-25 Kenan Fellows
SAR ADC's and industrial Applications
1. EEE462 - Analog-to-Digital and Digital-to-
Analog Converters
SAR ADC and industrial
Applications Ahmet İlker Şin
070203012 1
2. Outlines
Introduction to Successive Approximation ADC
Summary of Convert Types
Successive Approximation Example
Literature Survey
Comparison Between Published Data
Market Survey
industrial Applications
2
3. Successive Approximation Converter
Similar to the ordering weighing (on a scale) of
an unknown quantity on a precision balance,
using a set of weights, such as 1g, 0.5g, 0.25g,
etc.
Guess the answer, use a D/A to convert it to an
analog voltage and compare it to the voltage
being measured – adjust your guess accordingly
3
4. Successive Approximation Converter
The timing diagram for a typical SAR ADC is
shown in Figure 3. The functions shown are
generally present in most SAR ADCs , but their
exact labels can differ from device to device
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5. Successive Approximation Converter
Reliable
Capable of high speed
Conversion time is clock rate times number of bits
Example with 8-bit, 2-MHz clock rate:
Conversion time= (clock period) x (#bits being
converted)
Conversion time= (0.5 micro-sec) x (8-bits) =
4μs
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6. Summary of Convert Types
Converter Type Speed Resolution Noise Cost
Immunity
Voltage/Frequency slow 14-24 good medium
Dual Slope slow 12-18 good low
Successive medium 10-16 little low
Approximation
Flash (Parallel) fast 4-8 little high
*Resolution given in bits.
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7. Successive Approximation
Example
Bit Voltage
10-bit resolution or 1 .5
0.0009765625V of Vref 2 .25
3 .125
Vin =0.6V 4 .0625
5 .03125
Vref =1V 6 .015625
7 .0078125
If we want to find the digital 8 .00390625
value of Vin 9 .001952125
10 .0009765625
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8. Successive Approximation
Example (cont.)
MSB (bit 1)
– Divide Vref by 2 = .5V
– Compare Vref /2 with Vin
– If Vin is greater, turn MSB ON
– If Vin is less than Vref /2, turn MSB off
– Compare Vin=0.6V and V= 0.5V
– Since 0.6 > 0.5 → MSB =1 (turned on)
1
8
9. Successive Approximation
Example (cont.)
Calculate the state of MSB-1 (bit 2)
– Compare Vin =0.6V and V=Vref /2 + Vref/4 =
0.5+0.25 = 0.75V
– Since 0.6 < 0.75 → MSB-1 =0 (turned off)
Calculate the state of MSB-2 (bit 3)
– Go back to the last voltage value that caused
it to be turned on (in
this case 0.5V) and add Vref/8 to it and compare
with Vin.
– Compare Vin and (0.5 + (Vref/8)=0.625)
– Since 0.6 < 0.625 → MSB-2 =0 (turned off)
1 0 0
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10. Successive Approximation
Example (cont.)
Calculate the state of MSB-3 (bit 4)
Go back to the last voltage value that caused it to be turned on
(in this case 0.5V) and add Vref/16 to it and compare with Vin.
– Compare Vin and (0.5 + (Vref/16)=0.5625)
– Since 0.6 > 0.5625 → MSB-3 =1 (turned on)
MSB MSB-1 MSB-2 MSB-3 …
1 0 0 1
10
12. Literature Survey
Several IEEE documents, company’s websites and on line newsletters are
analyzed. The table shows Comparison of the proposed ADC with other
published works
The figure of merit (FOM) used in is referred
here to compare the proposed ADC design with
other published works. The FOM is defined as
In stead of a power point of view, this FOM is from the aspect of energy,
which concerns the total energy consumed in one full conversion cycle of ADC
. Here the power doesn’t take into account the reference buffer and clock
generation . Table summarizes the comparison results. Though power of the
proposed SAR ADC is the lowest, the energy per sample of it is relatively
higher compared to most of the listed works
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13. Comparison of the proposed ADC with other published works
Technology 0.25μm 0.18μm 0.18μm 90nm 0.18μm 65nm
(CMOS)
Resolution (bit) 8 9 12 9 8 10
Supply voltage (V) 1 1 1 1 1 1
Sampling rate 100 K 150 K 100 K 20 M 400 K 1M
(S/s)
Input range (V) 1 0.5 N/A N/A 1 N/A
ENOB (bit) 7.9 8.2 10.55 7.8 7.31 8.75
Power dissipation 3.1μ 30μ 25μ 290μ 6.15μ 1.9μ
(W)
FOM 130 680 167 65 97 4.4
(fJ/conversion-
step)
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14. Comparison Between Published Data
Topology Bits Sampling Power Vdd Technology
Rate
Folding 8 70 MS/s 45 mW 3.3 V 0.8 µm
and/ or
10 40 MS/s 65 mW 5V 0.6 µm
Interpolating
ADC 8 30 MS/s 18 mW 1.8 V 0.18 µm
6 50 MS/s 20 mW 1V 0.35 µm
- 4 MS/s 140 µW 1V 90 µm
Sigma Delta - 1.5 MS/s 40 µW 0.9 V 0.5 µm
ADC
- 1 MS/s 80 µW 0.7 V 0.18 µm
Flash 6 1.2 GS/s 90 mW 1.5 V 0.13 µm
ADC
6 1.3 GS/s 600 mW 1.8 V 0.25 µm
6 1 MS/s 7 µW 0.5 V 90 nm
SAR 8 200 kS/s 2.5 µW 0.9 V 0.18 µm
ADC
10 1MS/s 1.9 µW 1V 65 nm
5 250 MS/s 1.2 µW 0.8 V 65 nm
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15. Market Survey
There are many IC companies, which make different kinds of data
convertors. The following is list of some companies, which make data
converters
Analog Devices
National Semiconductors
Texas Instruments
Microchip
Maxim
Cirrus Logic
Universal Semiconductor, Inc
Accord Solutions, Inc
Aimtron Technology
Analog Microelectronics
Arizona Microtek, Inc
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16. Market Survey
Texas Instruments have announced the 16, 14, 12 bits six channel simultaneously
sampling analog to digital converter. The maximum data rate per channel is
around 500kSPS . The following data shows the detail features about six channel
SAR ADC
Features of six channel SAR ADCs
• Family of 16, 14, 12 bits, Pin and software
Compatible ADC
• Six SAR ADCs Grouped in three Pairs
• Maximum Data Rate Per Channel with Internal
Conversion Clock and Reference:
ADS8556: 630kSPS (PAR) or 450kSPS (SER)
ADS8557: 670kSPS (PAR) or 470kSPS (SER)
ADS8558: 730kSPS (PAR) or 500kSPS (SER)
• Maximum Data Rate with External Conversion
Clock and Reference:
800kSPS (PAR) or 530kSPS
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17. Market Survey
• Pin Selectable or Programmable Input Voltage Ranges:
Up to ±12V
• Excellent Signal to Noise Performance:
91.5dB (ADC8556)
85 dB (ADS8557)
73.9 dB (ADS8558)
• Programmable and Buffered Internal Reference: 0.5V to 2.5V and
0.5V to 3.0V
• Operating Temperature Range: -40 C to +125 C
Device Uses
• Power Quality Measurement
• Protection Relays
• Multi-Axis Motor Control
• Programmable Logic Controllers
• Industrial Data Acquisition
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23. Analog Devices announced a few new releases, which have
SAR ADC architectures ranging from 6-bit, 8-bit, and 12-bit
up to 28-bits. The newly released data converters are
applicable for low power and high-speed application.
Product ID Resolution Speed Power
bits MSPS Consumption
(mw)
AD7985 16 2.5 15.5
AD7980 16 1.0 7.0
AD7450A 12 1 9
AD7450 12 1 9
AD7451 12 1 9.25
AD7440 10 1 9
AD7441 10 1 9.3
AD7983 16 1.33 12
AD7623 16 1.33 55
AD7622 16 2 85
AD7621 16 3 86 23
24. The overall accuracy and linearity of the SAR
ADC are determined primarily by the internal
DAC’s characteristics. Early precision SAR ADCs,
such as the industry-standard AD574A used
DACs with laser-trimmed thin-film resistors to
achieve the desired accuracy and linearity.
However, the process of depositing and
trimming thin-film resistors adds cost, and the
thin-film resistor values may be affected after
the device is subjected to the mechanical
stresses of packaging.
• Resolution : 12 bit
• Complete 12-Bit A/D Converter with
• Reference and Clock
• 8- and 16-Bit Microprocessor Bus
Interface
• No Missing Codes Over Temperature
• 35 µs Maximum Conversion Time
24
25. Figure 5. Functional block diagram of a modern 1-
MSPS SAR ADC with 8-channel input multiplexer. Its
family includes the AD79085 (8 bits), AD79186 (10
bits), and AD79287 (12 bits).
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26. Precision Resolution, 14 Bits to 18 Bits
Part Channel Resolution Throughpu Power
Number Count (Bits) t (mW)
(kSPS)
AD7682 4 16 250 18
AD7689 8 16 250 18
AD7699 8 14 500 36
AD7949 8 14 250 18
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27. High Speed SAR ADCs
The AD7626 is a breakthrough in data
conversion that delivers an unequaled
combination of speed and power. This 16-bit
PulSAR ADC features best-in-class 15-bit ENOB
and 10 MSPS throughput, which is 2.5 times
faster than the closest competition. The ability
of the AD7626 to process information at high
speed, while preserving data integrity, is a key
requirement of medical imaging and data
acquisition systems. Available in a compact
5 mm × 5 mm LFCSP, it is 70% smaller than
competing offerings and consumes just
130 mW of power.
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29. Programmable, 14-Bit to 18-Bit Resolution, Bipolar ADCs
Part Resolution Sample Max Operating Analog Input Range (V)
Number (Bits) Rate Power (mW)
AD7951 14 1 MSPS 100 0 to +5, 0 to +10, ±5, ±10
AD7952 14 1 MSPS 100 0 to +5, 0 to +10, ±5, ±10 diff
AD7610 16 250 kSPS 38 0 to +5, 0 to +10, ±5, ±10
AD7612 16 750 kSPS 85 0 to +5, 0 to +10, ±5, ±10
AD7631 18 250 kSPS 38 ±10 diff
AD7634 18 670 kSPS 60 ±10 diff
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30. Understanding PulSAR ADC Support Circuitry
Successive approximation register (SAR) analog-to-digital converters (ADCs) use various
new techniques for improved resolution. Understanding how these devices work is
important in preventing malfunction and erroneous issues. This application note discusses
in general the pitfalls that occur regularly when using SAR ADCs and, more importantly,
how to easily prevent them.
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34. industrial Applications
A Successive-Approximation ADC for CMOS Image Sensors
The CMOS image sensors are achieving a growing
presence in today's mobile applications as the industry
acknowledges the advances of the CMOS-based
technology and its scaling possibilities. The roadmap
recently unveiled for
CMOS Image Sensor is announcing ever smaller pixels,
after 1.4μm pixel pitch, demos with a pitch of 1.1μm
were presented, and it also announces the future
generation of pixels with 0.9μm pixel size.
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36. industrial Applications
During the recent years, digital still cameras and mobilephone
cameras have been strong market drivers for image
sensor applications. As for the image sensor technology, more
than 24 megapixels and smaller than 1.4-μm pixel pitch have
been realized for the digital still cameras and the mobile-phone
cameras, respectively. Needless to say, these technologies have
to be developed without increasing die and optical sizes due to
cost and portability constraints. This progress has had an
important impact on sensors analog readout electronics, and, in
particular, on their ADC architecture.
36
37. industrial Applications
Analogue output voltage versus lighting intensity in a pixel of
a CMOS Image Sensor, SNR values and noise level
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41. industrial Applications
Simulation results of SA ADC. (a) Input signals, reference voltages and the two
Full-Scales. (b) Generated ramp over 9 bits (c) Generated ramp over 12
bits (d) Transition between the two Full-Scales 41
