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“ Advanced 32 Bit Embedded system design” Focus on ARM & Power PC Necessity of 32-bit Microcontroller - By V.Mohana
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Mixed Microcontroller Soup
Embedded Microcontroller ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
High-end microcontroller applications ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
High-end microcontroller applications
BMW 850i
BMW 850i, cont’d.  brake sensor brake sensor brake sensor brake sensor ABS hydraulic pump
HP Design Jet drafting plotter i960KA adrs latch bus if 1 MB ROM 2 MB DRAM proc. support ASIC || if RS- 422 pen ctrl ASIC swath RAM servo proc. (8052) EEPROM DRAM ctrl front panel stepper motor carriage PC board
Apple Newton ARM 610 ROM RAM Runt ASIC LCD speaker serial I/F A/D tablet PCMCIA infrared
Set-top box in system set-top box IR digital TV input back channel
Philips fiber-to-curb box hardware Network interface MPEG demux MPEG audio MPEG video NTSC CD-I graphics PCMCIA DRAM I/O kbd IR card NVRAM DRAM DRAM
Fiber-to-curb box software default apps custom apps OS-9 kernel I/O manager device drivers boot/monitor software MPEG2 demux audio/video interfaces CD-I graphics network interface processor hardware layer OS layer application layer
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Von Neumann architecture ,[object Object],[object Object],[object Object],[object Object]
CPU + memory memory CPU PC address data IR ADD r5,r1,r3 200 200 ADD r5,r1,r3
Harvard architecture CPU PC data memory program memory address data address data
von Neumann vs. Harvard ,[object Object],[object Object],[object Object],[object Object],[object Object]
Load and Store architecture ,[object Object],[object Object],[object Object]
Load and Store architecture ,[object Object],[object Object],[object Object]
RISC Vs CISC approach ,[object Object],[object Object],[object Object],[object Object]
RISC Vs CISC Low cycles per second, large code sizes  Small code sizes, high cycles per second  Register to register: "LOAD" and "STORE" are independent instructions  Memory-to-memory: "LOAD" and "STORE" incorporated in instructions  Single-clock, reduced instruction only  Includes multi-clock complex instructions  Emphasis on software  Emphasis on hardware  RISC CISC
The Performance Equation   ,[object Object],[object Object]
Pipelining ,[object Object],[object Object],fetch decode execute memory
Pipeline complications ,[object Object],[object Object],[object Object],fetch decode Execute JNZ fetch decode execute fetch decode execute
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Why 32 Bit Microcontroller? ,[object Object],[object Object],[object Object],[object Object],[object Object]
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Popular 32- bit CPU cores ,[object Object],[object Object],[object Object],[object Object]
Popular 32 bit microcontroller manufacturers ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Selecting a Microcontroller ,[object Object],[object Object],[object Object],[object Object]
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Unique Architecture features. ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
ARM ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
ARM ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Intel Strong ARM architecture
Strong-ARM Audiovox Thera PDA-2032
MIPS ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
MIPS ,[object Object],[object Object],[object Object],[object Object]
NEC VR4120
VR4120  Block diagram
Hitachi SH ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Hitachi SH ,[object Object],[object Object],[object Object],[object Object]
Super H
Power PC ,[object Object],[object Object],[object Object],[object Object],[object Object]
MPC5554 Overview
Special Features of ARM (Eg: ARM7TDMI)  ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
ARM state and Thumb state ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
8-bit & 16-bit code size vs Thumb ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Special features of PowerPC (e200z6) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Freescale’s e200z6 Core  ,[object Object],[object Object],[object Object],[object Object]
References ,[object Object],[object Object]
Questions

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Necessity of 32-Bit Controllers

  • 1. “ Advanced 32 Bit Embedded system design” Focus on ARM & Power PC Necessity of 32-bit Microcontroller - By V.Mohana
  • 2.
  • 4.
  • 5.
  • 6.
  • 9. BMW 850i, cont’d. brake sensor brake sensor brake sensor brake sensor ABS hydraulic pump
  • 10. HP Design Jet drafting plotter i960KA adrs latch bus if 1 MB ROM 2 MB DRAM proc. support ASIC || if RS- 422 pen ctrl ASIC swath RAM servo proc. (8052) EEPROM DRAM ctrl front panel stepper motor carriage PC board
  • 11. Apple Newton ARM 610 ROM RAM Runt ASIC LCD speaker serial I/F A/D tablet PCMCIA infrared
  • 12. Set-top box in system set-top box IR digital TV input back channel
  • 13. Philips fiber-to-curb box hardware Network interface MPEG demux MPEG audio MPEG video NTSC CD-I graphics PCMCIA DRAM I/O kbd IR card NVRAM DRAM DRAM
  • 14. Fiber-to-curb box software default apps custom apps OS-9 kernel I/O manager device drivers boot/monitor software MPEG2 demux audio/video interfaces CD-I graphics network interface processor hardware layer OS layer application layer
  • 15.
  • 16.
  • 17. CPU + memory memory CPU PC address data IR ADD r5,r1,r3 200 200 ADD r5,r1,r3
  • 18. Harvard architecture CPU PC data memory program memory address data address data
  • 19.
  • 20.
  • 21.
  • 22.
  • 23. RISC Vs CISC Low cycles per second, large code sizes Small code sizes, high cycles per second Register to register: "LOAD" and "STORE" are independent instructions Memory-to-memory: "LOAD" and "STORE" incorporated in instructions Single-clock, reduced instruction only Includes multi-clock complex instructions Emphasis on software Emphasis on hardware RISC CISC
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  • 38. Intel Strong ARM architecture
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  • 43. VR4120 Block diagram
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