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2016-17
PHYSICS
INVESTIGATORY
PROJECT
ABHINAV KUMAR SINGH
XII-A
ROLL NO.:
KENDRIYA VIDYALAYA NEW
CANTT. ALLAHABAD
KENDRIYA VIDYALAYA NEW CANTT.
ALLAHABAD
DEPARTMENT OF PHYSICS
CERTIFICATE
This is to be certify that ABHINAVKUMAR SINGH , a
student of class XII-A has successfully completed the
research on the below mentioned project under the
guidance of Mrs. MANJU TIWARI , physics teacher
during the year 2016-17in fulfilment of physics
practical examination.
Signature
ACKNOWLEDGEMENT
I wish to express my deep gratitude and sincere
thanks to the Principal, B.B. SINGH, Kendriya
Vidyalaya New Cantt., Allahabad for his
encouragement and for all the facilities that he
provided for this project work. I sincerely
appreciate this magnanimity by taking me into
his fold for which I shall remain indebted to his. I
extend my hearty thanks to Mrs. Manju Tiwari,
physics teacher, who guided me to the
successful completion of this project. I take this
opportunity to express my deep sense of
gratitude for her invaluable guidance, constant
encouragement, constructive comments,
sympathetic attitude and immense motivation,
which has sustained my efforts at all stages of
this project work. I can’t forget to offer my
sincere thanks to my family who helped me to
carry out this project work successfully & for
their valuable advice & support, which I received
from them time to time. A special thanks to my
friends to support me in every phase of my life.
INDEX
1. Aim
2. introduction
3. theory
4. principle
5. basic gates
6. applications of gates
7. construction
8. Bibliography
Aim
To design an appropriate logic gate
combination for given truth table
Introduction
A gate is defined as a digital circuit which
follows some logical relationship between the
input and output voltages. It is a digital
circuit which either allows a signal to pass
through as stop, it is called a gate.
The logic gates are building blocks at digital
electronics. They are used in digital
electronics to change on voltage level (input
voltage) into another (output voltage)
according to some logical statement relating
them.
A logic gate may have one or more inputs, but
it has only one output. The relationship
between the possible values of input and
output voltage is expressed in the form of a
table called truth table or table of
combination.
Theory
Truth table of a Logic Gates is a table that
shows all the input and output possibilities
for the logic gate.
George Boole in 1980 invented a different
kind of algebra based on binary nature at the
logic, this algebra of logic called BOOLEAN
ALGEBRA. A logical statement can have only
two values, such as HIGH/LOW, ON/OFF,
CLOSED/OPEN, YES/NO, RIGHT/WRONG,
TRUE/FALSE, CONDUCTING/NON-
CONDUCTING etc. The two values of logic
statements one denoted by the binary
number 1 and 0. The binary number 1 is
used to denote the high value. The logical
statements that logic gates follow are called
Boolean expressions.
Principle
Any Boolean algebra operation can be associated with inputs and outputs
represent the statements of Boolean algebra. Although these circuits may be
complex, they may all be constructed from three basic devices. We have three
different types of logic gates .These are the AND gate, the OR gate and the NOT
gate.
LOGIC STATES
1 0
HIGH LOW
+ve -ve
ON OFF
CLOSE OPEN
RIGHT WRONG
TRUE FALSE
YES NO
Basic gates
(a) The OR GATE is a device that combines A with B to
give Y as the result.
The OR gate has two or more inputs and one output.
The logic gate of OR gate with A and B input and Y
output is shown below:
In Boolean algebra, addition symbol (+) is referred as
the OR. The Boolean expression:
A+B=Y, indicates Y equals A OR B.
(b) The AND GATE is a device that combines A with B to
give Y as the result.
The AND gate has two or more inputs and one
output. The logic gate of AND gate with A and B input
and Y output is shown below:
In Boolean algebra, multiplication sign (either x or.) is
referred as the AND. The Boolean expression:
A.B=Y, indicates Y equals A AND B.
(c) The NOT GATE is a device that inverts the inputs. The
NOT is a one input and one output. The logic gate of
NOT gate with A and Y output is shown below:
In Boolean algebra, bar symbol (_) is referred as the
NOT. The Boolean expression:
X’ =Y, indicates Y equals NOT A
The or gate
Aim:
TO DESIGN AND SIMULATE THE OR GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D1 and D2).
Theory andConstruction:
An OR gate can be realize by the electronic circuit, making use of two
diodes D1 and D2 as shown in the figure.
Here the negative terminal of the battery is grounded and corresponds to the 0
level, and the positive terminal of the battery (i.e. voltage 5V in the present
case) corresponds to level 1. The output Y is voltage at C w.r.t. earth.
The following interference can be easily drawn from the working of
electrical circuit is:
 If switch A & B are open lamp do not glow (A=0, B=0), hence Y=0.
 If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
 If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
 If switch A & B are closed then (A=1, B=1) Lamp glow, hence Y=1.
Truth Table:
Input A Input B Output Y
0 0 0
1 0 1
0 1 1
1 1 1
The and gate
Aim:
TO DESIGN AND SIMULATE THE AND GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D1 and D2), a resistance R.
Theory andConstruction:
An AND gate can be realize by the electronic circuit, making use of
two diodes D1 and D2 as shown in the figure. The resistance R is
connected to the positive terminal of a 5V battery permanently.
Here the negativeterminal ofthe batteryis grounded and corresponds to
the 0 level, and the positiveterminal of the battery (i.e. voltage 5V in the
present case) corresponds to level 1. The output Y is voltage at C w.r.t.
earth.
The following conclusions can be easily drawn from the working of electrical
circuit:
 If both switches A&B are open (A=0, B=0) then lamp will not glow, hence
Y=0.
 If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence
Y=0.
 If switch A open & B closed (A=0, B=1) then Lamp will not glow, hence
Y=0.
 If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.
Truth Table:
Input A Input B Output Y
0 0 0
1 0 0
0 1 0
1 1 1
The not gate
Aim:
TO DESIGN AND SIMULATE THE NOT GATE CIRCUIT.
Components:
An ideal n-p-n transistor.
Theory andConstruction:
A NOT gate cannot be realized by using diodes. However an electronic
circuit of NOT gate can be realized by making use of a n-p-n transistor as
shown in the figure.
The base B of the transistor is connected to the input A through a resistance Rb
and the emitter E is earthed. The collector is connected to 5V battery. The
output Y is voltage at C w.r.t. earth.
The following conclusion can be easily drawn from the working of the electrical
circuit:
 If switch A is open (i.e. A=0), the lump will glow, hence Y=1.
 If Switch A is closed (i.e. A=1), the lump will not glow, hence Y=0.
Truth Table:
Input A Output Y
0 1
1 0
The nor gate
Aim:
TO DESIGN AND SIMULATE THE NOR GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D1 and D2), an ideal n-p-n transistor.
Theory andConstruction:
If we connect the output Y’ of OR gate to the input of a NOT gate the
gate obtained is called NOR. The output Y is voltage at C w.r.t. earth.
In Boolean expression, the NOR gate is expressed as Y=A+B, and is being read as
‘A OR B negated’. The following interference can be easily drawn from the
working of electrical circuit is:
 If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
 If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence
Y=0.
 If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence
Y=0.
 If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.
TruthTable:
Input
A
Input
B
Output
Y
0 0 1
1 0 0
0 1 0
1 1 0
The nand gate
Aim:
TO DESIGN AND SIMULATE THE NAND GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D1 and D2), a resistance R, an ideal n-p-n
transistor.
Theory andConstruction:
If we connect the output Y’ of AND gate to the input of a NOT gate the
gate obtained is called NAND.
The output Y is voltage at C w.r.t. earth.
In Boolean expression, the NAND gate is expressed as Y=A.B, and is being read
as ‘A AND B negated’. The following interference can be easily drawn from the
working of electrical circuit:
 If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
 If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
 If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
 If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.
TruthTable:
Input
A
Input
B
Output
Y
0 0 1
1 0 1
0 1 1
1 1 0
Some Common Applicationsof Logic
Gates
During the course of discussion about
various digital logic gates, we have mainly
discussed about the design, property and
operation of them. In this article we will look
at various applications of logic gates. Their
applications are determined mainly based
upon their truth table i.e. their mode of
operations. In the following discussion we
will look at the applications of basic logic
gates as well as many other normal logic
gates as well.
Application of or gate
Wherever the occurrence of any one or more than one event is needed
to be detected or some actions are to be taken after their occurrence,
in all those cases OR gates can be used. It can be explained with an
example. Suppose in an industrial plant if one or more than one
parameter exceeds the safe value, some protective measure is needed
to be done. In that case OR gate is used. We are going to show this
with the help of a diagram. The above figure is a typical schematic
diagram where an OR gate is used to detect exceed of temperature or
pressure and produce command signal for the system to take required
actions.
Application of and gate
There are mainly two applications of AND gate as Enable gate and
Inhibit gate. Enable gate means allowance of data through a channel
and Inhibit gate is just the reverse of that process i.e. disallowance of
data through a channel. We are going to show an enabling operation to
understand it in an easier way. Suppose in the measurement of
frequency of a pulsed waveform. For measurement of frequency a
gating pulse of known frequency is sent to enable the passage of the
waveform whose frequency is to be measured. The diagram below
shows the arrangement of the above explained operation.
Application of not gate
NOT gates are also known as inverter because they invert the
output given to them and show the reverse result. Now the CMOS
inverters are commonly used to build square wave oscillators
which are used for generating clock signals. The advantage of
using these is they consume low power and their interfacing is
very easy compared to other logic gates.
The above figure shows the most fundamental circuit made of ring
configuration to generate square wave oscillator. The frequency of this
type generator is given by
Where n represents the number of inverters shows the propagation
delay per gate.
Construction of logic gates
circuit for given truth tables
Sum-of-products
form (sop)
Suppose we have to draw logics
gates using truth table given
below:
We can begin like this:
Now that we have a Boolean Sum-Of-
Products expression for the truth table’s
function, we can easily design a logic gate or
relay logic circuit based on that expression:
Alternate method: Simplify the
output obtained from truth table
As a result of the simplification, we
can now build much simpler logic
circuits performing the same
function, in either gate or relay
form:
Product-of-sums
form (pos)
Suppose we have to draw logics
gates using truth table given
below:
We can begin like this:
Now that we have a Boolean Product-of-Sums
expression for the truth table’s function, we
can easily design a logic gate or relay logic
circuit based on that expression:
Bibliography
 Wikipedia
 Google
 Hc verma
 Sl arora
 School library
 Icbse.com

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Physics investigatory project

  • 1. 2016-17 PHYSICS INVESTIGATORY PROJECT ABHINAV KUMAR SINGH XII-A ROLL NO.: KENDRIYA VIDYALAYA NEW CANTT. ALLAHABAD
  • 2. KENDRIYA VIDYALAYA NEW CANTT. ALLAHABAD DEPARTMENT OF PHYSICS CERTIFICATE This is to be certify that ABHINAVKUMAR SINGH , a student of class XII-A has successfully completed the research on the below mentioned project under the guidance of Mrs. MANJU TIWARI , physics teacher during the year 2016-17in fulfilment of physics practical examination.
  • 3. Signature ACKNOWLEDGEMENT I wish to express my deep gratitude and sincere thanks to the Principal, B.B. SINGH, Kendriya Vidyalaya New Cantt., Allahabad for his encouragement and for all the facilities that he provided for this project work. I sincerely appreciate this magnanimity by taking me into his fold for which I shall remain indebted to his. I extend my hearty thanks to Mrs. Manju Tiwari, physics teacher, who guided me to the successful completion of this project. I take this
  • 4. opportunity to express my deep sense of gratitude for her invaluable guidance, constant encouragement, constructive comments, sympathetic attitude and immense motivation, which has sustained my efforts at all stages of this project work. I can’t forget to offer my sincere thanks to my family who helped me to carry out this project work successfully & for their valuable advice & support, which I received from them time to time. A special thanks to my friends to support me in every phase of my life.
  • 5. INDEX 1. Aim 2. introduction 3. theory 4. principle 5. basic gates 6. applications of gates 7. construction 8. Bibliography
  • 6.
  • 7. Aim To design an appropriate logic gate combination for given truth table
  • 8. Introduction A gate is defined as a digital circuit which follows some logical relationship between the input and output voltages. It is a digital circuit which either allows a signal to pass through as stop, it is called a gate. The logic gates are building blocks at digital electronics. They are used in digital electronics to change on voltage level (input voltage) into another (output voltage) according to some logical statement relating them. A logic gate may have one or more inputs, but it has only one output. The relationship between the possible values of input and output voltage is expressed in the form of a
  • 9. table called truth table or table of combination. Theory Truth table of a Logic Gates is a table that shows all the input and output possibilities for the logic gate. George Boole in 1980 invented a different kind of algebra based on binary nature at the logic, this algebra of logic called BOOLEAN ALGEBRA. A logical statement can have only two values, such as HIGH/LOW, ON/OFF, CLOSED/OPEN, YES/NO, RIGHT/WRONG, TRUE/FALSE, CONDUCTING/NON- CONDUCTING etc. The two values of logic statements one denoted by the binary number 1 and 0. The binary number 1 is used to denote the high value. The logical statements that logic gates follow are called Boolean expressions.
  • 10.
  • 11. Principle Any Boolean algebra operation can be associated with inputs and outputs represent the statements of Boolean algebra. Although these circuits may be complex, they may all be constructed from three basic devices. We have three different types of logic gates .These are the AND gate, the OR gate and the NOT gate. LOGIC STATES 1 0 HIGH LOW +ve -ve ON OFF CLOSE OPEN RIGHT WRONG TRUE FALSE YES NO
  • 12. Basic gates (a) The OR GATE is a device that combines A with B to give Y as the result. The OR gate has two or more inputs and one output. The logic gate of OR gate with A and B input and Y output is shown below: In Boolean algebra, addition symbol (+) is referred as the OR. The Boolean expression:
  • 13. A+B=Y, indicates Y equals A OR B. (b) The AND GATE is a device that combines A with B to give Y as the result. The AND gate has two or more inputs and one output. The logic gate of AND gate with A and B input and Y output is shown below: In Boolean algebra, multiplication sign (either x or.) is referred as the AND. The Boolean expression: A.B=Y, indicates Y equals A AND B. (c) The NOT GATE is a device that inverts the inputs. The NOT is a one input and one output. The logic gate of NOT gate with A and Y output is shown below:
  • 14. In Boolean algebra, bar symbol (_) is referred as the NOT. The Boolean expression: X’ =Y, indicates Y equals NOT A
  • 15. The or gate Aim: TO DESIGN AND SIMULATE THE OR GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2). Theory andConstruction: An OR gate can be realize by the electronic circuit, making use of two diodes D1 and D2 as shown in the figure. Here the negative terminal of the battery is grounded and corresponds to the 0 level, and the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to level 1. The output Y is voltage at C w.r.t. earth.
  • 16. The following interference can be easily drawn from the working of electrical circuit is:  If switch A & B are open lamp do not glow (A=0, B=0), hence Y=0.  If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.  If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.  If switch A & B are closed then (A=1, B=1) Lamp glow, hence Y=1. Truth Table: Input A Input B Output Y 0 0 0 1 0 1 0 1 1 1 1 1
  • 17. The and gate Aim: TO DESIGN AND SIMULATE THE AND GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2), a resistance R. Theory andConstruction: An AND gate can be realize by the electronic circuit, making use of two diodes D1 and D2 as shown in the figure. The resistance R is connected to the positive terminal of a 5V battery permanently. Here the negativeterminal ofthe batteryis grounded and corresponds to the 0 level, and the positiveterminal of the battery (i.e. voltage 5V in the present case) corresponds to level 1. The output Y is voltage at C w.r.t. earth.
  • 18. The following conclusions can be easily drawn from the working of electrical circuit:  If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0.  If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.  If switch A open & B closed (A=0, B=1) then Lamp will not glow, hence Y=0.  If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.
  • 19. Truth Table: Input A Input B Output Y 0 0 0 1 0 0 0 1 0 1 1 1
  • 20. The not gate Aim: TO DESIGN AND SIMULATE THE NOT GATE CIRCUIT. Components: An ideal n-p-n transistor. Theory andConstruction: A NOT gate cannot be realized by using diodes. However an electronic circuit of NOT gate can be realized by making use of a n-p-n transistor as shown in the figure. The base B of the transistor is connected to the input A through a resistance Rb and the emitter E is earthed. The collector is connected to 5V battery. The output Y is voltage at C w.r.t. earth.
  • 21. The following conclusion can be easily drawn from the working of the electrical circuit:  If switch A is open (i.e. A=0), the lump will glow, hence Y=1.  If Switch A is closed (i.e. A=1), the lump will not glow, hence Y=0. Truth Table: Input A Output Y 0 1 1 0
  • 22. The nor gate Aim: TO DESIGN AND SIMULATE THE NOR GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2), an ideal n-p-n transistor. Theory andConstruction: If we connect the output Y’ of OR gate to the input of a NOT gate the gate obtained is called NOR. The output Y is voltage at C w.r.t. earth.
  • 23. In Boolean expression, the NOR gate is expressed as Y=A+B, and is being read as ‘A OR B negated’. The following interference can be easily drawn from the working of electrical circuit is:  If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.  If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.  If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0.  If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0. TruthTable:
  • 25. The nand gate Aim: TO DESIGN AND SIMULATE THE NAND GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2), a resistance R, an ideal n-p-n transistor. Theory andConstruction: If we connect the output Y’ of AND gate to the input of a NOT gate the gate obtained is called NAND. The output Y is voltage at C w.r.t. earth.
  • 26. In Boolean expression, the NAND gate is expressed as Y=A.B, and is being read as ‘A AND B negated’. The following interference can be easily drawn from the working of electrical circuit:  If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.  If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.  If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.  If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.
  • 28. Some Common Applicationsof Logic Gates During the course of discussion about various digital logic gates, we have mainly discussed about the design, property and operation of them. In this article we will look at various applications of logic gates. Their applications are determined mainly based upon their truth table i.e. their mode of operations. In the following discussion we will look at the applications of basic logic gates as well as many other normal logic gates as well.
  • 29. Application of or gate Wherever the occurrence of any one or more than one event is needed to be detected or some actions are to be taken after their occurrence, in all those cases OR gates can be used. It can be explained with an example. Suppose in an industrial plant if one or more than one parameter exceeds the safe value, some protective measure is needed to be done. In that case OR gate is used. We are going to show this with the help of a diagram. The above figure is a typical schematic diagram where an OR gate is used to detect exceed of temperature or pressure and produce command signal for the system to take required actions.
  • 30. Application of and gate There are mainly two applications of AND gate as Enable gate and Inhibit gate. Enable gate means allowance of data through a channel and Inhibit gate is just the reverse of that process i.e. disallowance of data through a channel. We are going to show an enabling operation to understand it in an easier way. Suppose in the measurement of frequency of a pulsed waveform. For measurement of frequency a gating pulse of known frequency is sent to enable the passage of the
  • 31. waveform whose frequency is to be measured. The diagram below shows the arrangement of the above explained operation. Application of not gate NOT gates are also known as inverter because they invert the output given to them and show the reverse result. Now the CMOS inverters are commonly used to build square wave oscillators
  • 32. which are used for generating clock signals. The advantage of using these is they consume low power and their interfacing is very easy compared to other logic gates. The above figure shows the most fundamental circuit made of ring configuration to generate square wave oscillator. The frequency of this type generator is given by Where n represents the number of inverters shows the propagation delay per gate.
  • 33. Construction of logic gates circuit for given truth tables
  • 35. Suppose we have to draw logics gates using truth table given below: We can begin like this:
  • 36. Now that we have a Boolean Sum-Of- Products expression for the truth table’s function, we can easily design a logic gate or relay logic circuit based on that expression:
  • 37. Alternate method: Simplify the output obtained from truth table
  • 38.
  • 39. As a result of the simplification, we can now build much simpler logic circuits performing the same function, in either gate or relay form:
  • 41.
  • 42. Suppose we have to draw logics gates using truth table given below: We can begin like this:
  • 43. Now that we have a Boolean Product-of-Sums expression for the truth table’s function, we can easily design a logic gate or relay logic circuit based on that expression:
  • 44.
  • 45. Bibliography  Wikipedia  Google  Hc verma  Sl arora  School library  Icbse.com