unipolar logic family is a basic of physics and lecture of BSIT basic electronic

1. UNIPOLAR LOGIC FAMILY
 NMOS
 PMOS
 CMOS

2. NMOS
DEFINITION:
 An n-channel metal-oxide semiconductor (nMOS) transistor is
one in which n-type dopants are used in the gate region (the "channel").
A positive voltage on the gate turns the device on.

3. NMOS INVERTER

4. NMOS WORKING
 NMOS is built on a p-type substrate with n-type source and drain diffused
on it. In NMOS, the majority of carriers are electrons. When a high
voltage is applied to the gate, the NMOS will conduct. Similarly, when a
low voltage is applied to the gate, NMOS will not conduct. NMOS is
considered to be faster than PMOS, since the carriers in NMOS, which
are electrons, travel twice as fast as the holes.

5. PMOS
DEFINITION:
 A p-channel metal-oxide semiconductor (pMOS)
transistor is one in which p-type dopants are used in the gate region (the
"channel"). A negative voltage on the gate turns the device on.

6. PMOS WORKING
 P- channel MOSFET consists of P-type Source and Drain diffused on an
N-type substrate. The majority of carriers are holes. When a high voltage
is applied to the gate, the PMOS will not conduct. When a low voltage is
applied to the gate, the PMOS will conduct. The PMOS devices are more
immune to noise than NMOS devices.

7. PMOS INVERTER

8. CMOS
DEFINITION:
 Complementary metal-oxide semiconductor
technology in which p- and n-channel MOS transistors are
used in tandem.

9. CMOS INVERTER

10. CMOS INVERTER
 In CMOS technology, both N-type and P-type transistors are used to
design logic functions. The same signal which turns ON a transistor of
one type is used to turn OFF a transistor of the other type. This
characteristic allows the design of logic devices using only simple
switches, without the need for a pull-up resistor.
 In CMOS logic gates a collection of n-type MOSFETs is arranged
in a pull-down network between the output and the low voltage
power supply rail (Vss or quite often ground). Instead of the load
resistor of NMOS logic gates, CMOS logic gates have a collection
of p-type MOSFETs in a pull-up network between the output and
the higher-voltage rail (often named Vdd).

11. CMOS TRUTH TABLE

12. CMOS ADVANTAGE
 Low Power Consumption: CMOS circuits consume very low power,
making them ideal for battery-operated devices.
 Low Cost: CMOS fabrication process is relatively simple and low-cost
compared to other semiconductor technologies.
 High Speed: CMOS circuits can operate at high speeds, making them
ideal for high-speed digital and analog circuits.
 High Reliability: CMOS circuits have a long lifespan and are highly
reliable, making them suitable for use in critical applications.
1.High Reliability: CMOS circuits have a long lifespan and are highly reliable, making them suitable for use in critical applications.
1.High Reliability: CMOS circuits have a long lifespan and are highly reliable, making them suitable for use in critical applications.

13. CMOS DISADVANTAGE
 Power Dissipation: CMOS circuits can dissipate large amounts of power
when switching from one state to another, resulting in increased heat
generation.
 Limited Voltage Swing: CMOS circuits have a limited voltage swing,
making them less suitable for high-voltage applications.
 Process Variation: The CMOS fabrication process is highly dependent on
process conditions, leading to process variations that can impact device
performance and reliability.
 Vulnerability to Electrostatic Discharge (ESD): CMOS circuits are
vulnerable to Electrostatic Discharge (ESD), which can result in
permanent device damage.
1.Process Variation: The CMOS fabrication process is highly dependent on process conditions, leading to process variations that can impact device performance and reliability.
1.Process Variation: The CMOS fabrication process is highly dependent on process conditions, leading to process variations that can impact device performance and reliability.