1. Electronics Engineer Portfolio
ANUPAMA.U R

2. Short About
Me
Professional
Experience
Technical
Background
Projects
Involved
Education Personal
Information

3. Short About Me
Engineering professional with strong electronics and technological background.
 An expert in PCB design and involved in completing a multi layer high speed board upto 18 layers.
 Highly contributed in complex high speed PCB designs and PCB designs with blind and buried vias (HDI),Signal and Power
Integrity Simulations
 Expertise in Cadence Allegro, Mentor Graphics PADS PCB , Altium Designer, HyperLynx and Spectra Autorouting using .do files,
LabView, GerbTool, Valor
 Sound knowledge of DFM, DFA & DFT concepts is required.
 Technology Experienced are USB, Ethernet ,DDR2 & DDR3 ,HDMI , Bluetooth, Wifi, RF Designs etc.

4. Professional Experience
Organization Designation
Period
From To
Network Systems and
Technologies Pvt. Ltd (NeST) Design Engineer Aug 2007 Oct 2014
QuEST Global Engineering
Services Pvt. Ltd
Design Engineer Oct 2014 Aug 2015

5. Technical Background
Industry Domains Embedded Hardware Systems
Sub Domains
1. Automotive – 4 years
2. Health Care – 1 years
3. Evaluation Kits – 2 years
4. Communication – 2 years
5. Industrial – 2 years
Skills
1. Board Design
2. Circuit Design
3. Firmware Coding
4. Testing and Troubleshooting Boards
Circuit Design
1. Digital Design
2. Analog Design
3. Power supply design
PCB Design
1. Both Digital and Analog Design
2. RF Design
3. Board design of High-speed signals
4. HDI
5. High speed design PCB layout using blind buried vias
(mechanically, space constraint and high speed constraint
board)
6. Multilayer upto 18 layers

6. Technologies Experienced
1. USB 2.0, USB 3.0 , USB Transceiver
2. Flash ,
3. FPGA, Processors, AP SoC
4. Ethernet 2 and Ethernet 3 interface,
5. Battery,DDR2, DDR3, DDR 3 DIMM,
6. HDMI, Flash, RAM,
7. Bluetooth, WiFi
Processors/
Controllers
1. AM1808
2. ZyncSoC (XC7Z030-1FBG676C)
3. ADSP-BF527
4. IMX 5 and 7 processors
Analysis /Simulation tools
1. Allegro PCB SI (Signal Integrity) & PI (Power
Integrity)
2. HyperLynx
3. P-spice
4. EMI Stream
5. Valor

7. Design Tools
1. Allegro Design Entry CIS,
2. Allegro PCB Design GXL (manual and auto routing),
3. Spectra auto routing with .do files,
4. PADS Layout, PADS Router,
5. Dx-Designer Exp 2005,
6. Altium Designer,
7. Protel.
8. KiCAD
9. Eagle
10. Design Entry HDL
11. Labview7.1
12. Dx-Designer Exp 2007
13. GerbTool
Supporting Tools
1. Visio
2. Solidworks eDrwaing
3. AutoCAD.
4. MS Office
Programming Languages
1. Embedded C
2. C++

8. Major Projects Handled
1. AMSEC
Product which is a part of the high quality, high security safes
 Design Complexity :- Mechanically Constraint Board
 Technology Used :- Ethernet interface, Battery, Charger Circuits
2. SmartICE
SmartICE is Ashling's USB2.0 based real-time emulator with full support for: Run-time control , Contact/contactless card-reader interfacing with
full support for Voltage Classes A, B and C, Code-coverage which identifies all tested/partially tested/untested C source statements, functions and modules,
and assembly instructions, Real-time code execution and data access trace system, 4M frames with trigger and filter options, Standalone prototyping
(allows application code to be downloaded to on-board SmartICE FLASH memory for standalone operation (i.e. no host PC)) SmartICE is controlled via the
supplied software running on the host PC. For debugging, both PathFinder and Keil µVision4 driver plug-ins are provided. Prototyping support is provided
via the Ashling PKSC software.
 Design Complexity :- Mechanical and Electrical Constraint Board
 Technology Used :- USB 2.0, USB 3.0 ,Flash , USB Transceiver, FPGA etc

9. 3. TPA Boards
NeST driven project for the development of debugging tool which acts as an interface
between the customer board and the evaluation kit.
 Design Complexity :- Simple Board with 2 layers
4. Ultra Boards
Ultra-XD is a powerful high-speed trace and run-time control debug probe for embedded development on Synopsys' DesignWare ARC™
configurable RISC cores with the Real-time Trace extensions (RTT). Ultra-XD works with Synopsys' MetaWare Debugger for advanced embedded system
debugging and analysis.
Ultra-XD allows: Capture and viewing of program-flow and data-accesses in real-time, non-intrusively Download program from host PC to target
embedded system Exercise program in target (go, step, halt, breakpoints, interrogate memory, registers and variables)
 Design Complexity :- Electrical Constraint Board
 Technology Used :- Ethernet, USB, Flash , DDR 3 DIMM, DDR2

10. 5. Acoustic Processing Hardware Device-Reengineering
The project is the acoustic processing hardware device reengineering project.
 Design Complexity :- PCB Re-Design (Mechanically constraint Board)
6. Parker ELS-P2
A redesign of a board in the automotive field
 Design Complexity :- PCB Re-Design (Mechanically constraint Board)
7. Tablet-PC
A tablet PC is a wireless, portable personal computer with a touch screen interface.
SFO Tablet PC, is an Android based 7-inch e-book tablet that offers 8 GB internal storage,
2 M Pix camera, 1024×600 touch screen, and powered by 1.2GHz processor with Hardware graphic
accelerator. Accelerometer sensor is for changing the view angles to portrait
and landscape depending upon the position in which the user is holding the tablet.
 Design Complexity :- Electrical Constraint Board with , RF Design
 Technology Used :- 1.2GHz processor with Hardware graphic accelerator,
DDR3, Micro SD , Wi-Fi (802.11a/b/g/n) , Bluetooth 4.0 ,
USB 2.0 High speed, 3G, GPS, Head phone Jack,
Microphone, Speaker, 2MP Camera ,Accelerometer

11. 8. ECG-DEMO
The electrocardiogram (ECG or EKG) is a diagnostic tool that is routinely used to assess the
electrical and muscular functions of the heart.
 Design Complexity :- Mechanically Constraint Board
9. Facelift-Controller
The Controller Module Board which interfaces another existing module for communication.
 Design Complexity :- High speed design PCB layout using blind buried vias
(mechanically, space constraint and high speed constraint board)
 Technology Used :- AM1808 processor ,Ethernet , DDR2
10. Internal Project
Internal project conducted to test interface using firmware coding of the controller functions and modify its functions.
 Design Complexity :- Firmware programs to test the functionality of the processor

12. 11. FPGA IF Board
An interface board which interfaces the Spartan FPGA board to a board under consideration.
 Design Complexity :- High Speed Design
12. M7-FARIA
The Controller Module Board which interfaces another existing module for communication.
 Design Complexity :- Mechanical Constraint Boards
 Technology Used :- IMX3 ,DDR2, Flash , USB, Ethernet
13. Opella XDS-560
Opella-XDS560 is an ultra-high-speed Debug Probe for embedded development on Texas Instruments (TI) Processor and DSP platforms.
Opella-XDS560 is designed to work with TI’s Code Composer Studio (CCS) IDE and seamlessly plugs into the CCS environment thus allowing you to
conveniently and quickly debug your application code actually running on your target system.

13. 14. Distributed Process Input Output( DPIO) Re-engineering
The main functionality of this card is to collect the ON/OFF status of the load connected
to boards through a field bus and send this status information to a CPU card.
15. BSIS
The project is based on industrial sector
16. Resolution Convertor
Resolution Convertor performs VGA - VGA video conversion to support different standards
17. Expert VMU Board
Design and Development of a Vehicle Management Unit
18. BNS
BNS is a vehicle navigation system unit.
 Technology Used :- USB 2.0,SD ,SATA, LCD, Headphone, Mic , RS232, JTAG, WLAN ,CAN, GPRS, GPS, AM/FM Antenna

14. Educational Qualification
# College / University
Educational
Degree/Diploma
Subject / Stream
1
Govt. Polytechnic College
Neyattinkara /
Board Of Technical Education Kerala.
Diploma Electronics and
Communication
2
Distance Education /
Institution of Engineers India BE
Electronics and
Communication
3
Distance Education /
TNOU BBA
Business
Administration
4
Distance Education /
TNOU MBA Operations Research

15. Personal Information
Date of Birth : 03 Nov 1986
Gender : Female
Marital Status : Married
Al-Nabba’ah , Sharjah, UAE
+971 56 8982 527
+971 50 3341 457
anupama_ur2005@yahoo.co.in
www.linkedin.com/in/anupama-sujith-24a507b3