Have an experience as an Intern in IP Verification, STMicroelectronics Pvt. Ltd. .My key skills are UVM (Universal Verification Methodology), System Verilog, Verilog, APB, AXI, UNIX, C, C++, Python. Actively looking for a job.

1. CHARMI SHAH
E-Mail: charmi.sshah93@gmail.com
Phone: +91 7600237822, 800247822
Entry Level Assignments: IP/SOC Verification | RTL Designing
“Fresh, hardworking, detail-oriented team player offering strong communication skills and capabilities that
contribute to company objectives”
Location Preference: India | Overseas ~ Industry Preference: Semi-Conductor
P R O F I L E S U M M A R Y
 M.Tech. (Communication) and B.E. (Electronics) professional; merit of completing internship
STMicroelectronics Pvt. Ltd., Greater Noida and gained comprehensive knowledge in designing, debugging and
in verification
 Expertise in facilitating development of generic verification methodology to verify memory model using SV-UVM
 Proficiency in grasping new technical concepts quickly and utilizing them in a productive manner
 Hands-on experience on verification process automation by integrating tool
 Proven skills in analyzing & interpreting unique problems, with a combination of training experience and logical
thinking to find the right solutions
 Rich cross team work experience and proven ability to work with different teams
 Focused & goal-driven with strong work ethics and commitment to offer quality work and excellent relationship
management skills to manage time effectively
T E C H N I C A L S K I L L S
HDL-HVL Language: Verilog, System Verilog
Verification Methodology: UVM (Universal Verification Methodology)
Programming Languages: C, Basics of C++
Scripting Languages: Python, Perl (Basic)
Tools: NCSim, Questasim, Protel, Keil, Xilinx, HFSS, MATLAB
Hardware: ARM7, Microcontroller 8051, Microprocessor 8085
Operating System: UNIX, Windows 98/2000/XP/VISTA/7/8
I N T E R N S H I P
Jun’15 – May’16 STMicroelectronics Pvt. Ltd., Greater Noida as Intern
Projects Handled:
Project Title: SRAM Verification Environment Development for Functional
Period: Jun’15 – Oct’15
Responsibilities:
 Designed verification environment which verified memories like SRAM with single and dual port
 Devised reference model for functional, ran it with different test cases and checked its compatibility with DUT
(Design Under Test)

Project Title: Development of SRAM Verification Model with Timing Constraints
Period: Oct’15 – Jan’16
Responsibilities:
 Created an environment for checking timing violations
 Assisted in adding violations like a set-up, hold at clock edge and executed it with different test cases

Project Title: ROM Verification Environment Development
Period: Jan’16 – Mar’16
Responsibilities:
 SRAM file which could work as SRAM as well as ROM according to the requirement of users
 ROM environment with functional as well as timing constraint


2. Project Title: Coverage for Verification Methodology of Memory Environment
Period: Mar’16-April’16
Responsibility:
 Interfaced in verifying the environment which was created for the model and developed coverage using cover groups
Project Title: Developed Environment with integration of two IPs
Period: April’16-May’16
Responsibility: 
 Integrated two IP's using virtual sequence. Output of PLL will work as an input for memory and verify it at top level.
Control this prototype at top level using virtual sequencer.
A C A D E M I C D E T A I L S
 M.Tech. (Communication) from Nirma University, Ahmedabad
 B.E. (Electronics) from B.V.M. College, Vvnagar, GTU with 8.1 CGPA in 2014
 XII from B.V.B’s, Gujarat Board, with 80.4% in 2010
 X from B.V.B’s, Gujarat Board, with 90.6% in 2008
A C A D E M I C P R O J E C T S
Major Project:
Project Title: Automatic Street Management System
Period: July’13 – April’14
Keywords: LPC2148 ARM controller, Temperature sensor, IR sensor, LDR, Relay, DCmotor, C language.
Description: The system was programmed for street lamps so that they were automatically turned off during the
hours in daylight and only operate during night and heavy raining or bad weather. It could display
temperature, humidity and some important notice on LCD.
Minor Projects:
 Calculator: Python based GUI calculator that performed simple mathematical operation
 Tic-Tac-Toe Game: Python based simple game that ran on the command prompt
 Watchdog Timer: It was implemented using VHDL Language on Spartan 3E FPGA Board
 Mail in Linux: Mail send and read using Linux command with use of SSH
 Traffic Signal Light: When turned on the power supply, the BCD counter started and all 3 LED’s performed on and off
function as per traffic light using 555 timer
 Mobile Charger: Charged the mobile using transformer in order to make charger energy efficient
 Adjustable Voltage Regulator: Regulated the voltage using LM317 IC
 Swastik Antenna: Devised antenna in swastika slot using HFSS tool
S E M I N A R
 Attended seminar on Frequency Independent Antenna at Ahmedabad in 2015
Date of Birth: 2nd January 1993
Languages Known: English, Hindi and Gujarati
Address: #F3, Lotus Royal PG, Spice Garden, Bangalore - 560037
Address: #F3, Lotus Royal PG, Spic
R E F E R E N C E S
Ms. Deepshikha Singh Mr. Ravi Patel
Manager, FEM Team Project Lead, IP Verification Team
STMicroelectronics Pvt. Ltd. STMicroelectronics Pvt. Ltd.
Mail ID: deepshikha.singh@st.com Mail ID: ravikumar.patel@st.com