Neurosynaptic chips

MT5009 ANALYZING HI-TECHNOLOGY OPPORTUNITIES
Neurosynaptic Chip
Shen Xiaotong A0098666H
Zhang Chunyan A0128996H
Jiang Yaohong A0128997E
Wang Junfang A0129148B
Li Bing A0119251M
1
For other technologies see:
http://www.slideshare.net/Funk98/presentations

Overview
• Introduction
• Comparison with Conventional Chips
• Performance Analysis
• Cost Analysis
• Application
• Conclusion
2

Overview
• Introduction
• Cost Analysis
• Application
• Conclusion
3

Introduction
Biological Neural System
• Neurons and Synapses
Signals: Electrical -> Chemical -> Electrical
4

Introduction
Artificial Neural Network
• Each neuron can perform non-linear operations.
• The algorithm is designed to mimic the behavior of the biological neural
network.
• Currently, the algorithm is running on a normal PC.
• New parallel computing chips can help to improve the learning process.
– Neurosynaptic chips/brain-inspired chips
– The hardware design also mimics the biology brain
– Deep learning is also based on neural network
5

Introduction
Artificial Neural Network
• “We require exquisite numerical precision over many logical steps to
achieve what brains accomplish in very few short steps.” - John von
Neumann
• A neural network is a massively parallel distributed processor made up
of simple processing unit, which has a natural propensity for storing
experiential knowledge and making it available for use.
6

Introduction
Neurosynaptic System
7

Overview
• Introduction
• Cost Analysis
• Application
• Conclusion
8

Comparison with Conventional Chips
• Architecture
• Complexity
• Performance
– Lower power
– Denser package
– Fast speed
• Commercial Availability
9

Architecture
Conventional Computer Brain Inspired Computer
Architecture Von Neumann Neural Network
Computing unit CPU Synaptic Chip (e.g. TrueNorth)
Storing unit Memory Synaptic Chip (e.g. TrueNorth)
Computing Serial (multiple cores) Massively Parallel
Communication CPU <-> Memory Neurons <-> Neurons
Advantage Processing (Logical, Analytical) Learning (Pattern Recognition)
10

Architecture
• Processing and Storage are separated in CPU.
• CPU is built for a linear process to handle linear sequence of events.
• Synaptic chip integrates processing with storage.
• Synaptic chip process the information in a massively parallel fashion.
• Each neuron is able to process a piece of information and store it locally.
• Synapses helps with data communication between neurons.
• Synapses decides the connectivity between neurons and thus be able to
rewire them.
http://www.forbes.com/sites/alexknapp/2011/08/26/how-ibms-cognitive-computer-works/
11

Architecture
• Example: Converting the color image (480x360x3) to gray image
– Gray value = (red + green + blue)/3;
– CPU: 480x360 =172800 iterations of linear processing.
– Synaptic chips, with 480x360x3 input neurons. 480x360 output neurons, For each output
neurons, compute the gray value. One iteration of parallel processing
• CPU is good at linear processing to make sure the logic sequence is
correct.
• Synaptic chip is good at massively parallel processing the image data.
– Image processing
– Pattern recognition
– Network simulation
http://www.forbes.com/sites/alexknapp/2011/08/26/how-ibms-cognitive-computer-works/
12
……

Complexity
13

Power Efficiency
• > 1000 times as efficient as chips made with the conventional architecture.
• In 2012, Sequoia IBM conventional supercomputer simulating brain using
500 billion neurons and 100 trillion synapses, running at 1/1500 of brain
speed, requires 12 GW of power.
• Each TrueNorth consumes 0.07w (Average 63mw, Maximum 72mw).
• The same simulation requires 27.3~35 kw.
Conventional Chips TrueNorth
50~100 w/(cm*cm) 0.02 w/(cm*cm)
Source: The brain chip Robert F. Service
Science 8 August 2014: 345 (6197), 614-616.
14

Power Efficiency
• The efficiency of conventional computers is limited because they
store data and program instructions in a block of memory that’s
separate from the processor that carries out instructions. As the
processor works through its instructions in a linear sequence, it has
to constantly shuttle information back and forth from the memory
store—a bottleneck that slows things down and wastes energy.
• While synaptic chips work parallelly, and the information can be
stored in numerous synaptic chips. The integration of processing
and storing avoids data shuttling and makes computing more energy
efficient.
• About 176,000 times more efficient than a modern CPU running the
same brain-like workload.
http://www.extremetech.com/extreme/187612-ibm-cracks-open-a-new-era-of-computing-with-brain-like-chip-4096-cores-1-million-neurons-5-4-billion-transistors
http://www.technologyreview.com/news/529691/ibm-chip-processes-data-similar-to-the-way-your-brain-does/
15

Power Efficiency
16

Denser Package
• Denser package
– TrueNorth size is 4.3 cm^2
– In order to achieve the same computational performance of Sequoia
IBM conventional supercomputer, it requires 400K~500K TrueNorth
chips.
– The size will be about 172~215 m^2.
http://www.extremetech.com/extreme/131413-us-retakes-supercomputing-crown-with-16-petaflops-sequoia-china-promises-100-petaflops-by-2015
http://www.artificialbrains.com/darpa-synapse-program
Sequoia supercomputer Synaptic chip wall 17

Faster Speed
• Faster Speed
– Multi-object detection and classification with 400-pixel-by-240-pixel three-color
video input at 30 frames per second.
– more than 160 million spikes per second (5.44 Gbits/sec)
– TrueNorth vs Intel Core i7 CPU 950 with 4 cores and 8 threads, clocked at
3.07GHz (45nm process, 2009)
www.sciencemag.org/content/345/6197/668/suppl/DC1 18

Commercial Availability
http://www.cs.utah.edu/asplos14/files/Jeff_Gehlhaar_ASPLOS_Keynote.pdf
19

Software CPU Synaptic Chip
Language C,C++,Java, etc IBM Corelet Language
Operating System Windows, iOS, Linux New operating system
Application Office, Game, etc New application (Corelet Library)
Algorithm General (include learning) Learning Algorithm
Compiler Available New compiler
Debugger Available New debugger
Hardware CPU Synaptic Chip
Dominant Design Intel, AMD No (TrueNorth and NPU are prototypes)
Quantity 1 (Generally) ~50K (for Human-brain scale, but growing)
Breakthrough Intel 4004 in 1971 IBM TrueNorth in 2014 (not on market)
Manufacturing Transistor process Transistor process (45nm, 28nm)
http://www.computerworld.com/article/2484737/computer-processors/ibm-devises-software-for-its-experimental-brain-like-synapse-chips.html
http://www.research.ibm.com/software/IBMResearch/multimedia/IJCNN2013.corelet-language.pdf
Amir, Arnon, et al. "Cognitive computing programming paradigm: a corelet language for composing networks of neurosynaptic cores." Neural Networks (IJCNN), The 2013 International Joint Conference on. IEEE, 2013.
http://darksilicon.ucsd.edu/2012/assets/slides/13
20

http://www.computerworld.com/article/2484737/computer-processors/ibm-devises-software-for-its-experimental-brain-like-synapse-chips.html
http://www.research.ibm.com/software/IBMResearch/multimedia/IJCNN2013.corelet-language.pdf
Amir, Arnon, et al. "Cognitive computing programming paradigm: a corelet language for composing networks of neurosynaptic cores." Neural Networks (IJCNN), The 2013 International Joint Conference on. IEEE, 2013.
http://darksilicon.ucsd.edu/2012/assets/slides/13
Current Status
Switching Point
21

• However, the Qualcomm’s zeroth chip (Neural Processing Unit)
may be incorporated into the new smartphone in 2015.
– “The Zeroth software is being developed to launch with Qualcomm’s Snapdragon
820 processor, which will enter production later this year. The chip and the
Zeroth software are also aimed at manufacturers of drones and robots.”
http://www.technologyreview.com/news/535631/smartphones-will-soon-learn-to-recognize-faces-and-more/
https://www.youtube.com/watch?v=0D9I0SBGAPY
https://www.youtube.com/watch?v=zxHIVWXVYi0
http://www.technologyreview.com/featuredstory/526506/neuromorphic-chips/
April 2014
NPU works together with CPU.
22

http://www.technologyreview.com/featuredstory/526506/neuromorphic-chips/ 23

http://research.ibm.com/cognitive-computing/neurosynaptic-chips.shtml#fbid=YQv631tFS2L 24

Overview
• Introduction
• Cost Analysis
• Application
• Conclusion
25

26
Performance
Dimension Matrix
Neurons Synapses
Power
Consumption
Algorithm
Neuromorphic
System
Artificial
Neural
Network
‘+’: denotes analysis has been done

27
Performance
Neuromorphic Systems Status
http://research.ibm.com/cognitive-computing/neurosynaptic-chips.shtml#fbid=tVSs3tKj1tw
http://www.research.ibm.com/articles/brain-chip.shtml
http://research.ibm.com/cognitive-computing/neurosynaptic-chips.shtml#fbid=i9UhV_HagUs
http://www-03.ibm.com/press/us/en/pressrelease/44529.wss
http://rt.com/usa/202323-brain-chip-drone-darpa/
http://www.artificialbrains.com/spinnaker#hardware
Stanford
Univesity
Neurogrid
(2009)
HRL
Neuorm
orphic
chip
(2014)
SpiNNake
r HBP
(2012)
HiCANN
HBP
(2012)
IBM
TrueNort
h
(2014)
Human
Brain
Neurons / Prototype 1.00E+06 2304 2.00E+07 1.20E+06 1.60E+07 2.00E+10
Synapses / Prototype 8.00E+09 292000 2.00E+10 3.00E+08 4.00E+09 2.00E+14
Power Consumptions
(mW/cm^2)
50 120 1000 3000 20
10
mW/cm3
Manufacturing process
(nm)
180 90 130 65 28

28
Performance
Neuromorphic Systems Status
http://rt.com/usa/202323-brain-chip-drone-darpa/
http://www.artificialbrains.com/spinnaker#hardware

29
Performance
IBM Cognitive Chip
Basical Structure
Prototype of IBM cognitive
computer
http://digi.163.com/14/0811/06/A3BKCVHG001618H9.html
Defense Advanced Research Projects Agency (DARPA)
SyNAPSE(Systems of Neuromorphic Adaptive Plastic Scalabe
Electronics)
Brain-inspired computer architecture, event-driven

30
Performance
IBM Cognitive Chip
Rate of Improvement of IBM TrueNorth Prototype
Year 2013 2014 2017 2018 Human Brain
Neurons 1.00E+06 1.60E+07 4.00E+09 1.00E+10 2.00E+10
Synapses 4.00E+09 1.00E+12 1.00E+14 2.00E+14
Power Consumptions
(W)
5.45E+04 4000 1000 20

31
Performance
IBM Cognitive Chip
CAGR=1160%
CAGR=531%
CAGR=-172%

32
Artificial Neural
Network
ANN: To simulate the biological brain with nonlinear, dynamic,
statistical mathematic model.
Blue Brain Project
•EPFL
•IBM BlueGene L/P supercomputer
•Open source simulation software NEURON www.neuron.yale.edu/neuron/
Blue Brain Project
Cortical
column
(2006)
Rat cortical
column
(2007)
Equivalent honey
bee brain
(2012)
Rat brain
neocortical
(2014)
Full human
brain
(2023)
Neurons 10000 10000 1.00E+06 2.10E+07 8.60E+10
http://bluebrain.epfl.ch/page-59952-en.html
http://www.artificialbrains.com/blue-brain-project

3333
Artificial Neural
Network
http://bluebrain.epfl.ch/page-59952-en.html
http://www.artificialbrains.com/blue-brain-project
CAGR=160%

34
Performance
Avatar Project
Estimated
2045 Singularity!

Overview
• Introduction
• Cost Analysis
• Application
• Conclusion
35

Cost Analysis
36
Per transistor Per Neurosynaptic
Chip
One artificial
brain

37
Cost Analysis
neurons
5.4 billion transistors
10
102
14
102
IBM TrueNorth (2014)
×2.7E-08$ per transistor 145.8$ per chip
÷1.60E+07 neurons per chip 1250 chips
synapses ÷4.00E+09 synapses per chip 50000 chips
One artificial brain: 1250~50000 chips
182250$~7.29E+06$

38
Cost Analysis
Trend Prediction
According to the cost trend of per
transistor, we can predict the lowest
cost for one transistor:
2.7E-08$
http://electroiq.com/petes-posts/2015/01/26/exponentially-rising-
costs-will-bring-changes/

39
Cost Analysis
According to the Moore's Law, we can predicte the number of transistors in
one chip in the future.
year 2014 2016 2017 2018 2020 2022 2024
number 5.40E+9 1.08E+10 1.53E+10 2.16E+10 4.32E+10 8.64E+10 1.73E+11
number of transistors per chip

40
year 2014 2017 2018
cost 145.8 413.1 583.2
Cost Analysis
According to the price we assumed previousely, we can get the
following result:

Cost Analysis
According to the table below,we can calculate the interval number of chips:
41
Rate of Improvement of IBM TrueNorth Prototype
Year 2013 2014 2017 2018
Human
Brain
Neurons 1.00E+061.60E+07 4.00E+09 1.00E+10 2.00E+10
Synapses 4.00E+09 1.00E+12 1.00E+14 2.00E+14
Power
Consumptions (W)
5.45E+04 4000 1000 20

42
Cost Analysis
year 2014 2017 2018
low 1250 5 2
high 50000 200 4
The number of chips for one artificial brain
2013 2014 2015 2016 2017 2018 2019
10
1
10
2
10
3
10
4
10
5
year
thenumberofchips
low
high

43
Cost Analysis
year 2014 2017 2018
low 1.82E+05 2065.5 1166.4
high 7.29E+06 82620 2332.8
Total cost for one artificial brain ($)
2013 2014 2015 2016 2017 2018 2019
10
4
10
5
10
6
10
7
10
8
year
totalcost($)
low
high
CAGR=-789%
CAGR=-253%

Cost Analysis
Reasons for cost Reduction of Neuromorphic chips
-Increase in the number of manufacturers
-Mass production
-The emergence of new technology
-Increase in demand
-Invention of new materials with less cost
-Cheaper and more accessible after market parts and repair
-Multifunctional structures
44

Overview
• Introduction
• Cost Analysis
• Application
• Conclusion
45

Application
46

Application
Public safety
Object detection
 Roller robot
 search-and-rescue robots
 has 32 video cameras
 beam back data from hazardous
environments.
 solar-powered leaf
 detect changes in the environment
 send out environmental and forest
fire alerts.
http://research.ibm.com/cognitive-computing/neurosynaptic-chips.shtml#fbid=JOW40Q37jNX
http://asmarterplanet.com/blog/2014/08/introducing-brain-like-chip-revolutionize-computing.html
47

Application
Public safety
 Jellyfish Robot:
 monitor shipping lanes for safety
 sense tsunamis
 environmental protection
Based on its advantage：
 smarter sensors built from these chips could bring the real-time
capture and analysis of various types of data closer to the point
of collection.
48

Application
Vision assistance
Vision assistance for the blind
Emulating the visual cortex,
low-power, light-weight eye
glasses designed to help the
visually impaired could be
outfitted with multiple video and
auditory sensors that capture
and analyze this optical flow of
data.
Image Processing
49

Application
Vision assistance
 Synesthetic feedback
Surround sound is used to indicate the location of point of
interest and provide an audible guidance through the
pathway.
 Visual cues
For users with residual sight, point of interest or obstacles
can be highlighted by displaying either overlapping
symbols or braille keywords.
50

Application
Vision assistance
 Neuromorphic Vision Sensors
Dynamic vision sensor, output activity-driven events, inspire new
forms of machine vision and audition.
These kinds of vision sensor can be used in such as robotics and
surveillance.
51

Application
Vision assistance
Several neuromorphic chips connected serially by analogy to human
visual system: can attend to interesting objects in the visual field.
52

Application
health monitoring
Thermometers that can smell for home health monitoring
 Sensors combined with
neuromorphic chips the in future
medical devices could recognize
odors from certain bacteria.
 This is a hand-held thermometer
for diagnosing minor illness or
infection, It can smell what
disease you have and notify you if
a doctor visit is required.
53

Application
Future computing technology
 super computer
highly scalable computational challenges
hierarchical storage-class memory
interactive supercomputing at the exascale level
The Neuromorphic Computing Platform should enable the
development of prototype systems for prediction making,
data mining, spatial and temporal pattern detection.
54

Application
Future computing technology
 super computer
Weather forecast Oil exploringData mining Cosmological
simulation 55

Application
others
 coversation flower
A flower that can see and hear, recognizing people and responding to a
conversation.
It’s got a series of cameras and microphones in the center, 360-degree
binocular vision and acoustic triangulation to localize speakers. Flower
opens in response to energy and reciprocity of the conversation.
can be used in Business
meetings
Conversation sensors could
identify and understand voice
and appearance to
automatically generate
transcripts.
Speech recognition
56

Application
vision in the future
How about using a brain chip in the hospital operating room?
During exploratory surgery, doctors could perform real-time
analysis of human tissue samples—reducing the need for tissue
removal or for additional surgeries.
Automakers could use the chip to help pilot the driverless cars
of the future.
neuromorphic chips could be integrated into smart phones to
improve their visual and voice recognition.
57

Overview
• Introduction
• Cost Analysis
• Application
• Conclusion
58

Conclusion
• Geometrical Scale
– The size scales down, the numbers scales up
– Post 7-nm Challenge
• Cognitive computing
59

Conclusion
Geometrical Scale
• The size scales down, the numbers scales up
Graph source: www.iue.tuwien.ac.at/phd/filipovic/node20.html 60

Conclusion
Post 7-nm Challenge
• The imminent breakdown in conventional chip operation and chip materials
as we shrink transistor gates from today's 14nm process size to 10nm and
7nm.
• Beyond 7nm gate current leakage
• The limit of silicon technologies
• New directions for next generation of computers:
– New materials: Carbon nanotubes replacing CMOS
– New architecture: Neurosynatpic chips
http://www.theregister.co.uk/2014/07/09/ibm_3billion_megabuck_r_and_d/ 61

Conclusion
Cognitive Computing
62
http://www.kurzweilai.net/ibm-unveils-cognitive-computing-chips-combining-digital-neurons-and-synapses

Conclusion
Cognitive Computing
• The machine would eventually smarter than human.
63
http://p9.hostingprod.com/@modha.org/blog/2013/06/ibm_mapping_the_path_to_cognit.html

THANK YOU!
64

Q&A
65

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