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Kai Xie kaixie@usc.edu, (213)290-7432
Objective: Electrical IC Design Engineer 2677 Ellendale Pl, Los Angeles, CA, 90007
EDUCATION
University of Southern California, Los Angeles, CA Aug 2014 - Dec 2015
• Master of Science in Electrical Engineering
• VLSI Emphasis
University of Southern California, Los Angeles, CA Aug 2010 - May 2014
• Bachelor of Science in Electrical Engineering
• Dean’s List, W.V.T Rusch Undergraduate Engineering Honors Program
SKILLS
• Languages: Perl, Matlab, C/C++
• Simulation Tools: ModelSim, PSpice
• Synthesis Tools: Cadences Virtuoso, Xilinx Tools
WORKING EXPERIENCE
Bezalel Inc. Los Angeles, California
Title: CTO May 2014 - Current
Long Distance Wireless Charging(System Design, Prototype)
• Collaborated in a 5 member team to build a long term wireless charging station
• Worked with In-Car-Wireless Charging, Antenna, Battery, Voltage Converters
• Website: bezalel.co, Youtube: goo.gl/oILwAV, Prototype: goo.gl/5u2nMh, goo.gl/tKK08P
ACADEMIC PROJECTS
Pipe-Line ADC Implementation (Cadence, Layout, Matlab) May 2015 - Dec 2015
• Designed a 10 GHz, pipe-line, SAR-ADC; implemented the design flow
• Innovated the idea of SAR to be pipe-lined to achieve a higher resolution
• Designed the DAC capacitor array for comparison reference for SAR stages
VLSI System Design (RTL, Cadence, Layout) May 2014 - Spet 2014
• Verilog design on digital, ALU core design and layout
• RTL set time check and hold time check, design MUX, adder, abstracter, and divider
• Six-bit ripple carry-in adder design and layout for ALU
Communication Electronic (LNA, TIA, VCO, Mixer) May 2013 - Dec 2013
• Designed the Radio Receiver of 200kHz input, 50 ohm input
• L match between different stages
• With Hand-on Solder experience on building the real topology
Buck-Converter (Switch-Cap, Voltage Change, PCB Layout) May 2011 - Dec 2011
• Built the Buck-Converter with Components ordered and PCB designed
• Had 555 Timer with Op-Amp chips
• Current coupled with capacitors, achieved 5V down to 3V conversion with 70%+ duty cycle
Electrical Guitar (Filters, Wood Prototype) Aug 2012 - Dec 2012
• Designed a cigar-box guitar with electronic pick-up
• Had filters designed for high-pass, low-pass, and band-width
• Demoed the filter with guitar connected with an audio output
Sigma-Delta Modulator Tape-out (ADC, ESD, Cadence, Layout) May 2015 - July 2015
• Designed the sigma-delta modulator and layout the design
• Connected the design with guarding rings, ESD protections, and reversed diodes
• Connected the double Op-Amp, Comparator and DFF to the I/O buffer and Bounding Pads

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RF_resume

  • 1. Kai Xie kaixie@usc.edu, (213)290-7432 Objective: Electrical IC Design Engineer 2677 Ellendale Pl, Los Angeles, CA, 90007 EDUCATION University of Southern California, Los Angeles, CA Aug 2014 - Dec 2015 • Master of Science in Electrical Engineering • VLSI Emphasis University of Southern California, Los Angeles, CA Aug 2010 - May 2014 • Bachelor of Science in Electrical Engineering • Dean’s List, W.V.T Rusch Undergraduate Engineering Honors Program SKILLS • Languages: Perl, Matlab, C/C++ • Simulation Tools: ModelSim, PSpice • Synthesis Tools: Cadences Virtuoso, Xilinx Tools WORKING EXPERIENCE Bezalel Inc. Los Angeles, California Title: CTO May 2014 - Current Long Distance Wireless Charging(System Design, Prototype) • Collaborated in a 5 member team to build a long term wireless charging station • Worked with In-Car-Wireless Charging, Antenna, Battery, Voltage Converters • Website: bezalel.co, Youtube: goo.gl/oILwAV, Prototype: goo.gl/5u2nMh, goo.gl/tKK08P ACADEMIC PROJECTS Pipe-Line ADC Implementation (Cadence, Layout, Matlab) May 2015 - Dec 2015 • Designed a 10 GHz, pipe-line, SAR-ADC; implemented the design flow • Innovated the idea of SAR to be pipe-lined to achieve a higher resolution • Designed the DAC capacitor array for comparison reference for SAR stages VLSI System Design (RTL, Cadence, Layout) May 2014 - Spet 2014 • Verilog design on digital, ALU core design and layout • RTL set time check and hold time check, design MUX, adder, abstracter, and divider • Six-bit ripple carry-in adder design and layout for ALU Communication Electronic (LNA, TIA, VCO, Mixer) May 2013 - Dec 2013 • Designed the Radio Receiver of 200kHz input, 50 ohm input • L match between different stages • With Hand-on Solder experience on building the real topology Buck-Converter (Switch-Cap, Voltage Change, PCB Layout) May 2011 - Dec 2011 • Built the Buck-Converter with Components ordered and PCB designed • Had 555 Timer with Op-Amp chips • Current coupled with capacitors, achieved 5V down to 3V conversion with 70%+ duty cycle Electrical Guitar (Filters, Wood Prototype) Aug 2012 - Dec 2012 • Designed a cigar-box guitar with electronic pick-up • Had filters designed for high-pass, low-pass, and band-width • Demoed the filter with guitar connected with an audio output Sigma-Delta Modulator Tape-out (ADC, ESD, Cadence, Layout) May 2015 - July 2015 • Designed the sigma-delta modulator and layout the design • Connected the design with guarding rings, ESD protections, and reversed diodes • Connected the double Op-Amp, Comparator and DFF to the I/O buffer and Bounding Pads