IBM PureData System for Analytics Architecture - IBM Redbooks

4. Field
Programmable Gate Arrays
on stream

6. divide and conquer
Figure 1 AMPP architecture
Host
Host
Advanced
Analytics
BI
ETL
Loader
Disk
Enclosures
S-Blades Network
Fabric
FPGA CPU
Memory
FPGA CPU
Memory
FPGA CPU
Memory

7. Figure 2 Inside S-Blade
Host
Host
Memory FPGA CPU NIC
Memory FPGA CPU NIC
Memory FPGA CPU NIC