8051 microcontroller architecture and its adressing modes

1. Microcontroller and Embedded
Systems
18 Mechatronic Engineering 5th Semester
Lecture-3
Basic Architecture of 8051 Microcontrollers
and 8051 Addressing Modes

2. 8051 MICROCONTROLLER
ARCHITECTURE

3. 8051 Microcontroller
Block diagram

4. Features of 8051
• 8 bit CPU
• 16-bit program counter(PC) and data pointer (DPTR)
• 8-bit program status word(PSW)
• 8-bit stack pointer
• 4 Kbytes of on-chip program memory(ROM)
• 128 bytes of on-chip data random access memory(RAM)
• 8 bit bidirectional data bus
• 16-bit unidirectional address bus

5. Features of 8051
• 64Kbytes of program memory address space
• 64Kbytes of data memory address space
• Two 16 bit timers/counters
• 16 bit address bus multiplexed with port 0 and port 2
• 32 bit bidirectional I/O lines can be either used as 4 8-bit ports
• On-chip clock oscillator
• Control Registers
• Serial data receiver/transmitter
• Interrupt source
• Special features like USART, ADC, etc
• It is a CISC based Microcontroller with Harvard Architecture (separate program and data
memory).

6. Detailed Architecture of 8051 microcontroller

7. ALU (Arithmetic Logic Unit)
• it is 8 bit ALU. Part of CPU
• Performs arithmetic, logical and bitwise operations
• Used in manipulating data (either 8 bit or 1 bit)
• Individual bit of any register can be set, reset, cleared, complimented
with the help of logical computation,.
• Several registers are connected to it.

8. Accumulator or A register
• The Accumulator or Register A is the 8 bit register which is most important and most
used 8051 Microcontroller SFRs.
• It is located at the address E0H in the SFR memory space.
• The Accumulator is used to hold or store the data for almost all the ALU Operations like:
• Arithmetic Operations like Addition, Subtraction, Multiplication etc.
• Logical Operations like AND, OR, NOT etc.
• Data Transfer Operations (between 8051 and External Memory)
• register is used to accumulate (or store) the result of all Arithmetic and most of the
Logical Operations.
• It can hold an 8-bit (1-byte) value
• More than half of the 8051s 255 instructions manipulate or use the accumulator in some
way.
For example, if you want to add the number 10 and 20, the resulting 30 will be stored in
the Accumulator. Once you have a value in the Accumulator you may continue processing
the value or you may store it in another register or in memory.

9. Instruction decoder and control
• When an instruction is fetched – it is loaded in the instruction register
• Decoder decodes the instruction and establishes the sequence of
events to follow
• Instruction cycle: Instruction cycle is defined as the time required for
completing the execution of an instruction
• Instruction register is not programmable
• Control unit generates control signals necessary for communication
between the processor and peripheral

10. Instruction Register (IR):
• store instructions
• When one instruction is completed, next instruction is fetched in
memory for processing.

11. CPU Registers
• A Register
– 8 bit – Direct connection with ALU
– In multiplication- one of 8 bit operands stored in A and after
operation it stores lower byte in A
– In division- holds 8 bit dividend & quotient is stored in A
• B Register
– 8 bit
– Used with multiply and divide operations
– In multiplication- after operation it stores higher byte in B
– In division- holds 8 bit divisor & reminder is stored in B

12. Registers

13. Program status word(D0H)
• PSW or Program Status Word Register is also called as Flag Register and is one of the important SFRs.
• The PSW Register consists of Flag Bits, which help the programmer in checking the condition of the result
and also make decisions.
• Flags are 1-bit storage elements that store and indicate the nature of the result that is generated by
execution of certain instructions. The following image shows the contents of the PSW Register.

14. Stack Pointer(81H)
• SP or Stack Pointer Contains data item on the top of stack and it
indicates the next data to be accessed.
• The Stack Pointer is an 8-bit register and upon reset, the Stack Pointer
is initialized with 07H.
• When writing a new data byte(storing) into the stack, the SP (Stack
Pointer) is automatically incremented by 1 and the new data is
written at an address SP+1.
• When reading data from stack, the data is retrieved from the Address
in SP and after that the SP is decremented by 1 (SP-1).

15. Data Pointer
• The Data Pointer is a 16-bit Register and is physically the combination
of DPL (Data Pointer Low) and DPH (Data Pointer High) SFRs.
• Therefore Data Pointer can be used as a single 16-bit register (as
DPTR) or two 8-bit registers (as DPL and DPH).
• DPTR doesn’t have a physical Memory Address but the DPL (Lower
Byte of DPTR) and DPH (Higher Byte of DPTR) have separate
addresses in the SFR Memory Space.
• DPL = 82H and DPH = 83H.
• The DPTR Register is used by the programmer, addressing external
memory (Program – ROM or Data – RAM)

17. Program Counter
• Its 16 bit (2 byte) register
• Specifies the address of next instruction to be executed and is
incremented each time an instruction is executed
• After reset – PC will be set to 0000H and after execution of one
instruction, PC is incremented automatically to point to the address of
the next instruction to be executed.
• Why 16 bits PC?

18. Memory
• 4k bytes on chip ROM
• 128 bytes RAM
• Program memory is used to hold start up program
• Data random access memory is divided into 4 parts:
First 128 bytes : 00H TO 1FH (31) – Register Banks
20H TO 2FH(47) – Bit addressable RAM
30H TO 7FH (127) – General purpose registers
Next 128 bytes : 80H TO FFH (255) – Special function register

19. Register Banks
• The 8051 microcontroller consists of four register banks, such as Bank0, Bank1,
Bank2, Bank3 which are selected by the PSW (Program Status Word) register.
• These register banks are present in the internal RAM memory of the 8051
microcontroller, and are used to process the data when the microcontroller is
programmed.
• Lowest 32 bits
• 4 banks – each having 8 registers
• RS1 and RS0 (4TH BIT AND 3RD BIT) program status word select the bank
• Each bank contains R0 TO R7
• Example: add A,R2 – adds the value contained in R2 to the accumulator
• RS1=0 and RS0=0 – BANK 0 IS SELECTED
• R2 is which memory location? ADD A,02H

20. Internal RAM Organization

22. Timer/Counter and serial port
• Has two 16 bits timers/counter(timer 0 – timer 1)
• Which can be used either as timer to generate a time delay or as
counter to count events happening outside the microcontroller.
• In counter mode operation: they can count the number of high and
low transitions of the signal applied to the counter pins.
• In timer mode operation: timer can be independently programmed in
different mode of operation:

23. Modes of operation
• Mode 0
• Mode 1
• Mode 2
• Mode 3
• In mode 0: the serial port can either tranmit or receive at fixed baud
rate
• In mode 2: can simultaneously transmit and receive at anyone of the
two selectable baud rate
• Mode 1 n mode 3: it works as full duplex serial port with variable
baud rate which is programmed using timer 1

24. • In 8051,timer and counter contain two special function registers
• TMOD (timer mode register)
• TCON (timer control register)
• Used for activating and configuring counters and timers

25. Types of Instructions in 8051 Microcontroller
Instruction Set
• An 8051 Instruction consists of an Opcode (Operation – Code)
followed by Operand(s) of size Zero Byte, One Byte or Two Bytes
Instruction= opcode + operand
• The Op-Code part of the instruction specifies the type of operation to
be performed.
• All Opcode part of the instruction are of One Byte size.
• Operand part of the instruction defines the data being processed by
the instructions.

26. • The operand can be any of the following:
• No Operand
• Data value
• I/O Port
• Memory Location
• CPU register

27. 8051 Addressing Modes
• An Addressing Mode is a way to locate a target Data, which is also
called as Operand.
• 8051 Family of Microcontrollers allows five types of Addressing
Modes for addressing the Operands. They are:
• Immediate Addressing
• Register Addressing
• Direct Addressing
• Register – Indirect Addressing
• Indexed Addressing

28. Immediate Addressing
• In Immediate Addressing mode, the operand, which follows the Opcode, is
a constant data of either 8 or 16 bits.
• The name Immediate Addressing came from the fact that the constant
data to be stored in the memory immediately follows the Opcode.
• The constant value to be stored is specified in the instruction itself rather
than taking from a register. The destination register to which the constant
data must be copied should be the same size as the operand mentioned in
the instruction.
• Example: MOV A, #030H
• Here, the Accumulator is loaded with 30 (hexadecimal). The # in the
operand indicates that it is a data and not the address of a Register.
• Immediate Addressing is very fast as the data to be loaded is given in the
instruction itself.

29. Register Addressing
• In the 8051 Microcontroller, we have studied the organization of RAM
and four banks of Working Registers with eight Registers in each bank.
• In Register Addressing mode, one of the eight registers (R0 – R7) is
specified as Operand in the Instruction.
• It is important to select the appropriate Bank with the help of PSW
Register.
• Example: MOV A, R5
• Here, the 8-bit content of the Register R5 of Bank0 is moved to the
Accumulator.

30. Direct Addressing
• In Direct Addressing Mode, the address of the data is specified as the
Operand in the instruction.
• Using Direct Addressing Mode, we can access any register or on-chip
variable.
• This includes general purpose RAM, SFRs, I/O Ports, Control registers.
• Example: MOV A, 47H
• Here, the data in the RAM location 47H is moved to the Accumulator.

31. Register Indirect Addressing
• In the Register Indirect Addressing Mode, the address of the Operand
is specified as the content of a Register.
• Example: MOV A, @R1
• The @ symbol indicates that the addressing mode is indirect. If the
contents of R1 is 56H, for example, then the operand is in the internal
RAM location 56H. If the contents of the RAM location 56H is 24H,
then 24H is moved into accumulator.
• Only R0 and R1 are allowed in Indirect Addressing Mode. These
register in the indirect addressing mode are called as Pointer
registers.

32. Indexed Addressing Mode
• With Indexed Addressing Mode, the effective address of the Operand
is the sum of a base register and an offset register.
• The Base Register can be either Data Pointer (DPTR) or Program
Counter (PC) while the Offset register is the Accumulator (A).
• In Indexed Addressing Mode, only MOVC and JMP instructions can be
used..
• Example: MOVC A, @A+DPTR
• Here, the address for the operand is the sum of contents of DPTR and
Accumulator.

33. THANK YOU