Nansen Chen
2 SlideShares
Personal Information
Entreprise/Lieu de travail
Taiwan Taiwan
Profession
MediaTek Inc.的Technical Manager
Secteur d’activité
Electronics / Computer Hardware
À propos
1. Granted 23 US patents (22 patents with the first inventor) and 132 total citation count. [online: www.patentbuddy.com/Inventor/Chen-Nan-Jang/11875829]; 2. Published 4 journal papers and 17 conference papers (all papers with the first author). [online: ieeexplore.ieee.org]; 3. Solved SI/PI/EMI problems for TV/BD-Player/Tablet/Box (tier 1) customers, including Samsung, LG, SONY, Panasonic, Lenovo, amazon, and Foxconn; 4. Development of Anywhere Decap in package with the package subcon; 5. 17 years’ experience for high-speed (SerDes, DDR) channel designs (packages, PCBs, and connectors), guidelines, and patents; 6. Chip-Package-Board co-simulation and verification (for signal and power i...
Coordonnées
Mots-clés
s-parameter pcb bga jedec ddr power saving emissions coefficient overshoot odt eye-open insertion loss siwave hfss chip-package-board lcd tv carbon footprint carbon reduction dram leadframe innovation return path high-speed patent package power integrity signal integrity
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Présentations

(2)

Run Simulations and Then Become An Inventor (Best Paper Award in CDNLive Taiwan 2017)

il y a 6 ans • 149 Vues

Do SI Simulation, Also for Carbon Reduction

il y a 6 ans • 244 Vues
Personal Information
Entreprise/Lieu de travail
Taiwan Taiwan
Profession
MediaTek Inc.的Technical Manager
Secteur d’activité
Electronics / Computer Hardware
À propos
1. Granted 23 US patents (22 patents with the first inventor) and 132 total citation count. [online: www.patentbuddy.com/Inventor/Chen-Nan-Jang/11875829]; 2. Published 4 journal papers and 17 conference papers (all papers with the first author). [online: ieeexplore.ieee.org]; 3. Solved SI/PI/EMI problems for TV/BD-Player/Tablet/Box (tier 1) customers, including Samsung, LG, SONY, Panasonic, Lenovo, amazon, and Foxconn; 4. Development of Anywhere Decap in package with the package subcon; 5. 17 years’ experience for high-speed (SerDes, DDR) channel designs (packages, PCBs, and connectors), guidelines, and patents; 6. Chip-Package-Board co-simulation and verification (for signal and power i...
Mots-clés
s-parameter pcb bga jedec ddr power saving emissions coefficient overshoot odt eye-open insertion loss siwave hfss chip-package-board lcd tv carbon footprint carbon reduction dram leadframe innovation return path high-speed patent package power integrity signal integrity
Tout plus